M. Romagnoli - Scuola Superiore di Sant`Anna
Transcript
M. Romagnoli - Scuola Superiore di Sant`Anna
Design, Fabbricazione e Packaging di Dispositivi Fotonici Integrati presso la Scuola Superiore Sant'Anna Marco Romagnoli ASI Workshop ‘La Componentistica Nazionale per lo Spazio: Stato dell’arte, Sviluppi e Prospettive’ Roma 18‐20 Gennaio 2016 Facilities: Clean-Room for PIC manufacturing 500‐m2 clean space 60 ‐m2 class 100, 160‐m2 class 1000, 275‐m2 class 10000 70‐m2 25 m2 class 100 , 45m2 class 10000 package facility into TeCIP institute Technology Platforms o Silicon photonics o Hybrid Integration o Glass on silicon o Advanced packaging Rete di accesso radio mobile Flusso canali Inserimento di canale Estrazione di canale Rete configurabile ad anello Nodo di rete riconfigurabile Dimensione 5x3 mm Circuito fotonico integrato Realizzato da: Scuola Superiore Sant'Anna Pag. 11/15 Data Center Corridoio di un Data Center Interconnessioni ottiche 10 ‐ 100Gb/s per interconnessione in data center 1 milione di interconnessioni in un super computer di grandi dimensioni o in un grande data center Google detiene solo il 3% dei data center mondiali Realizzato da: Scuola Superiore Sant'Anna Travelling wave modulator Nested MZI Input Travelling wave phase shifter Nested MZI for complex modulation formats 16QAM up to 20Gbd Tunable coupler Integrated 50Ω Output Photonic Integrated Circuits Design •Analytical models (synthesis and analysis) •Mode analysis (Lumerical, Photon Design) •3D FDTD and FEM photonics simulations (Lumerical, Comsol) •RF design and simulations (Comsol) •TCAD design/simulations of doped semiconductors (Lumerical, ISE-TCAD) •3D Thermal and thermo-mechanical analysis and design (Comsol, Flotherm) •Ray tracing optical design (Zemax) •Mask design with foundry PDK PIC Characterization Equipment • Edge-coupling/in-line and vertical coupling characterization setups for PIC with top and side cameras/microscopes, nanopositioners, holders, controller, optical and electrical (DC and RF) probe; • 200mm wafer EO probe station • Infrared camera; • Ultra-short optical pulse source at 10 GHz • Digital Sampling Oscilloscope at 64 GHz • Optical Spectrum Analysers • Electrical Spectrum Analyser at 40 GHz; • Vector Network Analyser; • Autocorrelator; • Pattern generator at 10, 40, 56 GHz; • Error detector at 10, 40, 56 GHz; • Signal source analyzer; • DFBlasers batteries; • Tuneable laser sources; • Optical power amplifiers (2W); • Low-noise optical pre-amplifiers; • Various electrical components up to 40 GHz; • Fixed and tuneable optical filters; Micro‐optics design Tool USED: ZEMAX Opticstudio 14.2 ZEMAX Opticstudio 14.2 ‐ Geometric Ray tracing ‐ Evaluation of aberration ‐ Optimization ‐ Diffraction analysis for conjugate points ‐ Mono mode optical fiber coupling ‐ Etc… COMSOL ‐ Thermo‐mechanical analysis FLOTHERM ‐ Thermal analysis (electronics) ‐ fluid‐dynamics PTC Creo Expr INTEGRATED PHOTONICS TECHNOLOGY CENTER AUTHORS: SERGIO DONEDA GIOVAN BATTISTA PREVE Plan View Vertical furnace for poly‐Si, Si3N4 Evaporator Lift off BPTEOS Liquide source PECVD Omega Mori Helicon Plasma Deep Dielectrics etching and Si wg Filmtek 4000 high accuracy n,k,tk Vistec VB6 UHR Ma6Ba6 Gen3 Front back alignment Confidential Field Emissione SEM 13 Technology Platform: Silicon Photonic Silicon photonics has emerged as a key enabling technology for future high bandwidth interconnects for servers , data centers and high performance computing systems due to its potential of offering CMOS compatible wafer scale integrated optical I/O on IC package and the potential for low cost high volume manufacturing by leveraging the infrastructure developed for CMOS electronics. Technology Platform: Silicon Photonics Device development for: WDM Development Surface Grating Thermo –Optics Ring resonator structure Modulators with External Ion implant service RD development for hybrid integrations and “mode adaptor” with different waveguide material device cross-section 420 nm 100 nm Ion Implant N and P type species 70 nm 130 nm SOI wafers: 220nm Silicon Layer /3µm BOX layer/Wg Structure 460x220nm SOI supplierSoitec ShinEtsu (will be qualified Q4 2015) INPHOTEC Capability (design dependent) 500 wfs /year Technology Platform: Glass on Silicon The use of CVD waveguides Glass on Silicon allows the process compatibility and component integration necessary to achieve a high level of functionality with multiple optical functions and hybrid components. Planar Lightguide Circuits (PLC) can be a cost effective approach for the packaging of complex multiwavelength system components. Low n • Low propagation loss • Extended wavelength range • High coupling efficiency High n Medium n AWG Top View and cross section SiO2:Gedoped SiOXNY coupler Ring resonator Si3N4 Technology Platform: Glass on Silicon SiOXNY Upper clad conformal oxide ∆n= 7% wg Si3N4 ∆n= 0.7% SiO2:Ge ∆n= 2.5% wg Lower Clad Oxide ∆n= 35% SiO2:Ge Silicon Substrate n= n 2-n core 2/2 clad n 2 core Material ∆n Waveguide Size Curvature SiO2:Ge 0.7% 4.5X4.5µm2 7mm SiO2:Ge 2.5% 2.5X2.5µm2 1.2mm SiON 7% 2.2X2.2µm2 300µm Si3N4 35% submicron 7µm SOI 41% Deepsubmicron 3µm Capability (design dependent) 1500 wfs /year Technology Platform: Hybrid Integration The “Hybrid Integration” Platform aims to develop technologies that can suit the necessity to integrate different devices and parts together, supporting packaging activities in the realisation of structures enabling compactness and interoperability. In particular the Platform will develop the use of micro structured silicon as the SiOB Silicon Optical Bench. Optical submount High accuracy 3D structure Fiber block Eutectic Alloy metallurgic bonding Technology Platform: Advanced Packaging Design, development and prototipation packaging line for silicon photonics and optoelectronics components, sensors, MEMS,MOEMS. Automation and production up to thousands pieces/year Automatic die bonder Finetech Automatic ball bonder K&S Automatic pigtailing/flip chip bench PI‐miCos Infrastructure: Advanced Packaging Lab CR: Class 100 T°C 21± 1°C CR: Class 10000 T°C 21± 2°C