Libro GE 2006 - Attivit`a 2005

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Libro GE 2006 - Attività 2005
Giugno 2006
ANCONA
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ANCONA
Dipartimento di Elettronica Intelligenza Artificiale e Telecomunicazioni
Research topics
1) STATISTICAL SIMULATION OF INTEGRATED CIRCUITS
G. Biagetti, M. Conti, P. Crippa, S. Orcioni, C. Turchetti
Area: Integrated Circuits and Systems
2) DESIGN AND POWER ESTIMATION AT SYSTEM LEVEL
M. Conti, V. Frascolla, S. Orcioni, C. Turchetti, G. Vece
Other sources of funding: MIUR
Collaborations: ST Microelectronics, Korg Italy
3) NEURAL NETWORKS AND MODELING OF SPEECH SIGNALS
G. Biagetti, P. Crippa, F. Gianfelici, C. Turchetti
Area: Electronic Systems and Applications
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STATISTICAL SIMULATION OF INTEGRATED CIRCUITS
G. Biagetti, M. Conti, P. Crippa, S. Orcioni, C. Turchetti
Advances in CMOS fabrication technology to realize faster and more complex integrated circuits
have caused a continuously reduction in feature size of devices. As device sizes are scaled down,
process variations have a greater effect on the reliability of circuit performance. This is because
variances in technological parameters do not scale with dimension and device mismatch increases
as device feature size is reduced.
The statistical variability of the circuit parameters causes the circuit performances to show a
spread of values. Thus, if a circuit was designed to achieve specific nominal values of performances,
we could expect a dispersion of actual performances for a population of manufactured chips. As
a result, the parametric yield estimation is becoming important in VLSI design and particularly
critical in low-power/low-voltage circuits due to their higher sensitivity to tolerances. Because it is
essential for IC manufacturers to maximize yield as much as possible, adequate statistical modeling
and statistical design techniques are required for effective IC design.
The aim of this research is:
i) to develop statistical device modeling useful in technology optimization;
ii) to develop some methodologies for the statistical design flow of Integrated Circuits subject
to statistical technological tolerances with particular attention to device mismatch.
The main qualifying points of this research are:
1) Experimental CMOS process characterization and statistical modeling;
2) Statistical circuits simulations and yield optimization for IC statistical design;
3) Implementation of the tool SiSMA (Simulator for Statistical Mismatch Analysis) for statistical simulation of MOS ICs using a non-Montecarlo approach. This tool is able to perform
an efficient and detailed analysis of analog CMOS circuits whose devices are affected by spatial
parametric variations due to nonuniformities in the manufacturing process.
Publications in 2005
[1] C. Turchetti, S. Orcioni,G. Biagetti, M. Alessandrini, and P. Crippa. Tecnica per la Predizione degli Effetti delle Variazioni Costruttive sui Circuiti Integrati Non Lineari, Italian Patent
application for industrial invention AN2004 A 000057 (in the internationalization phase).
DESIGN AND POWER ESTIMATION AT SYSTEM LEVEL
M. Conti, S. Orcioni, C. Turchetti, G. Vece
As system complexity grows at a dramatic pace and time-to-market continues to shrink, new
design methodologies and tools seem the only way to produce a reliable design within a reasonable
time. From this perspective, effective reuse of existing designs, or Intellectual Property (IP) cores,
at different levels of abstraction, and performance/cost estimation and validation, since the early
phases of the design flow, are key for achieving a successful design.
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SystemC is an emerging standard modeling platform consisting of C++ libraries, models and
tools providing the ability to exchange and reuse IPs easily and efficiently across different levels of
abstraction. We applied this methodology in the system level design of many IPs, for example: an
I2C bus driver, a CAN bus driver, USB 1.1 and 2.0 drivers,the Baseband Layer and Link Manager
Layer of the Bluetooth standard, the AMBA AHB arbiter.
The implementation of digital and analog parts, such as DAC and ADC or RF frontends, in the
same chip, requires a mixed-signal simulation. Our research activity is devoted to the extension to
mixed-signal modeling of SystemC. The objective of the work is the definition of a methodology
for the description of analog blocks using instruments and libraries provided by SystemC. A set of
C++ classes implementing these functionalities has been developed and are available for download
at http://www.deit.univpm.it/sistemc-wms. An RF transceiver, an AC-AC converter for induction
cooking and a brushless motor controller have been used to show in detail the methodology.
The constraint on power consumption is becoming more and more relevant in the design of IC
due to the increment of clock frequency, and the increment of the market of portable devices. The
specification on power consumption must be taken into account in the early phases of the design
of a System on Chip.
Our research is concerned on the definition of models for the estimation of the power consumption of each block in high level simulation. The power-model developed will be integrated in high
level executable models in SystemC of each IP in order to allow the choice of different IPs, evaluate the performances and the respect of functional, timing and power constraints of the complete
System on Chip.
This work is developed under the European MEDEA+ research project “A511-ToolIP”: “Tools
and methods for IP” . An application of this high level power analysis to multimedia applications
(design of blocks implementing parts of the H.264 standard) is under development in the national
research project Cofin2003: “Low-power electronic systems for advanced multimedia applications:
design methodologies, algorithms and VLSI architectures”, in collaboration with the Universities
of Pisa and Trieste.
[1] M. Conti, “SystemC Analysis of a new Dynamic Power Management Architecture” in Proc of
the Designers’ Forum of the Conf Design Automation and Test in Europe DATE 2005, Munchen,
vol. 3, pp. 177-178.
[2] A. Beato, M. Conti, and C. Turchetti, “Development Languages and Environments for Induction
Cooking System Design and Simulation,” in Proceeding of 12th IEEE International Conference on
Electronics, Circuits and Systems (ICECS’05), Gammarth, Tunisia, Dec. 2005.
[3] G. B. Vece, M. Conti, and S. Orcioni, “Behaviour Separation: a high level methodology applicable in SystemC environment,” in Advances in design and specification languages for SOCS”, Part
II ”C/C++-Based System Design, ser. in press, A. Vachoux, Ed., Kluwer Academic Publishers,
2006.
[4] S. Orcioni, G. Biagetti, and M. Conti, “SystemC-WMS: Mixed signal simulation based on wave
exchanges,” in Advances in specification and design languages for SoC—Selected Contributions from
FDL’05, ser. in press, A. Vachoux, Ed., Kluwer Academic Publishers, 2006.
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[5] S. Orcioni, M. Pirani, and C. Turchetti, “Advances in Lee-Schetzen method for Volterra filter
identification,” Multidimensional Systems and Signal Processing, vol. 16, no. 3, pp. 265–284, 2005.
[6] G. B. Vece, S. Orcioni, and M. Conti, “Devices modeling in SystemC based on behaviours
separation,” in Proceeding of Forum on Specifications & Design Languages (FDL’05), Lausanne,
CH, Sept. 2005, pp. 245–256.
[7] S. Orcioni, G. Biagetti, and M. Conti, “SystemC-WMS: A wave mixed signal simulator,” in
Proceeding of Forum on Specifications & Design Languages (FDL’05), Lausanne, CH, Sept. 2005,
pp. 61–72.
[8] A. Beato, M. Conti, S. Orcioni, and C. Turchetti, “Modeling of power control schemes in
induction cooking devices,” in SPIE Int. Conference VLSI Circuits and Systems II 2005, vol.
5837, Siviglia, Spain, 2005, pp. 259–269.
[9] M. Conti, L. Pieralisi, M. Caldari, G. B. Vece, and S. Orcioni, “Power analysis methodology
and library in SystemC,” in SPIE Int. Conference VLSI Circuits and Systems II 2005, vol. 5837,
Siviglia, Spain, 2005, pp. 446–455.
[10] M. Conti, F. Coppari, S. Orcioni, and G. B. Vece, “System level design and power analysis of
architectures for SATD calculus in the H.264/AVC,” in SPIE Int. Conference VLSI Circuits and
Systems II 2005, vol. 5837, Siviglia, Spain, 2005, pp. 795–805.
[11] G. Vece, M. Conti, and S. Orcioni, “PK tool 2.0: a SystemC environment for high level
power estimation,” in Proceeding of 12th IEEE International Conference on Electronics, Circuits
and Systems (ICECS’05), Gammarth, Tunisia, Dec. 2005.
[12] M. Conti and D. Moretti, “System Level Analysis of the Bluethooth Standard” in Proc of the
Designers’ Forum of the Conf Design Automation and Test in Europe DATE 2005, Munchen, vol.
3, pp. 118-123.
NEURAL NETWORKS AND MODELING OF SPEECH SIGNALS
G. Biagetti, P. Crippa, F. Gianfelici, C. Turchetti
Artificial Neural Networks (ANN’s) that are able to learn, exhibit many interesting features
making them suitable to be applied in several fields such as pattern recognition, computer vision
and so forth. ¿From a mathematical point of view, learning has been related to the ability of the
network in approximating some classes of input-output functions.
The primary objectives of this research are:
i) to investigate the ability of neural networks in approximating input-output random functions
and transformations, thus widening the range of applicability of such networks;
ii) to develop a statistical representation of speech signals by exploiting the property of ANN’s
to be universal approximators of stochastic processes, and apply this result to the problems of
speech recognition and synthesis.
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[1] F. Gianfelici, G. Biagetti, P. Crippa, C. Turchetti, “Asymptotically exact AM-FM decomposition based on iterated Hilbert transform”, in Proceedings of Interspeech’2005 - Eurospeech - 9th
European Conference on Speech Communication and Technology, Lisbon, Portugal, Sept. 4 - 8,
2005, pp. 1121–1124.
[2] F. Gianfelici, G. Biagetti, P. Crippa, C. Turchetti, “AM-FM Decomposition of Speech Signals:
An asymptotically exact approach based on the iterated Hilbert transform”, in IEEE Proceedings
of Workshop on Statistical Signal Processing (SSP ’05), Bordeaux, France, July 17 - 20, 2005.
[3] F. Gianfelici, G. Biagetti, P. Crippa, C. Turchetti, “A novel KLT algorithm optimized for
small signal sets”, in IEEE Proceedings of 2005 International Conference on Acoustics, Speech, and
Signal Processing (ICASSP 2005), vol. 1, Philadelphia, PA, USA, 18 - 23 March 2005, pp. 405–408.
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POLITECNICO DI BARI
POLITECNICO DI BARI
ELETTROTECNICA ED ELETTRONICA
Research topics
1) DESIGN, FABRICATION AND CHARACTERIZATION OF OPTOELECTRONIC AND PHOTONIC DEVICES
M.N. Armenise, C. Ciminelli, F. Peluso, N. Sasanelli
Collaborations: University of Glasgow, Institute of Solid State Physics Sofia,Institute of Radioelectronic Engineering Moscow, IFAC-CNR Firenze, University of Paris VI, INFM
Other sources of funding: ESA, ASI, MIUR, MI
Area: Optoelectronics and Photonics
2) DESIGN OF SIGE CIRCUITS FOR 3RD GENERATION RADIO-MOBILE
UNITS
G. AVITABILE, B. CHELLINI, N. SOTTANI
Collaborations: Texas Instruments France
3) ANALYSIS, SYNTHESIS AND PERFORMANCE OPTIMIZATION OF MICROSTRUCTURES FOR SIGNAL DETECTION AND PROCESSING
B. Castagnolo, M. Rizzi, M. Maurantonio, R. Vinella, R.G. Antonicelli, P. Dello Russo
Collaborations: University Pontificia Universitade di Rio de Janeiro, Consorzio OPTEL, ST (Bruxelles), ITEL-Telecomunicazioni (Ruvo di Puglia), MASMEC (BA), ELETTRONIKA (Palo del Colle
-BA)
Area: Sensors, Microsystems and Instrumentation
4) TESTING, CHARACTERIZATION AND DESIGN OF SILICON DEVICES AND
ICS
F. Corsi, M. Caselle, A. Dragone, C. Marzocca, G. Matarrese, A. Tauro
Collaborations: INFN, CERN, IRST, Tecnopolis CSATA, Centro Laser
Other sources of funding: INFN, CNR , MURST, Infineon, National, Elettronika
5) DESIGN, FABRICATION AND CHARACTERIZATION OF PHOTONIC, OPTOELECTRONIC AND MICROWAVES DEVICES
M.De Sario, N. Albano, A.Albertoni, D. Biallo, G.Cal? A.Crudele, D. De Ceglie, A.D’Orazio, V.
Marrocco, L.Mescia, V.Petruzzelli, F.Prudenzano, F.Renna
Collaborations: University of Leeds, Brunel University of London, Univerity of Rennes, Pontificia Universitade di Rio de Janeiro, University of Trento, National Nanotechnology Laboratory
- Lecce, University of Lecce, University of Padova, Medicine Departments- University of Foggia,
Facolt di Physics Department-University of Bari, IFAC-CNR (Firenze), CFMSO Group of CNR-
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Trento,Centro Laser (Bari), Alenia Spazio (Roma), Siemens (Milano), ITEL-Telecomunicazioni
(Ruvo di Puglia), MERMEC (Monopoli-BA), ELETTRONIKA (Palo del Colle -BA)
Other sources of funding: MIUR, CNR, ALCATEL, ITEL, Regione Puglia
6) DESIGN AND TEST OF SENSORS INTERFACES
D. De Venuto, N. Gargano, D. Laterza, E. Cantatore
Collaborations: INFN, Tecnopolis CSATA, EPFL (Switzerland), Washington University, TIMA
(Grenoble), AMI Semiconductor (Belgium), Lancaster University
Other sources of funding: MURST, European Community
7) SILICON PHOTONIC DEVICES AND SENSORS
V. Passaro, F. De Leonardis, F. DellOlio, F. Magno
Collaborations: University of Surrey, University of Glasgow, INFM Bari, Institute of Semiconductor
Physics (Novosibirsk, Russia), IMM-CNR (LE), Labindia Instr. Ltd., Consorzio Optel Mesagne
(BR), Fimed s.r.l. Molfetta (BA)
Other sources of funding: MIUR, Min. Ambiente, Labindia Instr. Ltd., Fimed s.r.l.
8) DESIGN, MODELING AND EXPERIMENTAL CHARACTERIZATION OF DEVICES AND SYSTEMS FOR BIOMEDICAL APPLICATIONS
A. G. Perri, A. Giorgio, A. Convertino, R. Diana, S. Giusto, G. Gelao, F. Loiacono, A. Triggiani,
S. Polito
Collaborations: INFN of Naples, Kleistek Medical Systems, Data Dream, Xronos, Vivisol s.r.l.,
SIME s.n.c., Policlinico-Bari, CNR-Roma
Area: Microelectronic and Nanoelectronic Devices
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POLITECNICO DI BARI
DESIGN, FABRICATION AND CHARACTERIZATION OF OPTOELECTRONIC
AND PHOTONIC DEVICES
M.N. Armenise, C. Ciminelli, F. Peluso, N. Sasanelli
Optoelectronics and Photonics
a) Fabrication and characterization of optical waveguides Optical waveguides both in linear and
non linear materials constitute the basic element of guided-wave devices affecting their performance
parameters. Then, attention has been devoted to the proton exchange fabrication technique of optical waveguides in ferroelectric materials (lithium niobate) when highly protonated in different
proton sources. The study of different beta crystallographic phases in such kind of waveguides
had been carried out by the optical characterization and Raman and IR spectroscopic techniques.
Original investigations on the influence of radiation particles (neutrons, gamma rays) on the properties of proton exchanged waveguides have been also performed. b) Design of guided wave devices
Guided-wave components have been studied and proposed in innovative architectures for filtering
in DWDM applications, including grating-assisted vertical directional couplers and multi-frequency
acoustooptic Bragg cells. A strongly innovative research has been developed on the modeling and
design techniques for optimizing the performance of a number of guided-wave optical sensors for
gyroscope systems, considering both ring laser-based and passive ring resonator integrated optical architectures with very high sensitivity has been modeled, designed and simulated, to be used
in space (airplanes, satellites) applications. Physical effects and technological aspects have been
taken into account. A prototype of the angular velocity sensor based on the passive ring resonator
structure is at the moment under fabrication. c) Modeling and design of semiconductor optical
amplifier This activity includes the study of a model and the design of a semiconductor optical
amplifier (SOA). The code allows investigating the near Travelling Wave (TW) SOA with respect
to spectral gain properties as function of the pump current while varying structural parameters.
The model takes into account Auger recombination, thermal effect and spontaneous emission and
allows considering any reflectivity at the device ends. The saturation power can be optimised with
respect to the structural parameters; the dependence of the carrier density with the propagation
direction has been considered in the model to evaluate all the saturation effects. The model allows
also evaluating the presence in the SOA of contra-propagating beams and the dynamic behaviour
of the device. d) Modeling, design, fabrication and testing of photonic crystal devices An original
model based on Floquet-Bloch formalism has been applied to the analysis and design of 2D photonic bandgap devices. The model has been applied to both finite gratings and grating arrays, and
was used to design microphotonic cavities to be used for filtering operations. By using a code based
on the Bloch-Floquet approach a silicon-on-insulator guided-wave PhC filter with a long ( 8 ?m)
Fabry-Perot cavity configuration, operating in the region of 1550 nm, has been designed, fabricated
and characterized.
[1] M. N. Armenise ,C. Ciminelli, V. M. N. Passaro, F. De Leonardis, Micro gyroscope technologies for space applications, ESA-ESTEC IOLG Project, Contract Report, 2003/2004. [2] M. N.
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Armenise ,C. Ciminelli, V. M. N. Passaro, F. De Leonardis, Ring lasers model and quantum effects in integrated optical angular velocity sensors, ESA-ESTEC IOLG Project, Contract Report,
2003/2004. [3] C. Ciminelli, F. Peluso, V. M. N. Passaro, M. N. Armenise, Angular response of
narrow band 2D-PBG guided wave filters, Microresonators as Building Blocks for VLSI Photonics,
AIP Proceedings, Vol. 709, pp. 439-440, 2004. [4] V.M.N. Passaro, C. Ciminelli, M.N. Armenise,
I.T. Savatinova, F. De Leonardis, F. Peluso, Proton source composition for fabricating high quality
lithium niobate waveguides, OpdiMi Conference Capo Miseno, Italy, April 2004. [5] M.N. Armenise, C. Ciminelli, F. De Leonardis, V.M.N. Passaro, Quantum effects in new integrated optical
angular velocity sensors, ICSO 2004, Tolosa, 30 Marzo - 2 April 2004. [6] V.M.N. Passaro, C.
Ciminelli, M.N. Armenise, I. Savova, B. Jordanov, P. Kircheva, I.T. Savatinova, B. Plantchev, Optical and structural characterization of Z-cut LiNbO3 optical waveguides formed in a mixed proton
source, IEEE J. of Lightwave Technology, Vol. 22, N. 3, March 2004, pp. 820-826. [7] C. Ciminelli,
H. M. Chong, F. Peluso, R. M. De La Rue, M.N. Armenise, High-Q Guided-Wave Photonic Crystal
Extended Microcavity, ECOC2004 Proceedings, Post-deadline Paper Th 4.2.6, September 2004. [8]
C. Ciminelli, F. Peluso, M. N. Armenise, R. M. De La Rue, Modeling and design of high-Q tunable
photonic crystal long cavities, COST P11 Meeting, Rome, October 17-20 2004. [9] C. Ciminelli,
H. M. Chong, F. Peluso, R. M. De La Rue, M.N. Armenise, Fabrication and Characterization of
High-Q Guided-Wave Photonic Crystal Long Cavities, COST P11 Meeting, Rome, October 17-20
2004. [10] C. Ciminelli, F. Peluso, M. N. Armenise, A new integrated optical angular velocity
sensor, Photonic West, 24 -26 January 2005, San Jose, California, USA. [11] C. Ciminelli, F.
Peluso, M. N. Armenise,Modeling and design of 2D guided-wave photonic band gap devices, IEEE
J. of Lightwave Technology, Vol. 23, N. 2, pp. 886-901, February 2005. [12] C. Ciminelli, F.
Peluso, V.M.N. Passaro, F. De Leonardis, M.N. Armenise, Oblique incidence for tunability in a
two-dimensional photonic bandgap guided-wave filter, submitted to IEEE J. of Lightwave Technology, February 2005. [13] H. M. H. Chong, M. Gnan, E. A. Camargo, C. Ciminelli, M. N.
Armenise, R. M. De La Rue, Thermo-optic Photonic Crystal and Photonic Wire Devices in SOI,
2nd International Workshop on Ubiquitous Knowledge Network Environment, March 16-18, 2005,
Sapporo Convention Center, Sapporo, Japan (INVITED PAPER). [14] C. Ciminelli, F. Peluso,
M. N. Armenise, La Fotonica per lo Spazio, XI Giornata di Studio sull’Ingegneria delle Microonde,
Tecnologie Elettroniche ed Elettromagnetiche per lo Spazio, Elem05, 12-14 Aprile, 2005, Orvieto
(INVITED PAPER).
NEW RF ARCHITECTURES FOR 3RD GENERATION RADIO-MOBILE UNITS
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POLITECNICO DI BARI
HIGH EFFICIENCY AND NON-LINEAR PAS FOR MOBILE APPLICATIONS
G. AVITABILE, N. LOFU’, M. CAPODIFERRO, L. CARELLA
A. The new scenario of mobile and wireless TLC applications helped to stress the RF state of
the art and brought the market to accept the new hi-tech offer. At the same time, Microelectronic
achievements in the field of the lower microwaves made available low cost integrated circuits with
an ever increasing complexity. Nevertheless, mobile systems have several points of weakness such
as the level of integration between the RF front-end and the digital base band processor, the power
consumption, and so on. The current literature widely argues about these topics emphasizing the
need of a competitive integration between the different parts of the Tx and Rx paths. The typical
high performance front-end is implemented in bipolar (with some discrete components) while the
base band functions are built in VLSI CMOS technology which helps reducing the occupied physical
volume and power dissipation. The recent researches investigate both BiCMOS and RF-CMOS.
The first one combines the advantages of the two primary technologies allowing the use of high
speed bipolar in the RF front-end and CMOS in the base-band section, both on the same chip. On
the RF CMOS side, the use of narrow channel CMOS devices (size less than 1um) in the front-end
of the wireless receivers brought to several good examples of complete transceivers implemented
in a pure high speed CMOS technology. There are no doubts that bipolar has been a competitive
technology for RF applications, but the growth of the wireless market and the demand of very
low cost units requires new trade offs and the exploration of new design procedures. The research
approaches the problem of defining new architectures for the Tx path pushing the integration of
the RF front end components with the digital control blocks. Research Methodological aspects: (1)
development of new architecturex for on-channel multi-standard modulation, involving both the
synthesizer and the PA; (2) evaluation of new configurations and design techniques based on the
standard microwave approach; Design aspects: development of BiCMOS and full CMOS RF cells,
specifically mixers, fractional PLLs and VCOs.
B. The power amplifier (PA) represents a strategic component in many TLC applications, mostly
in mobile handsets. Indeed, the strict power control of a portable apparatus hardly co-exists with
the highly power demanding requirements of the PAs. Furthermore, the use of back-off techniques
to prevent distortions in Pas further limits an efficient design. The research addresses the problem
of designing multi-mode operation PAs for TLC applications ranging from low microwaves up to
Ku band. Research Methodological aspects: (1) development of a high-level models, based on
measurements performed on commercially available PA modules driven with variable input power/
voltage and/or current supplies. The model is mainly oriented to predict and correct the nonlinearity in the PAs, aiming to a multi-standard use of the module, i.e. for non-costant envelope
standards; (2) investigation of new solutions for PA modules design, starting from LINC scheme
and identification of a general approach to multi standard design. Design aspects: development of
PA modules using both hybrid and MMIC design techniques.
[1] G. Avitabile,N. Lof,’Quantization effects on the EVM in EDGE modulation standard’, 2004. 7th
European Conference on Wireless Technology, 11-12 Oct. 2004, Pages:245 - 248 [2] G. Avitabile,N.
POLITECNICO DI BARI
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Lof,’EVM degradation in EDGE two point modulation scheme due to quantization’, Wireless Conference, 2004 IEEE, 19-22 Sept. 2004 ,Pages:299 - 302 [3] N. Lof, G. Avitabile, B. Bisanti, S.
Cipriani,’Direct Sigma Delta GMSK modulator modeling and design for 2.5 G TX applications’,
ISCAS ’04. Proceedings of the 2004 International Symposium on Circuits and Systems,Volume: 4 ,
23-26 May 2004 Pages:IV - 193-6 Vol.4 [4] G. Avitabile, N.Lof, B.Bisanti, S. Cipriani, ’Effect of PA
Nonlinearity on EDGE Modulation Standard’, proceeding di European Microwave Week 2003, vol.
ECWT, pp. 403-406, Monaco di Baviera, 6-10 ottobre 2003. [5] N. Lof, G, Avitabile, ’Envelope
Path Quantization in EER Architecture’, INMMIC 2004, Roma 15-16 novembre 2004
ANALYSIS, SYNTHESIS AND PERFORMANCE OPTIMIZATION OF
MICRO-STRUCTURES FOR SIGNAL DETECTION AND PROCESSING
B. Castagnolo, M. Rizzi, M. Maurantonio, R. Vinella, R.G. Antonicelli, P. Dello Russo
Area: Microwave and Millimiterwawe Electronics
A. Optimization of GaAs X-ray sensors for digital radiography Continuing the research of the
last year, new GaAs pixel matrix detectors are studied for digital radiography applications. The
performance of such detectors have been experimentally evaluated and simulated adopting suitable
3D model. The obtained results indicate the detectors ability to interact with low-energy X-rays
to generate good quality images for high-contrast details. Moreover,the analysis of the minimum
radiation amount depending on the particular applications, has been taken into account.The pixel
sensor thickness is related to this quantity. Adoption of GaAs material allows to reduce to a
minimum this parameter and consequently to get a very low bias voltage. The sensor spatial resolution depends on the dimensions of the structure and therefore the pixel area has to be optimized.
However, in order to reduce interferences between devices, each pixel has to be surrounded by a
guard-ring. This type of technology option has the disadvantage to increase the area occupancy and
consequently to decrease the spatial resolution. For this reason the sensor minimum dimensions
have to be a trade-off between opposite requirements of noise coupling and spatial resolution.
B. Substrate noise propagation in mixed signal systems Continuing the studies on noise in mixed
signal circuits, effects of substrate noise coupling which can corrupte low level analog signals and
impair the performance of monolith ICs were considered. A characterization methodology able
to evaluate the e of the efficiency countermeasures against croasstalk appares very important for
designes.
[1] RIZZI M, DALOIA M., CASTAGNOLO B.: Design and simulation of a new multistage interconnection architecture WSEAS Transactions on Electronics, 2004, vol.1, N.2, pp.386-390 [2]
RIZZI M, ROSITO N., CASTAGNOLO B.: Modelling and simulation of Sigma-Delta ADC in
VHDL-AMS WSEAS Transactions on Electronics, 2004, vol.1, N.2, pp.391-395 [3] RIZZI M.
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POLITECNICO DI BARI
MAURANTONIO M. ,CASTAGNOLO B.: 3D-Finite Element Model for GaAs ?-particles pixel
detector WSEAS Transactions on Electronics, 2004, , Vol. 1, N. 4, pp.595-600 [4] RIZZI M. MAURANTONIO M. ,CASTAGNOLO B Comparative Analysis of GaAs, CdTe and CdZnTe Radiation
Detectors accepted at WSEAS Transactions on Electronics, 2005 [5] RIZZI M. MAURANTONIO
M. ,CASTAGNOLO B Design of High Speed Circuits for Systematic Cyclic Error Correction Codes
WSEAS Transactions on Circuits and Systems, 2005, Vol. 4, N.10, pp.1276-1283 [6] RIZZI M.
MAURANTONIO M. ,CASTAGNOLO B Novel Microstrip System Detectors for Medical Applications WSEAS Transactions on Biology and Biomedicine, 2005, Vol. 2, N.2, pp.220-227 [7] RIZZI
M, CASTAGNOLO B.: Evaluation of Technology Options for Substrate noise reduction Jour. Of
Circuits, Systems and Computers, 2005, vol.14, N.1, pp. 27-50 [8] RIZZI M. MAURANTONIO
M. ,CASTAGNOLO B 3D-Finite Element Model for GaAs ?-particles pixel detector, proceedings
of 4th WSEAS International Conference on ELECTRONICS, HARDWARE, WIRELESS and OPTICAL COMMUNICATIONS (EHAC ‘05), Salzburg, AUSTRIA, February 13-15, 2005 [9] RIZZI
M. MAURANTONIO M. ,CASTAGNOLO B GaAs X-Ray System Detectors for Medical Applications, proceedings of 6th WSEAS International Conference on Mathematics And Computers In
Biology And Chemistry (MCBC ‘05), Buenos Ayres, ARGENTINA, March 1-3, 2005 [10] RIZZI
M. MAURANTONIO M. ,CASTAGNOLO B Performance Analysis of p-i-n Radiation Detectors
proceedings of 5th WSEAS International Conference on SIGNAL PROCESSING, COMPUTATIONAL GEOMETRY and ARTIFICIAL VISION (ISCGAV ‘05), Malta, September 15-17, 2005
[11] RIZZI M. MAURANTONIO M. ,CASTAGNOLO B Synthesis Of Cyclic Encoder And Decoder
For High Speed Networks proceedings of 5th WSEAS International Conference on SIGNAL PROCESSING, COMPUTATIONAL GEOMETRY and ARTIFICIAL VISION (ISCGAV ‘05), Malta,
September 15-17, 2005 [12] RIZZI M. MAURANTONIO M. ,CASTAGNOLO B Comparison of
X-Ray GaAs and CdTe P-I-N Detectors by a 3D FEM Model proceedings of IEEE Nuclear Science
Symposium and Medical Imaging Conference 2005, Puerto Rico, October 23-28, 2005, pp.740-745
TESTING, CHARACTERIZATION AND DESIGN OF SILICON DEVICES AND
ICS
F. Corsi, M. Caselle, A. Dragone
C. Marzocca, G. Matarrese, A. Tauro
A. Testing, Design for Testability of Silicon Mixed-Signal ICs, Tuning of continuos-time filters.
The main research line regards the analog circuit testing and in particular the study and the
implementation of techniques based on the response of the circuit under test to a suitably designed
input stimulus. In particular a methodology based on a pseudorandom two-level input stimulus
has been validated for the test of continuous time filters embedded in mixed signal circuits. The
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influence of different choices for the parameters characterizing the pseudorandom input sequence
has been studied. Moreover ad hoc techniques have been devised and compared to refine the
classification criteria for the circuit under test, in order to minimize the probabilities of accepting
bad circuits or rejecting good ones. Finally a novel methodology for the automatic tuning of
continuos-time filters has been studied; it is based on the application of a pseudo-random input
test pattern signal and on the evaluation of a few samples of the input-output cross-correlation
function. The key advantages of this new technique are basically the use of a pseudo-random
pattern signal which can be generated by a very simple circuit in a small die area and the simple
circuitry required to sample the filter output and to perform the cross-correlation operation.
B. ICs for Medical Imaging Applications A gamma-ray imaging system for medical applications
with good spatial resolution and image contrast has been designed within the framework of a
PRIN project. The system is aimed to an application in the field of the molecular imaging and
scintimammography. The system is based on a two-dimensional array of silicon PIN photodiodes
equipped with a scintillator layer of inorganic material (CsI). Each scintillation photon is then
converted by the PIN diode in a short current pulse. The front-end electronics processes these
current pulses and converts them into voltage pulses, to be digitised with the needed resolution
and to be processed and create a good quality image. The specific activity of the Bari unit has
been devoted to the design and the manufacturing of the detector front-end electronics, whose
structure consists in low-noise charge preamplifier or ”charge sensitive amplifier” (CSA) followed
by a ”slow” shaper filter that reduces noise. A prototype of the chip has been realized in a CMOS
0.35um technology and is currently under test. Another research line is related to the design of
front-end electronics for Silicon Photomultiplier detectors (SiPM), in the framework of a V Group
INFN project called DaSiPM. The research aims to the realization of a front-end chip suitable to
accomodate the large dynamic range and high speed carachteristics of the signal delivered by a
SiPM, for applications including medical imaging, high energy physics and space experiments.
C. Design of low-voltage CMOS analog integrated structures. In collaboration with different
european companies, the study of analog basic building blocks for low-voltage CMOS integrated
circuits has been carried out. Basically the considered structures are single low-distorsion OTAs to
be inserted in analog filters for VDSL applications and high-gain OPAMP to be employed in fast
and accurate ADCs. Also new structures for current mirrors intended for low voltage applications
have been proposed, which are characterized by very good performance in terms of output resistance
and compliance.
[1] F. Corsi, C. Marzocca, G. Matarrese, A. Baschirotto, S. D’Amico: ”Pseudo-random Sequence
Based Tuning System for Continuous-time Filters” on Proc.IEEE Design, Automation and Test
in Europe Conference and Exhibition, Paris, France, February 2004, pp.94-99. [(] 2) A. Di Giandomenico, F. Corsi, C. Marzocca, G. Matarrese, A. Baschirotto, S. DAmico: ”A novel tuning
technique for continuous-time filters based on pseudorandom sequence” US Patent Application no.
10/778,610, April 2004. [(] 3) L. Pancheri, C. Marzocca, M. Boscardin G.-F. Dalla Betta: ”Silicon
Pin Detector with Integrated JFET-based Source Follower” on IEE Electronics Letters, vol. 40,
No. 20, September 2004. [(] 4) A. Dragone, F. Corsi, C. Marzocca, P. Losito, D. Pasqua, E.
Nappi, R. De Leo, J. Suinot, A. Braem, E. Chesi, C. Joram, P. Weilhammer, F. Garibaldi, H.
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Zaidi: ”An Event Driven Read-out System for a Novel PET Scanner with Compton Enhanced 3D
Gamma Reconstruction” on Proceedings of IEEE Nuclear Science Symposium, Medical Imaging
Conference, Rome, October 2004. [(] 5) M. Di Ciano, C. Marzocca, A. Tauro: ”A Low Voltage,
High Output Impedance CMOS Current Source” on Proceedings of ICSE2004, Kuala Lumpur,
Malaysia, December 2004 [(] 6) G. Matarrese, C. Marzocca, S. DAmico, F.Corsi, A. Baschirotto:
”On chip self-tuning of high performance filters via pseudo-random input test signal” Proceedings
of IEEE IMSTW 2005, Cannes, France, June 2005. [(] 7) L. Stebel, M. Tommasi, S. Carrato, G.
Cautero, N. Cirulli, G. Pignatel, C. Marzocca, A. Tauro, A. Dragone, F. Corsi, G. Dalla Betta:
Development of a Prototype Detector for Use in Scintimammography Imaging, Proceedings of 1st
International Workshop on Advanced Sensors and Interfaces, Bari, Italy, April 2005. [(] 8) L.
Stebel, S. Carrato, G. Cautero, F. Corsi, A. Dragone, C. Marzocca, A. Tauro, G.-F. Dalla Betta,
A. Fazzi: Development of the digital readout and interface electronics for a prototype detector for
scintimammography, 10th European Symposium on Semiconductor Detectors, Wieldbad Kreuth,
June 2005. [(] 9) L. Stebel, S. Carrato, G. Cautero, N. Cirulli, G. Pignatel, C. Marzocca, A. Tauro,
A. Dragone, F. Corsi, G. Dalla Betta, A. Fazzi, V. Varoli, F. Cusanno, F. Garibaldi: A Modular
Prototype Detector for Scintimammography Imaging, Conference records of IEEE Nuclear Science
Symposium, Medical Imaging Conference 2005, Puertorico (USA), October 2005. [(] 10) M. Di
Ciano, C. Marzocca, A. Tauro: ”An Improved Low Voltage CMOS Current Source Exploiting Positive Shunt Feedback”, Proceedings of ICECS2005, Gammarth, Tunisia, December 2005. [(] 11)
P. Bruno, G. Cicala, F. Corsi, A. Dragone, A.M. Losacco: ”High relative Humidity Range Sensor
based on Polymer-coated STW Resonant Device”, Sensors and Actuators B, Chemical, vol. B 100
pp. 126-130 ISSN: 0925-4005, 2004.
DESIGN, FABRICATION AND CHARACTERIZATION OF PHOTONIC,
OPTOELECTRONIC AND MICROWAVES DEVICES
M.De Sario, A.D’Orazio, M.Bozzetti, V.Petruzzelli, F.Prudenzano, L.Mescia, A.Crudele
N.Albano, D.Biallo, G.Cal, D.De Ceglie, V.Marrocco, M.A.Vincenti
The research activity of the Integrated Optics and Microwaves Groups in the areas of photonics, optoelectronics and microwave devices can be summarized in the following topics: a) design
of double-clad rare-earth (praseodymium, erbium and erbium/ytterbium) microstructured active
fibers; b) design of nonlinear optical devices in periodically poled lithium niobate (temperature
sensor, all-optical amplifiers, wavelength conversion) exploiting the cascade effect of second-order
nonlinearities; c) modelling and design of optical photonic band gap devices (filters, wavelength
splitters, couplers, etc.) for Wavelength Division Multiplexing systems and PBG microcavities
for pressure sensors and second harmonic generation; d) design of optical sensors made of planar waveguide or optical fiber for the hydrocarbon detection in water beds, by using silica glass
waveguides and hydrophobic polymeric claddings; e) design of MOEMS in interferometer or ring
POLITECNICO DI BARI
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resonator configuration for space application; f) modelling and design of metamaterial based devices
for optical (enhancement of second harmonic generation in negative refractive index structures) and
microwave (filters, directional couplers) application; g) design, fabrication and characterization of
electromagnetic band gap filters and antennas operating in microwave range; h) microwave treatment of antique works, i) design of GTEM cell exposure devices for in-vitro biological experiments.
[1] . T.Stomeo, R.Bergamo, R.Cingolani, M.De Vittorio, A.D’Orazio, D.De Ceglia, V.Marrocco:
Silica glass bend waveguide assisted by two-dimensional photonic crystals, Optical and Quantum
Electronics, ISSN 0306-8919, vol.37, issue 1-3, January 2005, pp.229-239. [2] . F.L.Di Alessio,
A.D’Orazio, R.Lavolpe: Even harmonic C-Band modulator, IEEE Transactions on Microwave
Theory and Techniques, ISSN 0018-9480, april 2005, vol.53, n.4, pp.1203-1210. [3] . A.Albertoni,
D.Biallo, A.D’Orazio, M.De Sario, V.Marrocco, V.Petruzzelli, F.Prudenzano: Photonic Crystal
Devices for Wavelength Division Multiplexing Systems. Recent Research Developments in Optics, ISBN 81-308-0004-7, 5, 2005, pp.1-17. [4] . D.Biallo, A.D’Orazio, M.De Sario, V.Petruzzelli,
F.Prudenzano: Time Domain Analysis of Optical Amplification in Er3+ doped SiO2-TiO2 planar waveguide, Optics Express, ISSN 1094-4087, vol.13, n.12, June13, 2005 pp.4683-4692. [5]
. G. Carlone, A. DOrazio, M. De Sario, L. Mescia, V. Petruzzelli, F. Prudenzano: Design of
double-clad erbium doped holey fibre amplifier, Journal of Non-Crystalline Solids, ISSN 00223093, vol.351, issues 21-23, 15 July 2005, pp.1840-1845. [6] . A. DOrazio, M. De Sario, L.
Mescia, V. Petruzzelli, F. Prudenzano: Design of double-clad ytterbium doped microstructured
fibre laser, Applied Surfaces Sciences, ISSN 0169-4332, vol.248, issue 1-4, 30 July 2005, pp.499502. [7] . L.Alfano, A.D’Orazio, M.De Sario, V.Petruzzelli, F.Prudenzano: A continuous varying
impedance passband microstrip filter exploiting a butterfly wing shape, Journal of Electromagnetic Waves and Applications, ISSN 0920-5071, vol.19, n.9, 2005, pp.1145-1156. [8] . A.D’Orazio,
D. De Ceglia, M.De Sario, V.Petruzzelli, F.Prudenzano: FDTD analysis of second harmonic generation in quasi-one-dimensional photonic band gap waveguide, Recent Research Developments
in Optics, ISBN 81-308-0004-7, 5, 2005, pp.103-116 . [9] . A.D’Orazio, M.De Sario, L.Mescia,
V.Petruzzelli, F.Prudenzano: Refinement of Er3+-doped hole-assisted optical fiber amplifier, Optics Express, ISSN 1094-4087, vol.13, n.25, 12 December 2005, pp.9970-9981. [10] . A.D’Orazio,
V.Marrocco, T.Stomeo, A.Passaseo, M.De Vittorio: Dual wavelength division system in a twodimensional photonic crystal by using coupled cavities, 13th International Workshop on Optical
Waveguide Theory and Numerical Modelling, Grenoble, France, April 8-9, 2005. [11] . T.Stomeo,
R.Bergamo, L.Martiradonna, R.Cingolani, M. De Vittorio, A.D’Orazio, V.Marrocco: Fabrication
of high efficiency compact 90 bend waveguide by using a dielectric 2D-PC structure, Proceeding of
SPIE Microtechnologies for the New Millenium 2005, vol.5840, part 1, pp.118-125, Sevilla Spain,
9-11 May 2005. [12] . G.Cal, A.D’Orazio, M.De Sario, L.Mescia, V.Patruzzelli, F.Prudenzano:
Photonic Crystal Fibers, Invited Paper, 7th International Conference on Transparent Optical Networks, IEEE Conference, Barcelona - Spain, July 3-7, 2005, IEEE Proceedings IEEE Catalog
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Number 04EX804, ISBN 0-7803-9236-1, pp.115-120. [13] . D.Biallo, A.D’Orazio, M.De Sario,
L.Mescia, V.Petruzzelli, F.Prudenzano: Optical Amplification in Erbium-Doped Photonic Crystals, Invited Paper, 7th International Conference on Transparent Optical Networks, IEEE Conference, Barcelona - Spain, July 3-7, 2005, IEEE Proceedings IEEE Catalog Number 04EX804,
ISBN 0-7803-9236-1, pp.149-154. [14] . M.Bozzetti, G.Cal, A.D’Orazio, M.De Sario, L.Mescia,
V.Petruzzelli, F.Prudenzano, N.Diaferia, F.DImperio: Microwave treatment of antique works, 10
International Conference of Microwave and High Frequency Heating, Modena and Reggio Emilia,
Italy, 12-15 September 2005. [15] . G.Cal, A.D’Orazio, M.De Sario, L.Mescia, V.Petruzzelli,
F.Prudenzano: GTEM Cell Exposure Device for GSM Mobile Frequency in vitro Experiments,
EMC Europe Workshop 2005, Electromagnetic Compatibility for Wireless Systems, Rome, Italy,
19-21 September 2005, pp.423-426.
DESIGN AND TEST OF SENSORS INTERFACES
D. De Venuto, N. Gargano, D. Laterza, E. Cantatore
A. On-Chip Techniques to Improve the Testability of High Resolution Sigma Delta Analog to
Digital Converter Embedded. System-on-chip (SOC) integration is one of the most challenging
tasks in the era of deep sub-micron design. SOC productivity is a key requirement. While the
manufacturing cost per transistor is falling, the cost of design and non-recurrent engineering is escalating. With increasing time-to-market pressures and decreasing product life cycles, productivity
becomes even more sensitive to these cost contributing factors that range from design management, integration and yield control to the testability of new, more complex components. Even
with the use of distributed design engineering resources, design reuse is of crucial importance towards achieving productivity and meeting time-to-market requirements. This is especially the case
for analog and mixed signal components, as design skills and design productivity is not tracking
demand. Due to limited design engineering resources, importing third party designs is becoming
common practice for digital structures. At the same time, SOC integrators have to synchronize
design schedules for both analog and digital system components, which demands the integration of
analog and mixed signal virtual components. Testing is predicted to be one of the most difficult
aspects in mixed signal design, especially for imported IP blocks, so-called virtual components. The
most promising solution is to integrate tester functions within the virtual component. Performance
based built-in self-test (BIST) solutions (possibly not only dedicated for particular circuit types but
also to specific applications) are predicted to be most relevant for typical analog and mixed signal
components, such as converters. This research activity intends to investigate on-chip test support
techniques applicable to high resolution sigma-delta ADCs that also satisfy test requirements for
virtual components.
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B. Fully Electronic DNA Detection System DNA sensor arrays integrated on CMOS chips allow
fully electronic redout of the biological information and offer several advantages compared to stateof-the-art optical methods. The target of the research activity is the read-out electronics design for
a capacitive based DNA sensor. Experimental results from a preliminary characterization have been
already carryed out. The systems have been proven a resolution of 0.01% on the capacitive shift,
in presence of an eventual hybridization, by using a differential reading of the signals detected by
two sensors: a dummy and an active one. The solutions investigated are all suitable for a possible
integration with a micro-fabricated sensor
[1] D. De Venuto, M. J. Ohletz, B. Riccò: ”Automatic Repositioning Technique for Digital Cell
Based Window Comparators and Implementation within Mixed-Signal DfT Schemes”, on Proc.
of IEEE 2003 4th International Symposium on Quality Electronic Design (ISQED 2003), March
23 - 26, 2003 San Jose, CA, USA. [2] D. De Venuto, M. J. Ohletz, B. Riccò: ”Design of Digital
Window Comparators and their Implementation within Mixed-Signal DfT Schemes” on International Journal of Analog Integrated Circuits and Signal Processing, 35(2), May 2003, pp.157-168,
Kluwer Academic Publisher USA. [3] D. De Venuto, M. J. Ohletz : ”Floating body effects model
for fault simulation of fully depleted CMOS/SOI circuits” on Microelectronics Journal 34 2003
Elsevier Science, pp.889-895. [4] D. De Venuto, E. Compagne, A. Richardson: ”Investigations
into Testability Improvements on a 16 bit Audio Sigma-Delta ADC through the use of On-Chip
Techniques” Proc. of 8th IEEE International Mixed-Signal testing Workshop, IEEE IMSTW03
Sivilla (Spain), June 25-27, 2003. [5] D. De Venuto, M. J. Ohletz, B. Riccò: ”Self-Positioning
Digital Window Comparators for Mixed-Signal DfT” Proc of IEEE 9th International Conference
on Emerging Technologies and Factory Automation (ETFA), Lisbon, Portugal, 16-19 September
2003. [6] D. De Venuto, M. Blagojevic, M. Kayal: ”Microelectronic System for Hall Sensor Power
Measurements”, Proc of IEEE DELTA 2004 Pert (Australia) Jan. 28-30 2004. [7] D. De Venuto:
”New Test Access for High Resolution SD ADC’s for Noise Transfer Function Evaluation” Proc. Of
IEEE 2004 5th International Symposium on Quality Electronic Design (ISQED 2004) March 22-24,
San José, (CA), USA. [8] D. De Venuto , A. Richardson: ”Testing High Resolution SD ADC’s
by using the Noise Transfer Function” Proc. Of 9th IEEE European Test Symposium, Ajaccio,
Corsica, France, May 23-26, 2004. [9] O. Guerra, D. De Venuto, E. Compagne & R. Vanhooren:
”Initial summary of Dft possibilities for high-resolution interfaces, Deliverable 2.1a version 1.0,
TAMES-2, IST Project 2001-34283, 2003. [10] K. Georgopoulos, M. Burbidge, A. Lechner, A.
Richardson & D. De Venuto: ”Compilation of potential circuit failure modes for high-resolution interfaces, Deliverable 1.2 version 1.1, TAMES-2, IST Project 2001-34283, 2004. [11] D. De Venuto,
K. Georgopoulos, M. Burbidge, A. Lechner, A. Richardson: ”Initial report on Specification Testing
Effectiveness” TAMES Deliverable 1.4a, TAMES-2, IST Project 2001-34283 March 2004. [12] M.
Blagojevic, D. De Venuto, M. Kayal: ”SOI Hall Sensor Based Solid State Meter for Power and
Energy Measurements” Proc. Of IEEE Sensors 2004, Vienna (Austria) Oct. 24 -27 2004 [13] D.
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De Venuto, M. Ohletz, B. Riccò: Automatic Window Repositioning Technique for Digital Window Comparator used within Mixed-Signal Design-for Testability Schemes, on Analog Integrated
Circuits and Signal Processing, 42, 301-311, 2005 Springer Science+Business Media, Inc. Manufactured in The Netherlans. [14] D. De Venuto: Testing High Resolution SD ADCs by using the
Quantizer Input as Test Access on Microelectronics Journal 36 pp.810-819, 2005 Elsevier Science,
The Netherland. [15] D. De Venuto, G. Marchione, L. Reyneri: A codesign tool to validate and
improve an FPGA based test strategy for high resolution audio ADC. Proc. Of IEEE 2005 6th
International Symposium on Quality Electronic Design (ISQED 2005) San Jos, (CA), USA, March
21-23, 2005 [16] D. De Venuto, F. DellOlio, L. Reyneri: Optimization of FPGA-based test strategy
for high resolution ADC Proc of IEEE International Mixed Signal Workshop (IMSTW05), Cannes,
France, June 2005. [17] D. De Venuto, D. Minervini, B. Riccò: ”High Resolution Read-out Systems for DNA Capacitive Sensor” Proc. of First International Workshop on Advances on Sensors
Interfaces (IWASI), Bari 19-20 April 2005, Ed Laterza ISBN 88-8231-323-9 [18] M. Blagojevic,
D. De Venuto, M. Kayal: ”SOI Hall Sensor Electronics Interface for Energy Measurement with
Dynamic Offset Compensation” Proc. of First International Workshop on Advances on Sensors
Interfaces (IWASI), Bari 19-20 April 2005, Ed Laterza ISBN 88-8231-323-9
SILICON PHOTONIC DEVICES AND SENSORS
V. Passaro, F. De Leonardis, F. DellOlio, F. Magno
Guided-wave components have been proposed, modelled, designed and fabricated in innovative
photonic architectures using silicon-on-insulator (SOI) technology, including grating-assisted vertical directional couplers, first and third order guided-wave Bragg gratings, microring and microdisk
resonators, silicon phase modulators based on p-i-n or MOS structures, electric field photonic sensors, reconfigurable add-drop optical multiplexers, thermo-optic devices, small cross section optical
rib waveguides. In particular, a novel concept of dual grating optical coupler between optical fibres
and very thin silicon waveguides has been fabricated and a record efficiency of 55Sophisticated
complete modelling of space-time evolution of Raman pulses in SOI rib waveguides has been developed for the first time, and applied to investigate several nonlinear effects in silicon, including
polarization coupling, higher order Stokes wave excitation, pump depletion and walk-off. New nonlinear architectures have been proposed, such as an all-optical AND gate. Other modelling and
simulation activities have been devoted to multi quantum well ring lasers and vertical cavity surface
emitting lasers. To this aim, the Floquet-Bloch theory has been applied to predict the reflectivity
of distributed Bragg reflectors and their influence on laser performance. This approach has been
compared with largely used commercial CAD tools.
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[1] . G.Z. Masanovic, V.M.N. Passaro, G.T. Reed, Coupling to Nanophotonic Waveguides Using
a Dual Grating-Assisted Directional Coupler, IEE Proc. Pt J Optoelectronics, vol. 152, n. 1,
pp. 41-48, 2005. [2] . G.Z. Masanovic, G.T. Reed, V.M.N. Passaro, W. Headley, B. Timotijevic,
R.M.H. Atta, M.R. Josey, G.J. Ensell, A.G.R. Evans, Preliminary Experimental Results of a Dual
Grating-Assisted Directional Coupler on SOI, in Optoelectronic Integration on Silicon II (Photonics
West), Proc. SPIE n. 5730, pp. 173-180, 2005. [3] . F. De Leonardis, V.M.N. Passaro, Accurate
Physical Modeling of Multi Quantum Well Ring Lasers, Laser Physics Letters, vol. 2, n. 2,
pp. 59-70, 2005 (Wiley-VCH Ed., ISSN 1612-2011). [4] . V.M.N. Passaro, F. Magno, F. De
Leonardis, Optimization of Bragg reflectors in AlGaAs/GaAs VCSELs, Laser Physics Letters, vol.
2, n. 5, pp. 239-246, 2005 (Wiley-VCH Ed., ISSN 1612-2011). [5] . S.P. Chan, V.M.N. Passaro,
G.T. Reed, Singlemode and polarisation free conditions for small silicon-on-insulator waveguides,
Electronics Letters, vol. 41, n. 9, pp. 528-529, 28 April 2005. [6] . V.M.N. Passaro, F. Magno,
A. Tsarev, Investigation of thermo-optic effect and multi-reflector tunable filter/multiplexer in SOI
waveguides, OSA Optics Express, vol. 13, n. 9, pp. 3429-3437, 2 May 2005. [7] . V.M.N. Passaro,
F. De Leonardis, Architettura e progetto di un nuovo sensore fotonico di campo elettromagnetico
in tecnologia SOI, 9th National Meeting FOTONICA 2005, pp. 229-232, Trani (BA), 30 May 1
June 2005. [8] . S.P. Chan, C.E. Png, S.T. Lim, G.T. Reed, V.M.N. Passaro, Single-Mode and
Polarisation Independent Silicon-On-Insulator (SOI) Waveguides with Small Cross Section, IEEE
J. Lightwave Technol., vol. 23, n. 6, pp. 2103-2111, 2005. [9] . G. Masanovic, G.T. Reed, W.
Headley, B. Timotijevic, V.M.N. Passaro, R. Atta, G. Ensell, A.G.R. Evans, A high efficiency
input/output coupler for small silicon photonic devices, OSA Optics Express, vol. 13, n. 19, pp.
7374-7379, 19 Sept. 2005. Also in Gratings Couple Optical Fibers to Silicon Photonic Devices,
Photonics Spectra Silicon Photonics (special issue), vol. 39, n.11, pp. 22-26, Nov. 2005, in
Institute of Physics Information Portal: www.optics.org link to Research round-up, 21 September
2005, in Novel Dual-Grating Assisted Directional Coupler Developed for Nanophotonics, Physics
Newsletter, 30 Jan. 2006, in Record efficiency for photonic coupler, ATI News archive, 31 Jan.
2006, and in Research raises waveguide coupling efficiency, News Release from Innos Ltd., 25 Jan.
2006. [10] . V.M.N. Passaro, F. De Leonardis, A Novel High Sensitivity Miniaturized Electric-Field
Sensor based on Whispering Gallery Modes in SOI Technology, 3rd Optoelectronic and Photonic
Winter School, Sardagna (TN), 27 Feb 4 March 2005. [11] . S.P. Chan, G.T. Reed, V.M.N. Passaro,
D. Prather, J. Murakowski, Numerical simulation and fabrication of first and third order Bragg
gratings on small cross section SOI rib waveguide, IEE Workshop on Electromagn. Modelling for
Optoelectronics, Nottingham, 24 March 2005. [12] . A.V. Tsarev, V.M.N. Passaro, Multi-reflector
thermooptic reconfigurable add/drop multiplexer in SOI and polymer technologies for dynamic
high dense WDM, 12th European Conf. in Integrated Optics Proc. (ECIO05), ThPo5, pp. 394397, Grenoble, 6-8 April 2005. [13] . G. Masanovic, G.T. Reed, V.M.N. Passaro, W. Headley, B.D.
Timotijevic, R. Atta, G. Ensell, A.G.R. Evans, An Efficient Coupler for Silicon Nanophotonics,
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POLITECNICO DI BARI
12th European Conf. in Integrated Optics Proc. (ECIO05), ThPo14, pp. 430-433, Grenoble, 6-8
April 2005, also presented at 10th Intel Europe, Middle East and Africa (EMEA) Academic Forum,
Gdansk (PL), 18-20 May 2005. [14] . S.P. Chan, G.T. Reed, V.M.N. Passaro, Design criteria for
silicon-on-insulator photonics waveguides with small cross sectional dimensions, 10th Intel EMEA
Academic Forum, Gdansk (PL), 18-20 May 2005 (INVITED PAPER). [15] . V.M.N. Passaro, F. De
Leonardis, Design of Polarization Insensitive Vertical Couplers in Silicon-on-Insulator Waveguides
with Small Cross Section, 4th IEEE/LEOS Workshop on Fibres and Opt. Passive Components
(WFOPC2005), pp. 198-203, Mondello (PA), 22-24 June 2005 (ISBN 0-7803-8949-2). [16] . V.M.N.
Passaro, F. De Leonardis, Modeling and Design of an All-Optical Switch Based on Raman Effect in
Optimized Silicon-on-Insulator Waveguides, 4th IEEE/LEOS Workshop on Fibres and Opt. Passive
Components (WFOPC2005), pp. 281-286, Mondello (PA), 22-24 June 2005 (ISBN 0-7803-8949-2).
[17] . G. Masanovic, G.T. Reed, V.M.N. Passaro, W. Headley, B. Timotijevic, R. Atta, G. Ensell,
A.G.R. Evans, Efficient coupling from optical fibres to nanophotonic waveguides, 10th Europ. Conf.
on Networks and Opt. Communications (NOC2005), UCL, London (UK), 5-7 July 2005. [18] .
V.M.N. Passaro, F. De Leonardis, Modeling of Bidirectional Regime in Semiconductor Ring Lasers,
IEEE/LEOS 5th Int. Conf. on Num. Simulation of Optoelectronic Devices (NUSOD05) Proc.,
ThB2, pp. 115-116, Berlin, 19-22 September 2005 (ISBN 0-7803-9149-7). [19] . V.M.N. Passaro,
F. De Leonardis, Modeling and Simulation of a High Sensitivity E-Field Sensor based on Disk
Resonator and MOS Structure in SOI Technology, IEEE/LEOS 5th Int. Conf. on Num. Simulation
of Optoelectronic Devices (NUSOD05) Proc., WP20, pp. 105-106, Berlin, 19-22 September 2005
(ISBN 0-7803-9149-7). [20] . G.T. Reed, S.P. Chan, W.R. Headley, V.M.N. Passaro, B. Timotijevic,
Design Considerations for Devices based upon Small SOI Waveguides, IEEE 2nd Int. Conf. on
Group IV Photonics, FC5, pp. 198-200, Antwerp, Belgium, 21-23 September 2005 (INVITED
PAPER). [21] . V.M.N. Passaro, F. De Leonardis, Modeling and Design of a Novel High Sensitivity
Electric-Field SOI Sensor Based on a Whispering Gallery Mode Resonator, IEEE J. Sel. Top. in
Quantum Electron., vol. 12, n. 1, pp. 124-133, 2006. [22] . V.M.N. Passaro, G. Z. Masanovic,
Design of SiON-based grating-assisted vertical directional couplers, OSA Optics Express, vol. 14,
n. 3, pp. 1055-1063, 2006. [23] . V.M.N. Passaro, F. Magno, A. Rizzato, F. De Leonardis, Analysis
of VCSEL distributed Bragg reflectors by Floquet-Bloch Theory, Laser Physics, vol. 16, 2006.
[24] . V.M.N. Passaro, F. De Leonardis, Space-Time Modelling of Raman Pulses in Silicon-onInsulator Optical Waveguides, IEEE J. Lightwave Technol., vol. 24, 2006. [25] . F. Magno, F.
De Leonardis, V.M.N. Passaro, Investigation of Thermo-Optic Effect in SOI Waveguide Arrays, in
Integrated Optics, Silicon Photonics and Photonic Integrated Circuits (Photonics Europe), Proc.
SPIE.n. 6183, pp. 437-445, 3-6 April 2006. [26] . F. De Leonardis, F. Magno, A. Rizzato, V.M.N.
Passaro, Accurate Modelling of VCSEL Distributed Bragg Reflectors by Floquet-Bloch Theory, in
Semiconductor Lasers and Laser Dynamics II (Photonics Europe), Proc. SPIE n. 6184, pp. 585595, 3-6 April 2006. [27] . F. De Leonardis, V.M.N. Passaro, Modeling of an Optical Ring Resonator
Electric Field Sensor, XV Opt. Waveguide Theory and Num. Modelling Workshop (OWTNM06),
POLITECNICO DI BARI
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Varese, 19-22 April 2006. [28] . V.M.N. Passaro, F. Magno, A.V. Tsarev, Simulation of ThermoOptic Reconfigurable Optical Add-Drop Multiplexers in SOI Technology, XV Opt. Waveguide
Theory and Num. Modelling Workshop (OWTNM06), Varese, 19-22 April 2006. [29] . V.M.N.
Passaro, F. De Leonardis, All-Optical AND Gate based on Raman effect in Silicon-on-Insulator
Waveguide, XV Opt. Waveguide Theory and Num. Modelling Workshop (OWTNM06), Varese,
19-22 April 2006.
DESIGN, MODELING AND EXPERIMENTAL CHARACTERIZATION OF
DEVICES AND SYSTEMS FOR BIOMEDICAL APPLICATIONS
A. G. Perri, A. Giorgio, A. Convertino, R. Diana, S. Giusto, G. Gelao, F. Loiacono, A. Triggiani, S. Polito
The very significance and strongly useful CAD tools developed by our research group have been
oriented to the automatic, thermally optimized design of micro and nanoelectronic, multilayer
homojunction and eterojunction devices. Biomedical applications of micro and nanometers devices
has been a further target. The first object has been to design Photonic Band Gap (PBG) resonator
device useful for adrontherapy of cancer, due to the great amount of advantages the PBG materials
offer to design resonator free of higher order modes and wakefields. To this aim, by our significance
background and experience relevant to the solid state physics and to the modelling of micro and
nanometer, Si and GaAs/AlGaAs devices, a new model of PBG materials and devices has been
developed. The starting point is the analogy of the propagation characteristics in such materials
with the Schrodinger equation solution for the electron traveling in a periodic potential as Bloch
waves. The new model has been implemented in a very fast CAD tool in FORTRAN language. The
new model allows to quickly, completely and accurately characterize and design PBG based devices,
including also any kind of defects. A number of filtering and resonant devices have been designed
by using the GaAs/AlxOy and Si/SiO2 very promising technologies. Moreover, in the TEGAF
project by INFN, a two dimensional PBG resonator for adrontherapy of cancer, fabricated with
materials having very high refractive index contrast has been successfully designed, fabricated and
experimentally characterized, in collaboration with INFN of Naples, for the first time in Europe.
The state of the art about biopotential and biomembrane modeling, biomedical smart sensors
and not invasive impedance cardiography have been carried out with the aim to design a new
continuos, not invasive, healt monitoring electronic system. For this aim, we have designed a new
smart sensor for non-invasive bloods glucose monitoring, a wearable, wireless, long-term recording
electrocardiograph, improving the non-invasive diagnosis of cardiac deseases. Moreover a new
multisensor medical device for the non-invasive prevention and diagnosis of respiratory pathologies
by the 3-D auscultation of lung sounds has been designed, realized and characterized.
[1] A. Giorgio, A.G. Perri, A. Convertino: Un dispositivo intelligente per la prevenzione di patologie polmonari; DESIGN-IN, 2004, pp. 9 13. [2] A. Giorgio, D. Pasqua, A.G. Perri: Pho-
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POLITECNICO DI BARI
tonic Crystals: Operation Principles and Applications- seconda parte; LA COMUNICAZIONE,
Istituto Superiore delle Comunicazioni e delle Tecnologie dellInformazione, Rome, 2004, vol.LIII,
pp.173-190. [3] A. Giorgio, A. Convertino, A.G. Perri: Progetto e realizzazione di un dispositivo elettromedicale miniaturizzato per il monitoraggio non invasivo della saturazione in ossigeno
dellemoglobina nel sangue; LA COMUNICAZIONE, Istituto Superiore delle Comunicazioni e delle
Tecnologie dellInformazione, Rome, 2004, vol.LIII, pp.191-197. [4] A. Giorgio, A.G. Perri: An electrothermal solution of the heat equation for MMICs based on the 2-D Fourier series; Nanotech 2004
(The Nanotechnology Conference and Trade Show), Boston, USA, 7 11 march 2004. [5] A. Giorgio, R. Diana, A.G. Perri: A Method to Design DWDM Filters on Photonic Crystals; 11th IEEE
International Conference on Electronics, Circuits and Systems (ICECS 2004), Tel-Aviv, Israel, 13
15 December 2004. [6] A. Giorgio, R. Diana, A.G. Perri: Design of Waveguide Photonic Bandgap
Devices by using the Block-Floquet Theorem; 11th IEEE International Conference on Electronics,
Circuits and Systems (ICECS 2004), Tel-Aviv, Israel, 13 15 December 2004. [7] A. Giorgio,
R. Diana, A. Convertino, A.G. Perri: A Pressure Sensor and Microcontroller-based Medical Device for Preventing of the Acute Pulmonary Pathologies in Intensive Care; Asia Pacific Microwave
Conference (APMC 2004), New Delhi, 15 18 December 2004. [8] A. G. Perri, A. Giorgio, A.
Convertino, R. Diana, F. Loiacono: Patent n.2004000034 Sistema Universale di Monitoraggio delle
Attivit Vitali Umane e Dispositivi Dedicati [9] R. Diana, A. Giorgio, A.G. Perri: A new smart
sensor for non-invasive bloods glucose monitoring; X Conference of Associazione Italiana Sensori
e Microsistemi (AISEM 2005), Firenze, Italia, 15 17 Febbraio 2005. [10] F. Loiacono, A. Giorgio, A.G. Perri: A new multisensor medical device for the non-invasive prevention and diagnosis
of respiratory pathologies by the 3-D auscultation of lung sounds; X Conference of Associazione
Italiana Sensori e Microsistemi (AISEM 2005), Firenze, Italia, 15 17 Febbraio 2005. [11] A. Convertino, A. Giorgio, A.G. Perri: An innovative remote health monitorino system; X Conference of
Associazione Italiana Sensori e Microsistemi (AISEM 2005), Firenze, Italia, 15 17 Febbraio 2005.
[12] A. Convertino, A. Giorgio, A.G. Perri: A wearable, wireless, long-term recording electrocardiograph, improving the non-invasive diagnosis of cardiac deseases; X Conference of Associazione
Italiana Sensori e Microsistemi (AISEM 2005), Firenze, Italia, 15 17 Febbraio 2005. [13] G.
Gelao, A. Giorgio, A.G. Perri:, M. Quinto Multisensor continuous data acquisition in physical activity monitoring; X Conference of Associazione Italiana Sensori e Microsistemi (AISEM 2005),
Firenze, Italia, 15 17 Febbraio 2005. [14] G. Gelao, A. Giorgio, A.G. Perri, M. Quinto: A new
dilatation sensor for respiration rate measurements; X Conference of Associazione Italiana Sensori
e Microsistemi (AISEM 2005), Firenze, Italia, 15 17 Febbraio 2005. [15] R. Diana, A. Giorgio,
A.G. Perri: Theoretical Characterization of Multilayer Photonic Crystals having a 2D periodicity;
International Journal of Numerical Modelling, vol.18, 2005, pp.365 -382. [16] A. Giorgio, A.G.
Perri, A. Convertino: Patent n.2005000039 Sistema non invasivo di monitoraggio delle funzionalit
dellapparato respiratorio. [17] A. Giorgio, A. Convertino, A.G. Perri: AGLAIA: un dispositivo
elettromedicale per il rilievo dei suoni polmonari; LA COMUNICAZIONE, Istituto Superiore delle
POLITECNICO DI BARI
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Comunicazioni e delle Tecnologie dellInformazione, Roma, anno 2005, vol.LIV. [18] A.G. Perri, A.
Giorgio: I nanotubi di carbonio: caratterizzazione delle propriet elettroniche ed applicazioni; LA
COMUNICAZIONE, Istituto Superiore delle Comunicazioni e delle Tecnologie dellInformazione,
Roma, anno 2005, vol.LIV.
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BENEVENTO
BENEVENTO
Dipartimento di Ingegneria
Research topics
1) OPTOELECTRONIC DEVICES AND SENSORS
C. Ambrosino, S. Campopiano, P. Capoluongo, M. Consales, A. Cusano, A. Cutolo, A. Iadicicco,
V. Italia, G.V.Persiano, P. Pilla, M. Pisco
Collaborations: Università di Napoli ”Federico II”, Seconda Università di Napoli, IREA-CNR
Napoli, IMCB-CNR Napoli, ST Microelectronics, Alcatel, CIRA
BENEVENTO
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OPTOELECTRONIC DEVICES AND SENSORS
C. Ambrosino, S. Campopiano, P. Capoluongo, M. Consales,
A. Cusano, A. Cutolo, A. Iadicicco,
V. Italia, G.V.Persiano, P. Pilla, M. Pisco
The research activity is aimed at the design and development of fiber optic based sensors for
application in smart materials and structures and fiber optic based devices for telecommunication
aplications. Fiber Bragg grating optoelectronic sensors have been investigated for temperature and
strain measurements. A low cost, high efficient optoelectronic unit has been designed for sensors
interrogation. The same configuration properly combined with refractive index measurements capability provide an useful and powerful integrated sensing system able to perform process monitoring
during composites manufacturing, and structural health monitoring, later in service. Within this
framework, the SMART project is in progress (with: C.I.R.A., Dipartimento di Ingegneria (DING)
- Università degli Studi del Sannio, ITMC - CNR Napoli, DIET - Universit degli Studi di Napoli
Federico II). Furthermore, fiber Bragg grating are investigated and for optical modulators and for
optical true time delay lines useful for phased array antennas. Within this framework, the REST
project (in collaboration with STMicroelectronic and Alcatel) has been approved
[1] M.Giordano, M.Russo, A.Cusano, A.Cutolo, G.Mensitieri, L.Nicolais, ”An high sensitivity
optical sensors for chloroform vapours detection based on nanometric film of delta-form syndiotactic
polystyrene” Applied Physics Letters, Vol. 107, n. 1, 2005
[2] A.Iadicicco, A.Cusano, S.Campopiano, A.Cutolo, M.Giordano, ”Microstructured fiber Bragg
Gratings: Analysis and Fabrication” IEE Electronics Letters, Vol. 41, N. 8, April 2005.
[3] A.Iadicicco, A.Cusano, S.Campopiano, A.Cutolo, M.Giordano ”Refractive Index Senso rBasedon Micro-Structured Fiber Bragg Grating ” IEEE Photonics Technology Letters Vol. 17, n. 5,
2005.
[4] A. Cusano, P. Capoluongo, A. Laudati, M. Giordano, A. Cutolo ”Chirped Fiber Bragg Grating
as Self Temperature Referenced Strain Sensor in Non-Isothermal Thermoset Processing” IEEE
Sensors Journal, Volume 5, Issue 6, 2005.
[5] V. Italia, M. Pisco, S. Campopiano, A. Cusano, A. Cutolo ”Chirped Fiber Bragg Gratings for
Electrically Tunable Time Delay Lines” IEEE Journal of Selected Topics on Quantum Electronics,
Volume 11, Issue 2, March- April 2005 Page(s):408 - 416.
[6] M.Giordano, M.Russo, A.Cusano, A.Cutolo, G.Mensitieri, L.Nicolais ”An high sensitivity optical sensor for chloroform vapours detection based on nanometric film of delta-form syndiotactic
polystyrene” Sensors and Actuators B, Vol. 107, N. 1, 2005. [7] A. Iadicicco, S. Campopiano, A.
Cutolo, M. Giordano, A. Cutolo ”Non-Uniform Thinned Fiber Bragg Gratings for Simultaneous
Refractive Index and Temperature Measurements” IEEE Photonics Technology Letters, Vol. 17,
No. 7, pp. 1495-1497, July 2005
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BENEVENTO
[8] P. Pilla, A. Iadicicco, L. Contessa, S. Campopiano, A. Cutolo, M. Giordano, A. Cusano ”Optical
Chemo-Sensor based on Long Period Gratings coated with ? form Syndiotactic Polystyrene” IEEE
Photonics Technology Letters, Vol. 17, No. 8, 1713-1715, August 2005.
[9] A. Cusano, A. Iadicicco, P. Pilla, L. Contessa, S. Campopiano, A. Cutolo, M. Giordano
”Cladding Modes Re-Organization in High Refractive Index Coated Long Period Gratings: Effects on The Refractive Index Sensitivty” Optics Letters, Vol. 30, No. 19, October 1, 2005.
[10] A. Cusano, A. Iadicicco, S. Campopiano, M. Giordano, A. Cutolo ”Thinned and MicroStructured Fiber Bragg Gratings: Towards New All Fiber High Sensitivity Chemical Sensors”
Journal of Optics A: Pure and Applied Optics Vol. 7, pp. 734-741, 2005.
[11] A. Cusano, P. Pilla, L. Contessa, A. Iadicicco, S. Campopiano, A. Cutolo, M. Giordano ”High
Sensitivity Optical Chemo-Sensor Based on Coated Long Period Gratings for Sub ppm Chemical
Detection in Water” Applied Physic Letters, Vol. 87, No. 1, 2005.
BOLOGNA
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BOLOGNA
Dipartimento di Elettronica Informatica e Sistemistica
Research topics
1) DESIGN OF AN INTEGRATED ELECTRONIC NOSE IN CMOS TECHNOLOGY
A. Leonardi, D. Donato, M. Rudan
2) CMOS CIRCUITS FOR RF WIRELESS APPLICATIONS
G.Baccarani, A.Gnudi, E.Franchi, D. Guermandi, R. Gaddi, P.Tortori, S.Vitali
Collaborations: (FIRB 2003-2006) Enabling technologies for wireless reconfigurable terminals
3) RF-MEMS FOR WIRELESS APPLICATIONS
G. Baccarani, M. Bellei, L. Del Tin, R. Gaddi, A. Gnudi, E. Franchi, J. Iannacci
Collaborations: (FIRB 2003-2006) Enabling technologies for wireless reconfigurable terminals
4) PHYSICAL MODELS AT LARGE OPERATING TEMPERATURES
E. Gnani, S. Reggiani, M. Rudan, G. Baccarani
Collaborations: European project IST- 2000-30033 “DEMAND”. Partners: Univ. of Bologna,Swiss
Federal Institute of Technology Zurich, ISE, Infineon
5) PHYSICAL PROPERTIES AND INTERFACING OF SINGLE-ELECTRON DEVICES FOR QUANTUM COMPUTING
A. Marchi, S. Reggiani, A. Bertoni, M. Rudan, G. Baccarani
Collaborations: Universita’ di Modena e Reggio Emilia
6) MODELING OF NANOMETRIC SILICON AND CARBON NANOTUBE DEVICES
A. Marchi, E. Gnani, S. Reggiani, M. Rudan, G. Baccarani
7) WAVELET-BASED ALGORITHMS AND SYSTEMS FOR FILTERING LOW
SNR SIGNALS
E. Baravelli, L. De Marchi, F. Franz è, M. Montani, N. Speciale, N. Testoni, S. Graffi, G. Masetti
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BOLOGNA
8) ADVANCED DIGITAL SYSTEMS
B. Riccó, L. Benini, A. Acquaviva, D. Bertozzi, E. Farella
Collaborations: ST Microelectronics, SUN Microsystems, Hewlett-Packard, Philiphs, Stanford University, University of Cagliari, University of Verona, University of Urbino, University of Rome, LIP6
Laboratory of Paris, Penn State University (USA), IMEC (Belgium), Infineon Technologies, Department of Biochemistry of University of Bologna, INPG Grenoble, Clinical and Biological Sciences
Department of University of Torino
9) FAULT TOLERANT APPROACHES FOR VERY DEEP SUBMICRON HIGH
PERFORMANCE SYSTEMS
C. Metra, M. Cazeaux, M. Omaña, D. Rossi
Collaborations: Intel Corporation (Santa Clara, CA), Philips Research Labs. (Eindhoven, The
Netherlands), ST Microelectronics (Agrate, Italy), iRoC Technologies (Grenoble, France)
Other sources of funding: European Commission
10) DESIGN FOR TESTABILITY TECHNIQUES FOR HIGH PEFORMANCE MICROPROCESSORS
C. Metra, J. M. Cazeaux, M. Omaña, D. Rossi
Collaborations: Intel Corporation (Santa Clara, CA)
11) MODELING OF DISPERSIVE EFFECTS IN III-V ELECTRON DEVICES
F.Filicori, A.Santarelli, R.Paganelli, I.Melczarsky, D.Resca
Collaborations: IEIIT-CNR Bologna. Università di Ferrara. MEC s.r.l., Bologna, Coritel,Ericsson,
Milano.
12) NONLINEAR MODELING OF MICROWAVE ELECTRON DEVICES
V.A.Monaco, F.Filicori, A.Santarelli, P.Traverso, R.Paganelli, D.Resca
Collaborations: IEIIT-CNR Bologna. Università di Ferrara. MEC s.r.l., Bologna. Coritel,Ericsson,
Milano
13) HIGHLY LINEAR POWER AMPLIFIER DESIGN
V.A.Monaco, F.Filicori, A.Santarelli, R.Paganelli, C.Florian
Collaborations: IEIIT-CNR Bologna. Università di Ferrara. MEC s.r.l., Bologna. Coritel,Ericsson,
Milano. ASI
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14) NONLINEAR NOISE MODELING OF ELECTRON DEVICES AND LOWPHASE NOISE OSCILLATOR DESIGN
V.A.Monaco, F.Filicori, A.Santarelli, R.Paganelli, C.Florian, R.Cignani
Collaborations: IEIIT-CNR Bologna. Università di Ferrara. SIAE Microelettronica, Milano. UMS,
Orsay, France. ASI, WIN Semiconductors
Other sources of funding: MIUR, CNR
15) SAMPLING DIGITAL INSTRUMENTS AND CHARACTERIZATION OF A/D
CONVERTERS
F.Filicori, D.Mirri, P.Traverso
Collaborations: Dipartimento di Ingegneria Elettrica, Università di Bologna. Dipartimento di
Ingegneria Elettrica, Università di Firenze. Università di Ferrara.
16) POWER CONVERTER DESIGN FOR AC MOTOR DRIVES AND AUTOMOTIVE APPLICATIONS
F.Filicori, A.Santarelli, P.Traverso
Collaborations: Università di Parma. DIEM, Università di Bologna. Università di Ferrara.
Area: Power Electronics and Industrial Applications
17) CAPACITIVE SENSORS FOR FLUID DYNAMICS APPLICATIONS
M. Tartagni, E. Sangiorgi, S. Callegari, M. Zagnoni, A. Golfarelli, R. Codeluppi
Collaborations: DIEM, Universit di Bologna
Other sources of funding: Fondazione della Cassa dei Risparmi di Forl
18) LABEL-FREE BIOMOLECULAR DETECTORS: AT THE CONVERGENCE OF
BIOENGINEERED RECEPTORS AND MICROELECTRONICS
M. Tartagni, E. Sangiorgi, S. Callegari, M. Zagnoni, A. Golfarelli
Collaborations: Silicon Biosystems, s.r.l. (IT); Laboratoire d’Electronique de Technologie de
l’Information at the Commissariat l’Energie Atomique, LETI/CEA, (FR); Direction des Sciences
du Vivant, at the Commissariat l’Energie Atomique DSV/CEA, (FR); Centre National de la
Recherque Scientifique, CNRS, Grenoble (FR); School of Electronics, University of Southampton
(UK); School of Chemistry, University of Southampton (UK); National Kapodistrian University of
Athens, Department of Chemistry (GR)
Other sources of funding: Fondazione della Cassa dei Risparmi di Forl; from 2005 EU FP6-2004IST-NMP-2I
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19) SENSOR APPARATUSES AND INFORMATION PROCESSING TECHNIQUES
FOR AIR-DATA SYSTEMS
S. Callegari, A. Golfarelli, M. Zagnoni, M. Tartagni
Collaborations: DIEM, University of Bologna; DIA, University of Pisa
20) EXPLOITATION OF CHAOTIC DYNAMICS FOR TRUE RANDOM BIT GENERATION AND APPLICATION TO CRYPTOGRAPHICAL KEY GENERATION
R. Rovatti, G. Setti, S. Callegari, F. Pareschi
Collaborations: ENDIF Universit di Ferrara
21) STOCHASTIC MODULATION OF PERIODIC SIGNALS FOR ENHANCED
EMC
R. Rovatti, G. Setti, S. Santi, L. De Michele
22) OVERSAMPLED LOW-DEPTH CODING OF SIGNALS FOR CONVERSION
AND ACTUATION
R. Rovatti, G. Setti, S. Santi
23) EXPLOITATION OF CHAOTIC DYNAMICS IN FUTURE GENERATION DSCDMA SYSTEMS
R. Rovatti, G. Setti, G. Mazzini, G. Cimatti, S. Vitali
24) HIGH-LEVEL MULTI-STANDARD SIMULATION OF RF FRONT-END ARCHITECTURES
R. Rovatti, S. Vitali, F. Agnelli
Collaborations: DIE Universit di Pavia
BOLOGNA
31
DESIGN OF AN INTEGRATED ELECTRONIC NOSE IN CMOS TECHNOLOGY
A. Leonardi, D. Donato, M. Rudan
The subject of this research is the development of an electronic nose in CMOS technology. The main
interest for this project is the chance to achieve a low-cost, portable system, suited to consumer
market.
Integration of an e-nose system on a chip requires to realize silicon micro-sensors and circuitry with
compatible technologies. Silicon micro-machining and deposition of polymer membranes are effective means to obtain miniaturized chemical sensors for volatile compounds, with a post-processing
of CMOS wafers fabricated in a standard way. The electronic circuitry needed for acquisition and
processing of the sensors’ signals can thus be realized in the early stage of the process, with all the
advantages of a fully standard, low-cost CMOS technology.
The performance of the sensors is critical for the applicability of the e-nose to certain fields of operation. Moreover, the constraints imposed by the CMOS standard technology to the fabrication make
the problem of the sensors’ performance. Device-level simulation is a necessary tool for investigating ways to improve the sensors’ performance and eliminate operation problems. This technique
has been used in particular to investigate the cross-talk immunity of a gravimetric chemical sensor
for volatile organic compounds in air, in which a polymer film is cast on top of a resonant silicon
cantilever obtained by silicon micro-machining. Experiments carried out at ETHZ (Zurich) show
that this problem seriously affects the detection of the sensor signal and may inhibit the device
operation in a self-oscillating mode. The simulations have characterized the cause of crosstalk in
the original design of the sensor and optimized the sensor design, with the aim of improving the
performance in terms of sensitivity and dynamic range.
The ultimate task of an electronic nose is to identify an odorant sample and to estimate its concentration. To this end the digitized output of the individual micro-sensors are fed into a patternrecognition system (PARC), which have been implemented using a standard micro-controller.
The action of any PARC system can be subdivided into four sequential stages: preprocessing,
feature extraction, classification and decision making. Extensive testing has been done on each
stage using standard PARC techniques: normalization of sensor responses ranges and compression
of sensor transients for the preprocessing stage, principal component analysis and whitening transformations for the feature extraction stage, non-parametric statistical and neural-network based
approaches for the classification stage, fuzzy logic based techniques for the decision making stage.
A new method to estimate the concentration of samples acquired by means of nonlinear sensors has
been investigated. The procedure of cluster translation proposed appears to provide an effective
means for the design of a modified N-N classifier able to deal with incomplete reference data. The
approach assumes a monotonic trend of the sensor responses and propagates to clusters of unknown
concentration the pattern with which the feature points scatter around known concentrations. The
improvement experienced with real data sets seems to support the idea that such scattering is
statistically correlated with the characteristic of the sensors, so that its knowledge may complete
the poorer information given by monotonic responses.
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BOLOGNA
Recent developments of this activity have been the fabrication of a dedicated equipment for realizing
a controlled atmosphere in which the measurements will be performed.
CMOS CIRCUITS FOR RF WIRELESS APPLICATIONS
G.Baccarani, A.Gnudi, E.Franchi, D.Guermandi, R.Gaddi, P.Tortori, S.Vitali
Within the context of a national project addressed to the study, conception and realization of
a reconfigurable platform embodying the mobile-telecommunications terminal of the future, this
activity is mainly involved in the design of the frequency synthesizer and it is carried out in cooperation with University of Pavia and STMicroelectronics. The research will specifically address
the impact of the transceiver reconfigurability on the synthesizer specs. Among these, the VCO
channel frequencies, the phase noise and the power dissipation deserve special attention.
A quadrature VCO with ±50% continuous 0.83-2.5 GHz tuning range has been demonstrated. It
is based on a core LC-QVCO with ±20% tuning range, a single-sideband mixer (SSBM), two frequency dividers and a multiplexer arranged in a feedback loop. The core LC-QVCO, based on a
prototype built during the previous year, features two LC-VCO’s locked in quadrature by means
of second harmonic signal injection. The circuit has been implemented in a 0.13 µm 1.2 V CMOS
technology. The additional area with respect to the core LC-QVCO is 100 µm x 100 µm. Quadrature error is less than 2o , phase noise less than -120 dBc/Hz @ 1 MHz and it is mainly due to the
core QVCO. Spurs are more than 30 dB below the fundamental.
The previously described high-tuning range VCO has been embedded in a full fractional frequency
synthesizer, designed in cooperation with the STMicroelectronics group in Pavia. Such synthesizer
is intended to operate as the local oscillator of the receiver chain of a multistandard radio for cellular telephone systems plus Bluetooth. The standard fractional architecture has been complemented
with suitable techniques for the compensation of the high-frequency quantization noise generated
by the Σ∆ modulator, and with linearization techniques of the different building blocks for the
reduction of fractional noise folding to low-frequency offset from the carrier. The synthesizer is in
the process of being integrated within the complete receiver chain, including the RF front-end, the
analog baseband filters and the ADC.
A methodology for the calibration of the quadrature/gain mismatch errors for I/Q downconverters
has been developed and demonstrated by means of simulations. The method does not make use
of an additional oscillator, besides the local oscillator, as is the case in state-of-the-art schemes.
Instead, it calculates the mismatch errors through the measurements of the DC voltages obtained
by combining the I/Q LO signals at the mixer output in different configurations. A prototype chip
has been fabricated and will be tested soon.
BOLOGNA
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[1] D. Guermandi, P. Tortori, E. Franchi, A. Gnudi, A 0.75-2.2 GHz continuously tunable quadrature VCO, Proceedings of IEEE-ISSCC 2005 (International Solid State Circuit Conference 2005),
San Francisco, CA, USA, February 6-10, 2005 [2] S. Vitali, E. Franchi, A. Gnudi, A gain/phase mismatch calibration procedure for RF I/Q downconverters, Proceedings of ISCAS 2005, Kobe, Japan,
May 23-26 2005, pp. 2108-2111 [3] D. Guermandi, E. Franchi, A. Gnudi, P. Rossi, F. Svelto,
R. Castello, A 2V 0.35µm CMOS DECT RF front-end with on-chip frequency synthesizer, Proceedings of SPIE European International Symposium on Microtechnologies for the New Milleniunm
2005, Seville, Spain, May 9-11 2005 [4] D. Guermandi, P. Tortori, E. Franchi, A. Gnudi, A 0.832.5-GHz continuously tunable quadrature VCO, IEEE Journal of Solid-State Circuits, vol. 40, no.
12, pp. 2620-2627, 2005
RF-MEMS FOR WIRELESS APPLICATIONS
G. Baccarani, M. Bellei, L. Del Tin, R. Gaddi, A. Gnudi, E. Franchi, J. Iannacci
The research aims at investigating microelectromechanical systems (MEMS) suitable for applications within reconfigurable wireless RF front-ends. Alternative types of devices differ in terms
of level of design complexity and manufacturing issues: i) passive elements, such as inductors
and capacitors, fabricated in MEMS technology allowing for high Q factor, ii) microswitches and
variable capacitors (varactors), reaching improved tuning ratios and lower losses compared to traditional microelectronic implementations, iii) high-Q MEMS resonators, based on self-resonance
modes of micromechanical systems. The activity covers all aspects of RF-MEMS design, including
fabrication and testing. Design efforts are aimed at reconfigurable MEMS-CMOS circuit blocks,
such as RF oscillators or matching networks. MEMS model libraries based on HDL language are
developed within IC simulation frameworks such as Cadence. Detailed multi-physics modelling
based on Finite Element Methods leads to the final device realisation, through standard surface
micromachining fabrication techniques.
[1] V. Rizzoli, R. Gaddi, J. Iannacci, D. Masotti, F. Mastri, Multitone intermodulation and RF
stability analysis of MEMS switching circuits by a globally convergent harmonic-balance technique,
Proceedings of the European Microwave Association, Vol. 1, Issue 1, March 2005, pp. 45-54. [2] J.
Iannacci, L. Del Tin, M. Bellei, R. Gaddi, A. Gnudi, B. Margesin, F. Giacomozzi, Radiofrequency
transient behaviour of ohmic RF-MEMS switches, Proceedings of the 10th Italian Conference Sensors and Microsystems (AISEM 2005), Firenze, IT, 15-17 February 2005. [3] R. Gaddi, A. Gnudi,
M. Bellei, B. Margesin and F. Giacomozzi, RF-MEMS switching LC-tank network for multiband
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VCO, Proceedings of the 2005 NSTI Nanotechnology Conference and Trade Show Nanotech 2005,
Vol. 3, pp.451-454, Anaheim, CA, USA, 8-12 May 2005. [4] R. Gaddi, A. Gnudi, M. Bellei,
B. Margesin, F. Giacomozzi, RF-MEMS tunable networks for VCO applications, Proceedings of
Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS (DTIP 2005), pp. 3237, Montreux, Switzerland, 01-03 June 2005 [5] J. Iannacci, L. Del Tin, R. Gaddi, A. Gnudi, K.
J. Rangra, Compact modeling of a MEMS toggle-switch based on modified nodal analysis, Proceedings of Symposium on Design, Test, Integration and Packaging of MEMS/MOEMS (DTIP
2005), pp. 411-416, Montreux, Switzerland, 01-03 June 2005 [6] R. Gaddi, A. Gnudi, E. Franchi,
D. Guermandi, P. Tortori, B. Margesin, F. Giacomozzi, Reconfigurable MEMS-enabled LC-tank
for Multi-Band CMOS Oscillator, IEEE MTT-S 2005 International Microwave Symposium Digest
(IMS2005), Long Beach, CA, USA, 12-17 June 2005. [7] R. Gaddi, A. Gnudi, A. Tazzoli, G.
Meneghesso, E. Zanoni, Reliability of RF-MEMS, 13th Gallium Arsenide and other Compound
Semiconductors Application Symposium (GAAS 2005), pp. 269-272, Paris, France, 3-4 October
2005.
PHYSICAL MODELS AT LARGE OPERATING TEMPERATURES
E. Gnani, S. Reggiani, M. Rudan, G. Baccarani
This research activity is related to the physics and numerical analysis of semiconductor devices. In
particular, impact-ionization and mobility have been investigated in a broad temperature range,
from 25 to 700 C. Impact-ionization in semiconductors is a charge-generation mechanism that
limits device operation under high electric fields. The temperature dependence of the impactionization coefficients is an important issue, in particular for the modeling of electrostatic discharge
(ESD) phenomena, which are becoming a major yield and reliability constraint for integratedcircuit components. On-chip ESD protection circuits must operate under extreme conditions, in
particular because current filamentation and local heating —up to the silicon melting— may occur
during second breakdown. Hence, validated physical models at large operating temperatures are
necessary. A compact model for both electron and hole impact-ionization coefficients was worked
out and implemented in the device simulator DESSIS by means of the PMI tool. The model
was developed basing on the results of the Boltzmann solver HARM, which provides the energydistribution function of the carriers within the silicon material in a wide range of temperatures and
fields. This allows one to extend the validity of the model, with respect to traditional models, to
a broader range of temperatures (77 < T < 1000 K), and electric fields (50 < F < 600 KV/cm).
The compact model nicely fits the predictions of the numerical solution provided by HARM, and
shows good agreement with the electron impact-ionization coefficient extracted from experimental
data up to 650 K. The devices for the measurement of the multiplication coefficient have been
designed as modifications of standard structures within Infineon’s Smart-Power SPT5 technology
for automotive applications. A VDMOS (Vertical DMOS) and a SIT (Static Induction Transistor),
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suited for the extraction of the multiplication factor at relatively low electric fields, have been
adopted. The setup for the extraction of the impact-ionization multiplication factor in silicon
as a function of the electric field on an extended range of temperatures, up to 800 K, has been
addressed, and an optimization procedure based on the numerical simulation of the devices under
study has been defined. As far as the mobilty investigation is concerned, a new analytical model
for carrier mobility in silicon was proposed, which is strongly oriented to numerical simulation
and suitable for implementation in device simulators. Starting from the investigations on bulk
and inversion-layer mobilities carried out by Masetti and Lombardi, a new physically-based model
has been developed and validated with experiments. An extended range of operating conditions
have been investigated. The compact model has been worked out as a “local” and continuous
function, this meaning that the model is defined in terms of variables given at each grid point in
a device simulator. The model is consistent with any operating condition and/or semiconductor
region. The validation of the mobility model at very high temperatures will be carried out in the
frame of an experimental investigation on circular van der Pauw patterns, suitable for resistivity
and Hall measurements. As several devices, that are under investigation for implementing and
calibrating the physical models at high operating temperatures and transient high current stress,
exhibit geometrical features that do not allow for the application of the elementary Hall theory, a
more general calculation has been carried out, that leads to the determination of the Hall voltage
as a function of the position along the longitudinal direction in devices like, e. g., linear resistors or
MOSFETs. The activity is currently carried out in cooperation with Infineon, which is fabricating
the test-structures, the Technical University of Vienna, and ETHZ. The latter, in particular, carried
the out high-temperature measurements.
[1] S. Reggiani, E. Gnani, M. Rudan, G. Baccarani, C. Corvasce, D. Barlini, M. Ciappa, W. Fichtner, M. Denison, N. Jensen, G. Groos, M. Stecher, “Measurement and modeling of the electron
impact-ionization coefficient in silicon up to very high temperatures”,— ieee Trans. on Electron
Devices, vol. 52, p. 2290–2299, 2005 [2] S. Reggiani, E. Gnani, M. Rudan, G. Baccarani, S. Bychikhin, J. Kuzmik, D. Pogany, E. Gornik, M. Denison, N. Jensen, G. Groos, M. Stecher, , “A
New Numerical and Experimental Analysis Tool for ESD Devices by Means of the Transient Interferometric Technique”,— ieee Electron Device Letters, vol. 26, p. 916–918, 2005. [3] M. Rudan,
S. Reggiani, E. Gnani, G. Baccarani, C. Corvasce, D. Barlini, M. Ciappa, W. Fichtner, M. Denison, N. Jensen, G. Groos, M. Stecher, “Experimental validation of a new analytical model for the
position-dependent Hall voltage in semiconductor devices”, Proc. of the essderc Conference 2005,
Grenoble, p. 565–568, 2005. [4] S. Reggiani, E. Gnani, M. Rudan, G. Baccarani, S. Bychikhin,
J. Kuzmik, D. Pogany, E. Gornik, M. Denison, N. Jensen, G. Groos, M. Stecher, “Predictive device
simulation for ESD protection structures validated with transient interferometric thermal-mapping
experiments”, Proc. of the essderc Conference 2005, Grenoble, p. 411–414, 2005.
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PHYSICAL PROPERTIES AND INTERFACING OF SINGLE-ELECTRON
DEVICES FOR QUANTUM COMPUTING
A. Marchi, S. Reggiani, A. Bertoni, M. Rudan, G. Baccarani
Over the last decade, considerable interest has developed in the application of quantum theory
to few-particle systems. Moreover, it is now possible to fabricate very sophisticated semiconductor
devices in which quantum effects play a dominant role. One aspect of this fundamental research is
Quantum Computation: basing on the principles of Quantum Mechanics, it makes the solution conceptually possible for a number of problems that are intractable by classical algorithms. Interesting
and promising ideas for applications of quantum-information processing have started to develop
in the field of cryptography; in particular, a quantum computer could perform the factorization
of large integers in a time that depends polynomially, instead of exponentially, on the integers’
magnitude. At present a number of experiments have succesfully been undertaken on different
physical systems, i.e., NMR spectroscopy and cold trapped ions, proving the physical feasibility of
very simple prototypes.
Qbits, two-state quantum systems, represent the elementary unit of quantum information. The
choice of the individual quantum system is crucial: as solid-state system would be compatible with
the traditional Microelectronics technology, it is sensible to incorporate within a classical computer
an integrated coprocessor executing quantum algorithms. As the use of quantum-computing systems at room temperature involves the study of the heat-bath interaction, a suitable solution for
the resulting dechoerence problems has been developed.
The proposed solid-state physical system is based on coherent electron propagation in coupled
quantum wires. The state of the qubit, represented by the charge localization of a single electron,
can be controlled by a proper design of the system. The Coulomb interaction between two electrons
realizes the two-qubit transformation. A prototype of the proposed system can be obtained by
means of electrostatically-confined single and coupled quantum wires realized within a high-mobility
two-dimensional electron gas at a GaAs/AlGaAs heterointerface. The one-dimensional channels are
formed by the potential created by suitably-biased surface electrodes. This system needs to operate
at very low temperature in order to minimize decoherence due to the interactions of the electrons
with lattice vibrations. Simulation of coherent electron propagation in such a realistic structure
has shown that the desired functioning of a single-qubit quantum computing gate can be achieved
by the heterostructure at hand.
Moreover, if the domain of the device where carriers are confined is curved, the physical modeling
can be addressed through a limiting procedure that leads to a 2D Schrödinger-like dynamic equation
with an additional potential depending on the local curvature of the space where carriers are
confined. We have analyzed how the topology of the domain is able to influence the quantum
transmission characteristics, this suggesting that topological effects have to be taken into account
in order to properly model the quantum-transport properties of surface states in nanosystems.
[1] A. Marchi, A. Bertoni, S. Reggiani, M. Rudan, “Coherent electron transport in bent cylindrical
surfaces”, Physical Review. B, Condensed Matter And Materials Physics. vol. 72, pp. 35403-1–
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35403-10, 2005. [2] A. Marchi, A. Bertoni, S. Reggiani, M. Rudan, “Coherent surface transport in
cylindrical nanosystems”, Book of Abstracts of the International Conference on Quantum Transport
2005 (QT2005), Bologna, vol. 1, pp. 27, 2005. [3] A. Marchi, A. Bertoni, S. Reggiani, M. Rudan,
“Numerical simulation of ballistic surface transport in cylindrical nanosystems”, Book of Abstracts
of the 15th Workshop on Modelling and Simulation of Electron Devices (MSED 2005), vol. 1 pp.
103–104, 2005.
MODELING OF NANOMETRIC SILICON AND CARBON NANOTUBE
DEVICES
A. Marchi, E Gnani, S. Reggiani, M. Rudan, G. Baccarani
The microelectronic industry has relied on shrinking transistor geometries for improvements in
circuit performance and cost per function over three decades. Continued transistor scaling will not
be as straightforward in the future as it has been in the past, because fundamental materials and
process limits are rapidly being approached in the bulk Si-CMOS technology.
Innovative device structures and new materials are needed to continue improving the device performance. Non-classical silicon MOS structures, such as ultra-thin-body single-gate or multi-gate
transistors, can be scaled more aggressively than the bulk-Si structure, and may thus be considered
in future technology nodes. Moreover, the silicon-based technology will eventually reach its limits,
and alternative concepts will become necessary in order to continue improving the density and performance of electronic devices. Among the new materials under investigation, carbon nanotubes
(CNTs) have emerged as promising candidates for nanoscale electronics.
The activity is focused on the performance analysis of silicon- and CNT-based devices at their extreme miniaturization limits. To this purpose, we have developed a number of coupled SchrödingerPoisson solvers that allow us to investigate and compare the performances of nanoscale FETs with
various gate-geometry configurations and channel materials. Accounting for quantum-mechanical
effects is essential for a realistic prediction of the device on-current and transconductance at the
feature sizes of the investigated devices.
[1] M. Rudan, E. Gnani, S. Reggiani, G. Baccarani, “A Coherent Extension of the Transport Equations in Semiconductors Incorporating the Quantum Correction Part I - Single-Particle
Dynamics”,— IEEE Transactions on NanoTechnology, vol. 4, p. 495–502, 2005. [2] M. Rudan,
S. Reggiani, E. Gnani, G. Baccarani, “A Coherent Extension of the Transport Equations in Semiconductors Incorporating the Quantum Correction Part II - Collective Transport”,— IEEE Transactions on NanoTechnology, vol. 4, p. 503–509, 2005. [3] E. Gnani, S. Reggiani, M. Rudan,
G. Baccarani, “On the Electrostatics of Double-Gate and Cylindrical Nanowire MOSFETs”,—
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Journal of Computational Electronics, vol. 4, p. 71–74, 2005. [4] A. Marchi, E. Gnani, S. Reggiani,
M. Rudan, G. Baccarani, “Investigating the performance limits of silicon-nanowire and carbonnanotube FETs”, Proc. of the 6th International Conference on Ultimate Integration of Silicon (ULIS
2005), Bologna, 2005. [5] E. Gnani, S. Reggiani, M. Rudan, G. Baccarani, “A quantum mechanical
analysis of the electrostatics in multiple-gate FETs”, Proc. of the sispad Conference 2005, Tokyo,
p. 291–294, 2005. [6] E. Gnani, A. Marchi, S. Reggiani, M. Rudan, G. Baccarani, “Quantummechanical analysis of the electrostatics in silicon-nanowire and carbon-nanotube FETs”, Proc. of
the essderc Conference 2005, Grenoble, p. 161–164, 2005. [7] M. Rudan, A. Marchi, R. Brunetti,
S. Reggiani, E. Gnani, “The R-Sigma Approach to Tunneling in Nanoscale Devices”, Proc. of the
14th International Conference on Nonequilibrium Carrier Dynamics in Semiconductors (HCIS-14),
Chicago, p. 45–46, 2005. [8] M. Rudan, “The R-Σ Method for Nanoscale-Device Analysis” (Plenary invited), Proc. of the sispad Conference 2005, Tokyo, p. 13–18, 2005. [9] A. Marchi, S. Reggiani, M. Rudan, G. Baccarani, “A Schrödinger-Poisson Solution of CNT-FET Arrays”, Proc. of
the sispad Conference 2005, Tokyo, p. 83–86, 2005. [10] F. Affinito, A. Bigiani, R. Brunetti,
P. Carloni, C. Jacoboni, E. Piccinini, M. Rudan, “A Simulative Model for the Analysis of Conduction Properties of Ion Channels Based on First-Principle Approaches”, Journal of Computational
Electronics, vol. 4, p. 171–174, 2005. [11] F. Affinito, E. Piccinini, A. Bigiani, R. Brunetti,
C. Jacoboni, M. Rudan, “Noise Properties of Single Open Ion Channels: an Atomistic Computational Approach”, Proc. of the Fourth International Conference on Unsolved Problems of Noise and
Fluctuations in Physics, Biology and High Technology (UPoN 2005), p. 388–393, American Inst.
of Physics ISBN 0-7354-0289-2, Gallipoli, Italy, 2005. [12] E. Piccinini, F. Affinito, R. Brunetti,
C. Jacoboni, M. Rudan, “Physical Mechanisms for Ion-Current Levelling off in the KcsA Channel
through Combined Monte Carlo/Molecular Dynamics Simulations”, Proc. of the 14th International
Conference on Nonequilibrium Carrier Dynamics in Semiconductors (HCIS-14), p. 15–16, 2005.
[13] R. Katilius, S. Reggiani, M. Rudan, “Current Fluctuations in Degenerate Non-Equilibrium
Systems”, Proc. of the 18th International Conference on Noise and Fluctuations (ICNF 2005),
American Institute of Physics, Melville ISBN 0-7354-0267-1, p. 29–32, Salamanca, Spain, 2005.
WAVELET-BASED BIOLOGICAL SIGNAL PROCESSING
E. Baravelli, S. Caporale, L. De Marchi, M. Montani, A. Palladini, N. Speciale, N. Testoni, G. Masetti
Echographic diagnosis methods are receiving increasing attention in modern medical procedures.
This is due to the absence of radiation use and their non invasive feature. Ultrasound (US) tissue
analysis is relatively inexpensive, but US scans are often difficult to interpret: as a matter of fact,
results of diagnostics using conventional B-mode images are highly dependent on the physician’s
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skills. In fact, one of the major limitation on US image quality is reduced resolution due to both
the effect of limited effective aperture size and noise. Moreover, since the US transducer introduces
an unwanted spectral shaping of the backscattered echo signal, deconvolution is used to eliminate
this effect and to obtain the pure tissue response.
To obtain instruments capable of real-time discrimination and classification of the tissues under
test, the reduction of computational load is mandatory, so specific properties of the US echo must
be taken into account. Since signals of interest are nonstationary, the noise term must be assumed
nonstationary as well and a time-frequency projection is supposed to be suitable for the analysis.
Wavelet analysis decomposes a signal into channels that have the same bandwidth on a logaritmic
scale: high frequency channels have wide bandwidth and low frequency channels have narrow
bandwidth. These characteristics are used in order to efficiently represent the signal in the Wavelet
domain, which means that fewer transform-domain coefficients are needed to capture signal features.
As a matter of fact, a linear relationship between the Wavelet scale and the logarithm of the variance
of input signal Wavelet coefficients exists, and can be exploited to improve the estimate of the tissue
response. Moreover, wavelet analysis can be implemented in a very intuitive and flexible way, using
a modest amount of computational resources, thus being an enabling technology for the design of
real-time Biological Signal Processing (BSP) algorithms.
During our research activity, we made a comparative study between two algorithms for signal
deconvolution, one of them based upon the minimization of an error energy term defined in the
Wavelet domain, the other performing a two-step regularization procedure on both the Fourier
and Wavelet domain. Algorithm effects on synthetic signals have been described in terms of Signal to Noise Ratio (SNR) and Mean Square Error (MSE). Furthermore, we estimated algorithm
computational costs and applied them to both in-vivo and in-vitro B-mode US images. Finally,
the image quality improvement due to deconvolution was estimated both numerically and visually,
respectively by computing the lateral and axial resolution gain by evaluating background noise
smoothing and edge sharpness enhancement.
Analyzing these algorithms we obtained fundamental data about performance constraints as
compared to image quality enhancement, which we used to design an optimized Wavelet-based
algorithm for signal deconvolution, which makes use of the US signal model both in the estimate
of the US transducer impulse response and in the properly said deconvolution phase.
[1] N. Testoni, L. De Marchi, N. Speciale, G. Masetti “Real-Time Classification Methods for
Biological Tissues?? Proc. of 2004 Intern. Symp. On Nonl. Th. and Appl. pp.537-540, Nov.29Dec.3, 2004, Fukuoka, Japan
[2] S. Maggio, N. Testoni, L De Marchi, N. Speciale, G. Masetti Wavelet-based Deconvolution
Algorithms Applied to Ultrasound Images, Proceedings of ISCGAV 2005 ), Malta, September 1517, 2005.
[3] S. Maggio, N. Testoni, L De Marchi, N. Speciale, G. Masetti Ultrasound Images Enhancement
by means of Deconvolution Algorithms in the Wavelet Domain, WSEAS Transactions on Systems
vol 4 no 11 November 2005 pp. 1958-1965.
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ADVANCED DIGITAL SYSTEMS
B. Riccó, L. Benini, A. Acquaviva, D. Bertozzi
PEOPLE:
Andrea Acquaviva RU [email protected]
Federico Angiolini AL [email protected]
Luca Benini PA [email protected]
Davide Bertozzi RU [email protected]
Davide Brunelli DR [email protected]
Elisabetta Farella DR [email protected]
Elisa Ficarra DR [email protected]
Carlotta Guiducci DR [email protected]
Mirko Loghi DR [email protected]
Daniele Masotti DR [email protected]
Christine Nardini DR [email protected]
Francesco Poletti DR [email protected]
Claudio Stagni DR [email protected]
Research topic: NETWORK-ON-CHIP ARCHITECTURES
1. MOTIVATION As technology scales toward deep sub-micron, an increasing number of computational units will be integrated onto the same silicon die, posing tight communication requirements on the communication architecture. State-of-the-art on-chip interconnects are shared busses
with central arbiters for serializing bus access requests. This simple solution has serious scalability
properties, leading to critical performance penalties and energy inefficiencies as the number of integrated cores increases. There is a world-wide ongoing effort to design more scalable communication
architectures, for instance leveraging network technology and adapting it to the on-chip scenario.
The resulting architectures are known as Networks-on-Chip (NoCs) and have some promising features for application to gigascale systems-on-chip such as high modularity, scalability, potentials
for energy savings (e.g., application-specific NoCs) despite the increased design complexity.
2. RESEARCH ACTIVITY We analyzed NoC design issues at different layers of abstraction.
The first step was to address low level challenges in designing on-chip interconnects in presence
of deep sub-micron technologies. Due to the increased role of noise sources such as crosstalk,
power-suppy noise, soft errors, etc., physical link design will not suffice to provide communication
reliability, and the proper course of error-control actions will have to be taken at higher levels of
abstraction. We focused on the data link layer, and investigated how communication reliability
can be traded-off with energy, aware that the implementation of error correcting or detecting codes
comes at a cost, both in terms of encoding and decoding logic and of additional link lines and
transitions. We showed that error detecting schemes combined with retry procedures (e.g. retransmission of corrupted data) are more energy efficient than error correcting ones, due to the much
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higher decoding cost of this latter solution.
As a second step, we addressed system level NoC design and came up with a NoC architecture
(called Xpipes) which can be used to instantiate application-specific MPSoCs. Xpipes consists of
parameterizable network building blocks that can be arbitrarily tuned and composed at instantiation time. This solution provides flexibility at the cost of an increased design complexity. Two
relevant features of Xpipes are the use of deeply pipelined switches and of link pipelining, that
decouples link throughput from the worst case link delay in the design. Therefore, operating frequencies in the multi-GHz range can be achieved. Xpipes is one of the most advanced NoC designs
targeting heterogeneous MPSoCs with customized domain-specific communication architectures.
Its development is a joint effort of University of Bologna and Stanford University, and the final
objective is to come up with a complete Xpipes-based NoC synthesis flow.
3. ACADEMIC AND INDUSTRIAL COOPERATIONS
• Stanford University;
• University of Cagliari;
• STMicroelectronics (Advanced System Technology Agrate Brianza);
• STMicroelectronics (Consumer and Microcontroller Group Catania);
Research topic: FUNCTIONALLY-ACCURATE MODELLING AND SIMULATION OF MULTI-PROCESSOR SoCs
1. MOTIVATION Designers are faced by new challenges due to the complexity of future MultiProcessor Systems-on-Chip (MPSoCs). The increasing feature set of user applications, compounded
with stringent requirements in terms of power consumption and scalability issues in the design of
interconnects, determine the need for optimal choices in the deployment of embedded products.
Such issues represent key factors to be investigated during architecture definition and tuning.
A flexible simulation environment, capable of accurately analyzing the interaction among cores
and peripherals in a MPSoC, is an enabling factor for the design of the next generation of embedded
devices.
2. RESEARCH ACTIVITY We developed MPARM, a multi-processor simulation platform, to
explore design alternatives in the context of MPSoCs. The platform is both cycle-accurate and
signal-accurate, allowing for detailed analysis of system performance based upon functional traffic.
MPARM is built around the ability of plugging different devices to a flexible environment.
A variety of system IPs, interconnects, memories and peripheric devices can be easily mixed to
explore performance tradeoffs. Processing cores include ARM, StrongARM and PowerPC ([1]),
while interconnects span over a set of AMBA busses, STBus, and prototypes of future Networkson-Chip (NoCs). Every system component can be thoroughly configured, e.g. processor cache
type and size, memory latency, interconnect arbitration policy. Such flexibility enables interesting
performance comparisons ([2]).
Thanks to support for scratchpad memories (SPMs) and DMA engines in addition to caches,
MPARM adds further degrees of freedom to the design of memory hierarchies. System developers can optimally fit benchmark applications to available memory layers, resulting in better
power/performance efficiency.
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Support for energy models is provided, allowing, in combination with dynamic frequency/voltage scaling devices and energy-aware OS kernels, further research in the minimization
of energy consumption.
3. ACADEMIC AND INDUSTRIAL COOPERATIONS
• University of Verona;
• University of Urbino;
• University of Rome;
• LIP6 Laboratory (Paris, France);
• Penn State University (USA);
• IMEC (Belgium);
• STMicroelectronics (Advanced System Technology, Agrate Brianza and Grenoble);
Research topic: AMBIENT INTELLIGENCE SYSTEMS
1. MOTIVATION Ambient Intelligence (AmI) refers to a future scenario where people are
surrounded by intelligent intuitive interfaces that are embedded in all kinds of objects and an environment that is capable of recognizing and responding to the presence of different individuals in
a seamless, unobtrusive and often invisible way.
2. RESEARCH ACTIVITY The research activity of AmI Group at Bologna University spans
multiple aspects of distributed embedded and mobile systems design, with special emphasis on
location, user and context aware intelligent media delivery and capture, that enable the Ambient
Intelligence. Targeted applications concern navigation in immersive virtual environments, interactive gaming and personalized services for mobile users. The research focuses on the design and
implementation of the hardware/software infrastructure, which mainly involves two research issues.
First, system resources should be controlled in a power efficient way in order to enhance wearability and ubiquity. Thus, design of low-power operating systems and applications is a critical
issue. Second, location-aware systems involve the design of distributed sensing elements (fixed or
mobile) performing position localization, body tracking. In this context, the design of collaborative
distributed applications supported by an efficient communication stack is critical. The research
is carried out at several levels starting from hardware prototype design, operating systems and
middleware, application development and system integration. The work plan is organized in three
main projects:
• Enabling Technologies;
• Wireless Sensor Networks;
• Interactive Virtual Reality and Gaming;
Research Topic:
ANALYSIS
BIOSENSORS AND BIOINFORMATICS FOR GENETIC
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1. MOTIVATION Recent developments in genetics and biochemistry, propelled by large-scale
initiatives like the Human Genome Project, have lead to new approaches to the analysis of interactions between bio-molecules (DNA, proteins) that are assuming a strategic role in enabling advances
in medical, biological, environmental applications. In particular, thanks to the evolution of microfabrication technologies, it is now possible to design and fabricate small-scale devices (micro-arrays
based on fluorescence detection techniques) that can perform a large number of biochemical tests
in parallel on the same sample. The management of this amount of information determines the
increasing development of data mining technologies to automate to some degree, biological and
medical information discovery from experiments and publicly accessible databases. In this context,
there is a great demand of cheap and portable devices. Micro-fabricated systems with integrated
sensors can satisfy these requirements through a high degree of parallelism.
2. RESEARCH ACTIVITY
Label free technique to detect DNA hybridization: This research project targets the design and
development of innovative integrated systems that overcome the limitation (costs and portability) of state-of-the-art genetic analysis assays by means of two significant innovations: first,
by avoiding any labeling of the sample molecules, second by integrating on the microfabricated system the site of the reaction and the detector. To this purpose, we have studied and
implemented a technique to detect hybridization of DNA target with single stranded DNA
bound to gold surfaces. The biochemical reaction can be transduced in an electrical signal, by
measuring the capacitance variation of the metal/solution interface. We are able to measure
interface capacitance with a CBCM circuit both on macro or microfabricated surfaces thanks
to an automated calibration method. Preliminary results have demonstrated the possibility to
detect DNA hybridization by means of capacitance measurements with good reproducibility.
Techniques for automated analysis of DNA molecules in AFM images: The Atomic Force Microscopy is characterized by high resolution and high signal-to-noise ratio, so it can be applied
to nucleic acids. We developed automated algorithms for DNA molecules feature analysis
and extraction through a set of fully automated image processing steps, pattern recognition
techniques and noise analysis and deletion procedures. Moreover, we employed ad-hoc combinatorial optimization techniques to investigate and reconstruct DNA molecule structural
properties such as the intrinsic curvature and the flexibility.
Microarray Clustering and Cluster Biological Evaluation of Gene Expression Data: The high
throughput of the information obtained from micro-arrays has required new efforts in the
data mining and in particular in the process of clustering genes. Our enhanced pCluster
algorithm allows the mining of high quality cluster, that is clusters highly coherent and
variable (nonconstant) in their expression level profile. Observing the clusters through the
categories of Gene Ontology we could prove that our clusters present a coherent biological
meaning (purity).
3. RESEARCH PROJECTS
Cofin2004. financed by MIUR: BisensoriElettronici per Riconoscimento Genetico e Biomolecolare in collaboration with Department of physics INFN Ferrara, University of Roma La Sapienza,
University of Perugia, and Politecnico di Bari.
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4. ACADEMIC AND INDUSTRIAL COLLABORATION
• A project in collaboration with STMicroelectronics related to perform functionalization and
measure on micro-fabricated gold electrode;
• A project in collaboration with Infineon Technologies to implement on chip both electrodes
and measurement circuit;
• Department of Biochemistry, University of Bologna;
• STI, University of Urbino;
• INPG Grenoble;
• Clinical and Biological Sciences Department, University of Torino;
• Department of Computer Science, Stanford, CA.;
[1] D. Bertozzi, G. De Micheli, L. Benini, Energy-reliability trade-off for NoCs, in Networks on
Chip, edited by A. Jantsch, H. Tenhunen, Kluwer KAP, March 2003.
[2] M.DallOsso, G.Biccari, L.Giovannini, D.Bertozzi, L.Benini, Xpipes: a latency insensitive parameterized network-on-chip architecture for multi-processor SoCs, Int. Conf. On Computer Design, pp.536-539, October 2003.
[3] L. Benini, D. Bertozzi, D. Bruni, N. Drago, F. Fummi, M. Poncino, ”SystemC Cosimulation
and Emulation of Multiprocessor SoC Designs”, IEEE Computer, Volume: 36 Issue: 4, April 2003
Page(s): 53 59
[4] F. Poletti, D. Bertozzi, A. Bogliolo, L. Benini, ”Performance Analysis of Arbitration Policies
for SoC Communication Architectures”, Journal of Design Automation for Embedded Systems, pp.
189-210, Vol. 8, June/Sep 2003
[5] R. Barbieri, E. Farella, L. Benini, ”MOCA Project: MOtion Capture with Accelerometers”,
April 2003 in Design-In, VII- 5/2003, pp. 9-10
[6] A. Acquaviva, L. Benini, B. Riccó, Energy Characterization of Embedded Real-Time Operating
Systems”, Kluwer Academic Publishers, 2003.
[7] L. Benini, A. Acquaviva, ”Adaptive Algorithmic Power Optimization for Multimedia Workload
in Mobile Environments”, in HANDBOOK OF MOBILE COMPUTING, to be published, CRC
press, 2004.
[8] Farella E., Brunelli D., Bonfigli M.E., Benini L., Riccó B., ”Multi-client Cooperation and Wireless PDA Interaction in Immersive Virtual Environment”, in Proceedings of EUROMEDIA2003,
Plymouth, UK.
[9] A. Acquaviva, T. Simunic, V. Deolalikar, S. Roy, ”Remote Power Control of Wireless Network
Interfaces,” Proc. of PATMOS in Lecture Notes in Computer Science, Springer-Verlag, Turin,
September 2003.
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[10] A. Acquaviva, E. Lattanzi, A. Bogliolo, L. Benini, ”A Simulation Model for Streaming Applications over a Power Manageable Wireless Link,” Proc. of ESMC, October 2003.
[11] A. Acquaviva, E. Lattanzi, A. Bogliolo, L. Benini, ”Exploring Coprocessor Interfaces in an
Embedded Java Environment,” Proc. of ICOSMO, October 2003.
[12] A. Acquaviva, E. Lattanzi, A. Bogliolo, L. Benini, ”Dynamic Power Management of Streaming
Applications over a Wireless LAN,” Proc. of ICOSMO, October 2003.
[13] Barbieri R., Farella E., Acquaviva A., Benini L., Riccó B., ”A Low-Power Motion Capture
System with Integrated Accelerometers”, to appear in Proceedings of IEEE CCNC, Las Vegas,
January 2004
[14] A. Acquaviva, L. Benini, T. Simunic, ”LP-ECOS: An Energy Efficient RTOS,” Hewlett Packard
Laboratories Technical Report, HPL-2003-81.
[15] A. Acquaviva, L. Benini, T. Simunic, ”Server Controlled Power Management for Wireless
Portable Devices,” Hewlett Packard Laboratories Technical Report, HPL-2003-82.
[16] E. Farella, D. Brunelli, L. Benini, B. Riccó, M.E. Bonfigli, Visiting Virtual Heritage through
Mobile Systems in Science and Supercomputing at CINECA, 2003 Report, pp. 268-274
[17] C. Guiducci, C. Stagni, G.Zuccheri, A.Bogliolo, L.Benini, B.Samor, B.Riccó, ”’A novel DNA
detection technique based on integrable electronics”’, Proc. Of new trends in nucleic acid based
biosensors, p23, 60, 2003.
[18] C. Guiducci, C. Stagni, G. Zuccheri, A. Bogliolo, L. Benini B. Samor. B. Riccó, ”‘DNA
Detection by integrable electronics”’, Biosensors and Bioelectronics 19 (2004) 781787
[19] C. Stagni, C. Guiducci, G. Zuccheri, L. Benini. B. Riccó, ”‘Fully electronic DNA detection
technique”’, Proc. of AISEM 2004
[20] C. Guiducci, V. Stambouli-Sene, M. Labeau, L. Benini, B. Riccó, ”‘Conductive oxides as new
materials for electrical DNA detection”’, Proc. of Biosensors 2004
[21] E. Ficarra, L. Benini, E.Macii, G. Zuccheri, ”‘A Robust Algorithm for Automated Analysis
of DNA Molecules in AFM Images”’, Proc. of IASTED Biomedical Engineering (BioMED 2004)
[22] D. Masotti, E. Ficarra, L. Benini, E.Macii, ”‘Techniques for Enhancing Computation of DNA
Curvature Molecules”’, Proc. of IEEE Fourth Symposium on Bioinformatics and Bioengineering
(BIBE2004)
[23] E Ficarra, L Benini, B Riccó, G Zuccheri, ”‘Automated Dna Sizing in Atomic Force Microscope
images”’, Proc. of IEEE International Symposium on Biomedical Imaging (ISBI 2002)
[24] E Ficarra, D Masotti, L Benini, M Milano, A Bergia, ”‘Automated Dna curvature profile
reconstruction in Atomic Force Microscope images”’, AI*IA Notizie, Vol. 4, n. Dec., pp. 64-68
(2002)
[25] S. Yoon, C. Nardini, L. Benini, G. de Micheli, ”‘Enhanced pClustering and Its Applications to
Gene Expression Data”’, Proc. of IEEE Fourth Symposium on Bioinformatics and Bioengineering
(BIBE2004)
46
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——————————————————————FAULT TOLERANT APPROACHES FOR VERY DEEP SUBMICRON HIGH
PERFORMANCE SYSTEMS
C. Metra, J. M. Cazeaux, M. Omaña, D. Rossi
• Motivations
Traditionally, fault tolerant techniques have been used to combat the uncertainty in the signals on and from the ICs of systems for high reliability applications, (e.g., space, transport,
automotive, etc.). The increasing system complexity, due to exponentially increasing transistor counts enabled by smaller feature size, allows the semiconductor industry to satisfy
the consumer’s demand for products characterized by higher functionality, lower cost, and
shorter time-to-market. In the mean time, signal integrity problems are becoming more and
more critical, due to the power supply reduction, the shrinking of devices physical dimensions,
and the increasing of the operative frequencies (up to several GHz), requiring the implementation of fault tolerant techniques. The disadvantage of applying traditional fault tolerant
approaches are that they generally imply a non negligible impact on performance and an
increase of area overhead, thus causing also a severe decrease in yield, hence rise in cost, and
a three-fold increase in power consumption. Consumer electronics, of course, cannot afford
the high cost of traditional fault-tolerant techniques. To enable the trend towards further
miniaturization, while maintaining the reliability of the electronic system, a new way has to
be found to deal with possible errors. In particular, hard errors, mainly due to the fabrication process, and soft errors, for instance due to Alpha particles, neutrons, EMC, noise or
timing glitches are among the major problems forecasted by the Silicon Roadmap for next
generation electronics components. In particular, because of the first kind of errors, yield will
decrease, hence increasing the production cost of new ICs. Additionally, the second problem will cause electronic circuits to become unreliable/un-trustworthy during operation. A
promising approach to cope with the mentioned issues is to move towards innovative fault
tolerant approaches which, relaxing the requirements for 100% correctness in both transient
and permanent failures of signals, logic values, device, or interconnects, may reduce the cost
of manufacturing, verification and test.
• Performed Researches
Within the above-mentioned research collaboration projects, we addressed the issue of developing new fault tolerant approaches to protect electronics components against hard and soft
errors, with minimal, or no impact on performance, power consumption and area overhead.
• Obtained Results
We developed new techniques for the on-line testing of general sequential circuits at minimal
costs in terms of area overhead and minimal impact on system’s performance. A tool for
the automatic insertion of such techniques that is compatible with a standard synthesis flow
is also currently under development in collaboration with STMicroelectronics. Additionally,
BOLOGNA
47
in collaboration with Philips Research Labs, we developed new error correcting codes to
reduce the impact of bus crosstalk and simultaneous switching noise on system’s reliability
and performance.
[1] J. M. Cazeaux, D. Rossi, C. Metra, Self-Checking Voter for High Speed TMR Systems, The
Journal of Electronic Testing: Theory and Applications (JETTA), vol. 21, no. 4, August 2005, pp.
377-389.
[2] D. Rossi, A. K. Neiuwland, A. Kotoch and C. Metra, Exploiting ECC Redundancy To Minimize
Crosstalk Impact, IEEE Design & Test of Computers, vol. 22, no. 1, January-February, 2005, pp.
59-70.
[3] D. Rossi, A. K. Nieuwland, A. Katoch, C. Metra, New ECC for Crosstalk Impact Minimization,
IEEE Design & Test of Computers, July-August 2005, pp. 340-348.
[4] M. Omaña, D. Rossi, C. Metra, Low Cost and High Speed Embedded Two-Rail Code Checker,
IEEE Transactions on Computers, vol. 54, no. 2, February 2005, pp. 153-164.
[5] J. M. Cazeaux, D. Rossi, M. Omaña, C. Metra, and A. Chatterjee, On Transistor Level Gate
Sizing for Increased Robustness to Transient Faults, IEEE CS Proceedings 11th IEEE International
On-Line Testing Symposium, Saint Raphael (France), July 6-8, 2005, pp. 23-28.
[6] M. Omaña, O. Losco, C. Metra and A. Pagni, On the Selection of Unidirectional Error Detecting Codes for Self-Checking Circuits’ Area Overhead and Performance Optimization, IEEE CS
Proceedings 11th IEEE International On-Line Testing Symposium, Saint Raphael (France), July
6-8, 2005, pp. 163-168.
[7] A. K. Nieuwland, A. Katoch, D. Rossi and C. Metra, Coding Techniques for Low Switching
Noise in Fault Tolerant Busses, IEEE CS Proceedings 11th IEEE International On-Line Testing
Symposium, Saint Raphael (France), July 6-8, 2005, pp. 183-189.
[8] Y. S. Dhillon, A. U. Diril, A. Chatterjee, and C. Metra, Output Load and Logic Co-Optimization
for Design of Soft-Error Resistant Nanometer CMOS Circuits, IEEE CS Proceedings 11th IEEE
International On-Line Testing Symposium, Saint Raphael (France), July 6-8, 2005, pp. 35-40.
[9] D. Rossi, M. Omaña, F. Toma, C. Metra, Multiple Transient Faults in Logic: an Issue for Next
Generation ICs ?, IEEE CS Proceedings of The International Symposium on Defect and Fault
Tolerance in VLSI Systems, Monterey (California), October 3-5, 2005, pp. 352-360.
[10] J. M. Cazeaux, M. Omaña, and C. Metra, Novel On-Chip Circuit for Jitter Testing in Highspeed PLLs, IEEE Transactions on Instrumentations and Measurements, vol. 54, no. 5, October
2005, pp. 1779-1788.
DESIGN FOR TESTABILITY TECHNIQUES FOR HIGH PEFORMANCE
MICROPROCESSORS
C. Metra, M. Cazeaux, M. Omaña, D. Rossi
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BOLOGNA
• Motivations
The continuous scaling of microelectronic technology enables increasing system complexity,
which will soon exceed billions of transistors integrated on the same die. Higher levels of
integration allow more functionality and performance improvement, but also simultaneously
make testing increasingly difficult. To cope with this problem, industry is adopting numerous Design For Testability (DFT) strategies. Meanwhile, scaling to the scale of less than
the wavelength of light brings increasing variations of electrical parameters, thus making it
more difficult to guarantee the proper operation speed of the fabricated chips. Consequently,
we are also experiencing an increasing adoption of on the chip Design For Debug (DFD)
schemes, for finding speed paths and enhancing performance, as well as of Clock Calibration
(CC) circuits, to correct possible skews between different branches of the clock distribution
network. Traditionally, DFT, as well as DFD and CC structures, have been designed without
taking into account their possibly being affected by faults. This was mainly due to their
limited adoption on the chip, that was reducing their fault probability (because of the limited
area they occupied). However, the increasing use of such structures, made mandatory by the
increasing testing difficulties and electrical parameter variations, invalidates this underlying
assumption. Since the chip level device counts amounts to hundreds of millions nowadays,
DFT, DFD and CC devices are also on the rise. Therefore, the probability that these structures can be faulty due to defects, or other fabrication anomalies, can not be neglected any
longer.
• Performed Researches
In collaboration with Intel Corporation, Santa Clara, we have analyzed the probability that a
fault affecting the above mentioned DFT, DFD and CC structures invalidates the whole test
phase. In particular, for our analyses we have considered some recently proposed compactors
and comparators schemes commonly used in DFT structures, as well as DFD and CC schemes
of todays high performance ICs. Furthermore, we analyzed the effects of faults affecting the
clock distribution network on the system operation.
• Obtained Results
We found out that because of the occurrence of faults affecting clock distribution network,
clock duty-cycle variations can occur. This kind of clock faults can not be compensated
by standard CC structures implemented in high performance microprocessors. Furthermore,
we proved that min delay problems in short paths can arise from clock duty-cycle variations.
Since short paths are not ususally tested, this can cause the incorrect operation of the system.
Therefore, we assessed the necessity to test also short paths for min delay violation. Finally,
original solutions to cope with faults affecting clock distribution networks have been proposed
and are under development.
[1] M. Omaña, D. Rossi, C. Metra, Low Cost Scheme for On-Line Clock Skew Compensation,
IEEE CS Proceedings of 23rd IEEE VLSI Test Symposium, Palm Springs (California), May 1-5,
2005, pp. 90-95.
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49
[2] C. Metra, M. Omaña, D. Rossi, JM. Cazeaux, TM Mak, The Other Side of the Timing Equation:
a Result of Clock Faults, IEEE CS Proceedings of The International Symposium on Defect and Fault
Tolerance in VLSI Systems, Monterey (California), October 3-5, 2005, pp. 169-177.
MODELING OF DISPERSIVE EFFECTS IN III-V ELECTRON DEVICES
F.Filicori, A.Santarelli, R.Paganelli, I.Melczarsky, D.Resca, V. Di Giacomo
Low-frequency dispersive effects, due to the presence of bulk-level traps, surface states and selfheating, must be taken into account for the accurate nonlinear modeling of III-V electron devices
(MESFET, HEMT, etc.). In this context, different approaches, based on suitable RC networks
embedded in classical equivalent circuits, have been proposed in the literature. These approaches
can be efficiently adopted for linear applications (i.e., electron devices under small-signal operations)
but are usually not sufficiently accurate for the large-signal dynamic performance prediction.
In the last years different models have been developed by this research group for the accurate
prediction of dynamic deviations of the device drain current due to low-frequency dispersive effects.
In particular, the proposed models deals with the prediction of dynamic deviations of the drain
current caused by thermal phenomena (e.g., device heating/cooling due to power dissipation) which
can be important for relatively strong nonlinear circuits. Also the effects of “case” temperature
variations can be taken into account once the device thermal resistance is known.
The low-frequency dispersive models can be quite easily embedded both in classical nonlinear
equivalent circuits and mathematical models; depending on the degree of accuracy needed, the
identification of the proposed models can be based on small signal parameters, pulsed measurements
large-signal low-frequency i/v characteristics under sinusoidal excitation.
Recently, a new simplified Equivalent Voltage Model (EVM) has been proposed. The EVM
approach, is based on the definition of a virtually non-dispersive associated intrinsic device, controlled by means of “equivalent”, suitably-modified voltages. By means of voltage-controlled voltage
sources, series-connected to the gate electrode, both device self-heating and charge trapping phenomena in field effect transistors may be taken into account. This approach allows for an easy
identification procedure based on static and small-signal, low-frequency parameter measurements
which can be carried out by means of standard and low-cost instrumentation usually present in
most research laboratories.
[1] P. A. Traverso, A. Raffo, M. Pirazzini, A. Santarelli, F. Filicori, Automated Microwave Device
Characterization Set-Up Based On A Technology-Independent Generalized Bias System, 2005 IEEE
Instrumentation and Measurement Technology Conference, IMTC05, Ottawa (Ontario), Canada,
pp. 457 - 462, May 2005.
[2] A. Raffo, A. Santarelli, P. A. Traverso, M. Pagani, F. Palomba, F. Scappaviva, G. Vannini, F.
Filicori, Improvement of PHEMT Intermodulation Prediction Through the Accurate Modelling of
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BOLOGNA
Low-Frequency Dispersion Effects, 2005 IEEE International Microwave Symposium Digest, IMS05,
Long Beach (CA), cd-rom, Jun 2005.
[3] F. Filicori, G. Vannini, A. Santarelli, P.A. Traverso, Integral approaches to electron device modeling taking into account low frequency dispersion effects, UE TARGET NoE Tutorial on ”Quickshot
Short Term Modelling”, Scientific Week on Microwave Engineering, ElEm05, Orvieto, Italy, Apr
2005.
[4] J. A. Lonac, A. Santarelli, I. Melczarsky, F.Filicori, A Simple Technique for Measuring the
Thermal Impedance and the Thermal Resistance of HBTs., Proc. of Gallium Arsenide Applications
Symposium, GAAS05, Paris, France, pp. 197-200, Oct 2005.
[5] A. Raffo, A. Santarelli, P. A. Traverso, M. Pagani, G. Vannini, F. Filicori, Accurate modeling of
electron device I/V characteristics through a simplified large-signal measurement setup, Int. Journal
of RF and Microwave Computer-Aided Engineering, Wiley, Vol. 15, Issue 5, pp. 441-452, 2005.
[6] F.Filicori, P.Rinaldi, G.Vannini, A.Santarelli, A new technique for thermal resistance measurement in power electron devices, IEEE Trans. on Instrumentation and Measurement, Vol. 54, Nr.
5, pp. 1921-1925, 2005.
[7] A. Raffo, A. Santarelli, P. A.Traverso, G. Vannini, F. Palomba, F. Scappaviva, M. Pagani
and F. Filicori, Accurate PHEMT Intermodulation Prediction in the Presence of Low-Frequency
Dispersion Effects, IEEE Trans. on Microwave Theory and Tech., Vol. 53, Nr. 11, pp. 3449-3459,
2005.
NONLINEAR MODELING OF MICROWAVE ELECTRON DEVICES
V.A.Monaco, F.Filicori, A.Santarelli, P.Traverso, R.Paganelli, V.Di Giacomo, D.Resca
Nonlinear modeling of active devices for microwave circuit design is quite a complex task due to
the simultaneous presence of important nonlinear, reactive and parasitic effects. Presently, many
CAD tools are based on equivalent circuit models which describe the main physical phenomena
within the device in terms of lumped electrical components. These models are sufficiently accurate
for many applications but a major drawback is that they require relatively complex identification
procedures (often based on numerical optimization techniques).
In order to overcome the above mentioned problems, different mathematical models have been
proposed which can be directly identified on the bases of conventional measurements carried out by
means of automatic instrumentation (Network Analyzers and DC sources/monitors). In particular,
the device large-signal dynamic performance is computed using large-signal predictive formulae on
the bases of DC and frequency/bias dependent AC measurements stored in suitable look-up tables.
Also algorithms for the approximation/interpolation of nonlinear device characteristics based on a
look-up table description are currently under study.
The models have been applied for the large-signal dynamic performance prediction of different
types of electron devices (single- and dual-gate MESFETs, HEMTs, BJTs, etc..).
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51
Problems related to the modelling of distributed effects in electron devices (which must be taken
into account at very high operating frequencies or for power devices based on several gate fingers)
are also being investigated.
[1] A. Raffo, A. Santarelli, P. A. Traverso, G. Vannini, F. Filicori, Small-signal operation-based
simplified verification of non-linear models for millimeter-wave electron devices, IEEE 65th ARFTG
Conference Digest, Spring 2005, pp. 144 - 148, Long Beach (CA), USA, Jun 2005.
[2] F. Palomba, A. Meazza, M. Pagani, A. Raffo, A. Santarelli, P. A. Traverso, F. Scappaviva,
G. Vannini, and F. Filicori, High Linearity MMIC Power Amplifier design based on a Non-Linear
Discrete Convolution model, UE TARGET NoE Workshop on ”Power Amplifier Design”, Scientific
Week on Microwave Engineering, ElEm05, Orvieto, Italy, Apr 2005.
[3] A. Santarelli, V. Di Giacomo, A. Raffo, P. A. Traverso, G. Vannini, F. Filicori, V. A. Monaco,
A simple non-quasi-static non-linear model of electron devices, Proc. of Gallium Arsenide Applications Symposium, GAAS05, Paris, France, pp. 305-308, Oct 2005.
[4] A.Raffo, A.Santarelli, P.A.Traverso, G.Vannini, F.Filicori, Simplified Validation of Non-Linear
Models for Micro- and Millimeter-Wave Electron Devices, Proc. of Gallium Arsenide Applications
Symposium, GAAS05, Paris, France, pp. 201-204, Oct 2005.
[5] D. Resca, R. Cignani, A. Raffo, A. Santarelli, G. Vannini, Implementation of non-conventional
nonlinear models for electron devices in commercial CAD tools, Proc. of Gallium Arsenide Applications Symposium, GAAS05, Paris, France, pp. 445-448, Oct 2005.
[6] A. Raffo, A. Santarelli, P. A.Traverso, G. Vannini, F. Palomba, F. Scappaviva, M. Pagani
and F. Filicori, Accurate PHEMT Intermodulation Prediction in the Presence of Low-Frequency
Dispersion Effects, IEEE Trans. on Microwave Theory and Tech., Vol. 53, Nr. 11, pp. 3449-3459,
2005.
[7] A. Raffo, J.A. Lonac, D. Resca, S. Monaco, A. Santarelli, G. Vannini, Comparison of Electron
Device Models Based on Operation-specific Metrics, IEEE 17th Asia Pacific Microwave Conference,
APMC 2005, Suzhou, China, Vol.4, pp. 2411-2414, Dec 2005.
HIGHLY LINEAR POWER AMPLIFIER DESIGN
V.A.Monaco, F.Filicori, A.Santarelli, R.Paganelli, C.Florian
Simple and straightforward design methods for large-signal transistor amplifier design are inverstigated in this new research activity. In fact, the availability of reliable electrical models and
simulation algorithms, specifically oriented to RF and microwave circuit design, has now opened
the way to the development of efficient methodologies for power amplifier design under challenging
constraints on bandwidth, power gain, linearity and/or efficiency.
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BOLOGNA
The new simplified approach under development is aimed at the evaluation of the near-optimum
load impedance in Class-A, quasi-linear power amplifiers. The search-process consists in two basic
steps. First, the usual, theoretical choice for best resistive load in Class-A amplifiers, providing
maximum output power, is made at the intrinsic ports of the active device; second, the corresponding extrinsic loading impedance is evaluated by investigating the mathematical relationship
between the electrical variables at the intrinsic device and the scattering parameters at the extrinsic
ports. Possible additional requirements on gain compression, frequency bandwidth and efficiency
are compatible with the proposed approach, involving simple additional equations embedded in the
Harmonic-Balance-based design environment.
[1] F. Palomba, A. Meazza, M. Pagani, A. Raffo, A. Santarelli, P. A. Traverso, F. Scappaviva,
G. Vannini, and F. Filicori, High Linearity MMIC Power Amplifier design based on a Non-Linear
Discrete Convolution model, UE TARGET NoE Workshop on ”Power Amplifier Design”, Scientific
Week on Microwave Engineering, ElEm05, Orvieto, Italy, Apr 2005.
[2] A. Santarelli, R. Paganelli, Critical Issues in Highly-Linear Power Amplifier Design (Invited),
2005 IEEE Compound Semiconductor IC Symposium Digest, CSIC05, Palm Springs (CA), USA,
pp. 57-60, Oct-Nov. 2005.
NONLINEAR NOISE MODELING OF ELECTRON DEVICES AND LOW-PHASE
NOISE OSCILLATOR DESIGN
V.A.Monaco, F.Filicori, A.Santarelli, R.Paganelli, C.Florian, R.Cignani
This research activity is mainly oriented to the development of new design methodologies for lowphase noise Dielectric-Resonato stabilized and Voltage Controlled Oscillators (DROs and VCOs)
in MMIC and MIC technology. Research efforts are actually oriented towards both the oscillator
circuit design problem and the non linear modelling of 1/f noise up-conversion phenomena in
electron devices. In particular, a new modeling approach has been proposed which allows for the
inclusion, in existing ”noiseless” non-linear transistor models, of non-linearly voltage-controlled
noise sources which can adequately describe the phenomena of up-conversion of flicker noise into
RF phase noise. Moreover a new oscillator topology has also been proposed with the aim of
minimizing the non-linear phenomena which are mainly responsible for the up-conversion of lowfrequency noise.
[1] F.Filicori, P. A. Traverso, C. Florian, Non-linear Modeling of Low-to-High-Frequency noise
Up-Conversion in Microwave Electron Devices, Proceedings of SPIEs International Symposium on
Fluctuations and Noise Santa Fe, New Mexico USA, 1-4 June 2003
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[2] F.Filicori, P. A. Traverso, C. Florian, Identification procedures for the charge-controlled nonlinear noise model of microwave electron devices, Proceedings of SPIEs International Symposium
on Fluctuations and Noise, Maspalomas, Gran Canaria, Spain 25-28 May 2004
[3] C.Florian, M.Pirazzini, R.Cignani, G.Vannini, G.Favre, F.Filicori, Push-Push X Band
GaInP/GaAs VCO With a Fully Monolithic Microstrip Resonator, Proc. of IMS2004, Forth Worth,
Texas, Jun 2004.
[4] C. Florian, M. Pirazzini, G. Vannini, A. Santarelli, M. Borgarino, C. Angelone, M.Paparo,
F.Filicori, C Band DROs Using Microwave Bipolar Devices: Nonlinear Design Technique and
Noise Model for Phase Noise Prediction, Proc. of GAAS2004, Gallium Arsenide Applications
Symposium, Amsterdam, The Netherlands, Oct 2004.
[5] A.Costantini, G.Vannini, R.Cignani, VCO Behavioral Modeling, Workshop on RF & Microwave
Oscillator Design, EuMW, Amsterdam, The Netherlands, Oct 2004.
[6] C.Florian, R.Cignani, MMIC Oscillators Design, Workshop on RF & Microwave Oscillator
Design, EuMW, Amsterdam, The Netherlands, Oct 2004.
SAMPLING DIGITAL INSTRUMENTS AND CHARACTERIZATION OF A/D
CONVERTERS
F.Filicori, D.Mirri, P.Traverso
Research activity in this field has been aimed at developing high performance instruments,
based on digital signal processing techniques, for the measurement of the main parameters for
signal characterization, such as the rms value, or the power spectrum. In particular, specialpurpose signal sampling strategies, based on a quasi-random sampling distribution of the sampling
instants, and suitable signal processing algorithms have been developed for the implementation of
broad-band power meters, rms voltmetrs, vector voltmeters and power spectrum analyzers. The
measurements carried out on laboratory prototipes of these instrumets have shown good agreement
with the expected performance, thus confirming the validity of the approaches proposed for signal
sampling and data processing. Sample and Hold devices and Analog to Digital converters are
clearly the key components of this type of instruments, since the performance of these components
may limit the instrument accuracy, especially in terms of linearity and bandwidth. In order to
characterise and possibly compensate the nonlinear dynamic sources of errors in digital instruments,
a mathematical approach has been developed for the modelling of the S/H-A/D device. The
proposed approach has been derived from a recently proposed Volterra-like series expansion which
provides fast convergence. Moreover, the characterisation procedure can easily be carried out on
the basis of instrument testing under sinusoidal AC input signals with different frequencies and
variable DC components.
The model of the S/H-A/D devices is being applied for the error characterisation and compensation of digital true RWS voltmeters and oscilloscopes.
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[1] G. Pasini, P.A. Traverso, D. Mirri, G. Iuculano, F. Filicori, Hardware Implementation of a
Broad-Band Vector Spectrum Analyzer Based on Randomized Sampling, Proc. IEEE Instrumentation and Measurement Technology Conference (IMTC’04), Como, Italy, May 2004, pp. 952-957.
[2] P.A. Traverso, G. Pasini, A. Raffo, D. Mirri, G. Iuculano, F. Filicori, Characterization and compensation of dynamic non-linearities in digital data acquisition channels by means of the DiscreteTime Convolution Model, in: Proc. XIV IMEKO TC-4 Int. Symposium, Gdynia-Jurata, Poland,
Sep. 2005, pp. 387-392.
CAPACITIVE SENSORS FOR FLUID DYNAMICS APPLICATIONS
M. Tartagni, E. Sangiorgi, S. Callegari, M. Zagnoni, A. Golfarelli, R. Codeluppi
Many engineering applications rely on fluidodynamic principles for their operation or optimization, ranging from terrestrial vehicles to airplanes, from ship hulls to sails, etc. The complexity of
the relevant models makes them analytically unmanageable and so computational intensive that
capturing all their details is impossible even at the simulation level. Consequently, activities such
as design and research need to extensively rely on experiments to acquire the information necessary
for analysis and validation. Furthermore, in some applications it may be useful to permanently
monitor some fluidodynamic data to assess that it falls within safety ranges. The monitoring of
a whole surface consists in sampling such data at a series of meaningful points, ideally creating a
mesh of sensors distributed over the surface. Sensors need to be small enough not to perturb the
fluid motion and to read local data. Furthermore sensors need to be smart i.e., to be equipped with
some logic, in order to be programmed or coordinated and to be able to store or transmit the acquired data. Traditionally, pressure sensors have been manufactured with macroscopic approaches
and as dumb devices, making them hardly compliant with the above requirements.
In recent years Micro-Electro-Mechanical Systems (MEMS) have started revolutionizing the
sensor industry, with a new wave of devices realized at the integrated circuit (IC) level which
incorporate both sensing and logic. MEMS sensors fall at the opposite extreme of conventional
macro-sensors, being extremely small and extremely rich in electronics, both for interfacing and
internal signal processing needs. MEMS sensors, however, are often characterized by very high design and manufacturing costs. Furthermore, MEMS sensors can be fragile and subject to reliability
issues associated with their packaging, which is a key point having to behave both “openly” to
allow access to external physical quantities and “closely” to protect the silicon.
The recent developments in PCB technologies and support materials, including advanced polyimide films, open a new approach which is intermediate between macroscopic sensors and the
MEMS. For certain classes of applications this has the potential of picking the best of both worlds.
One can: rely on a cheaper, more prototype-oriented technology than MEMS; have the exposed
part of the sensor realized in robust plastic-like materials; add ad-hoc logic and signal processing;
have the electronics fully sealed within the same kind of films used to realize the sensing parts. To
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this aim polyimide-film structures can be designed to realize sensors where the readout is capacitive
and the film is used either as an insulator, a package and an elastic element. PCB sensors cannot
be as small as MEM sensors, but their inherently flat nature makes the larger size tolerable in many
applications. In fact, when monitoring large surfaces (as a sail, a plain wing or a vehicle surface)
one has to cope with measure scales which are strongly anisotropic. In the direction normal to the
surface, the size of a sensor needs to be extremely compact, while in the other directions the size
can be comparable with the feature size of the object to be monitored and thus much larger.
The goal of the research activities is to design, fabricate and test low cost polyimide-film based
sensors manufactured by PCB technologies and capable of differential pressure readout, to be applied over aerodynamic shapes. This comprises: deformable capacitive structures for transducing
the forces applied by the fluid over the surface into electrical quantities; analog interfaces to the
sensing capacitors including A/D conversion; digital circuitry for control, data storage and data
transfer. The digital part can also account for coordination among an array of sensors. Consequently the major research tasks consist in:
1. Selection of materials and geometric properties of deformable capacitive structures, sensitive
to normal and tangential strains; simulation and optimization of the above with finite element
methodologies;
2. Desing of analog interface circuits;
3. Prototyping of the deformable capacitive structures and of the analog interface circuits;
4. Tests and measures in a wind channel;
5. Design of digital architectures for data collection, transmission, sensor coordination.
At the present status, the first prototype PCB sensors have been built and succesfully tested
on an airfoil profile in wind tunnel. Analog interface circuits have also been proposed, prototyped
and tested.
[1] M. Zagnoni, A. Golfarelli, S. Callegari, A. Talamelli, V. Bonora, E. Sangiorgi, and M. Tartagni,
A non invasive capacitive sensor strip for aerodynamic pressure measurement, Sensors and Actuators – A, accepted for publication in 2005.
[2] M. Zagnoni, A. Golfarelli, P. Proli, S. Callegari, A. Talamelli, E. Sangiorgi, and M. Tartagni,
A non-invasive capacitive sensor strip for aerodynamic pressure measurement, in Proceedings of
Eurosensors ’04, (Roma, IT), 2004.
[3] A. Golfarelli, M. Zagnoni, P. Proli, S. Callegari, A. Talamelli, E. Sangiorgi, and M. Tartagni,
Acquisition system for pressure sensor network, in Proceedings of IEEE Sensors 2004, (Vienna,
AT), 2004.
[4] M. Zagnoni, A. Golfarelli, P. Proli, S. Callegari, E. Sangiorgi, and M. Tartagni, Fluid dynamic
sensor array in printed circuit board technology for aerospace applications, in Proceedings of AISEM
2004, (Ferrara, IT), Feb. 2004.
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LABEL-FREE BIOMOLECULAR DETECTORS: AT THE CONVERGENCE OF
BIOENGINEERED RECEPTORS AND MICROELECTRONICS
M. Tartagni, E. Sangiorgi, S. Callegari, M. Zagnoni, A. Golfarelli
The goal of this research activity is to develop low-cost, label-free biomolecular detectors/sentinels by integrating concepts and methods from bio-nanotechnology and microelectronics. More specifically, the project aims to design, fabricate, test and validate a biomorphic hybrid
technology by which biological self-assembling structures are interfaced with advanced electronic
circuits for signal detection, amplification and conditioning. In so doing, we exploit the strength
of biotechnology to achieve a very high sensitivity and selectivity, as well as the great potential of
micro- and nano-electronics to address system miniaturization, low-power consumption, and low
cost. An important objective of the proposal will be the evaluation and the assessment of the
technology as a valuable platform in health applications with respect to state of the art counterparts. For this purpose, validation exercises will be undertaken within the program, using different
kinds of receptors for several applications. The proposed approach can be summarized as follows:
introducing a hybrid technology for detecting target molecules by integrating bioengineered receptors
with advanced microelectronic technology. The foreseen outputs of the activites are:
1. The exploitation of hybrid technologies for the study and the implementation of an integrated
sensor aimed at achieving extremely high sensitivity for portable and low-cost devices. The
technology is based on the concept of using bioengineered receptors combined with general
purpose integrated circuit (IC) elements and processes. The final device should ultimately be
developed by embedding a platform consisting of:
(a) A biomorphic front-end, dedicated to highly specific affinity interaction with the target
molecules. Its operation will be based on receptors embedded in artificial lipid bilayers
(LB) that are self-assembled in either micro-fabricated polymer membranes or silicon
nanopores;
(b) Advanced microelectronic systems dedicated to the detection, amplification and conditioning of the signals produced by the transmembrane ion fluxes induced by the targete
molecules.
2. The development of a method to customize the device for specific target molecules. For
this purpose, validation exercises will be undertaken using different kinds of receptors for
several applications. This approach is thus focused on combining the extremely high selectivity (affinity) of the receptor binding paradigm used by Nature with the great sensitivity of
advanced integrated electronics. By performing ion channel recording with embedded microelectronics one can expect to boost the sensitivity and the selectivity of sensors specifically
targeted for given molecules with respect to the state of the art label-free technologies. This
approach is focused on setting up a general platform aimed at reducing the great divide
between micro- and nano- technologies: the device can be physically interfaced with conventional micro-dispensing/pipetting machine and will be fully electronically addressable to
detect specifically targeted molecules.
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The activities related to bio-electronic receptors have just taken off in year 2004.
SENSOR APPARATUSES AND INFORMATION PROCESSING TECHNIQUES
FOR AIR-DATA SYSTEMS
S. Callegari, A. Golfarelli, M. Zagnoni, M. Tartagni
Air-Data Systems are fundamental in the control of flying vehicles, being targeted at the determination of the air velocity vector and other parameters from local, external quantities measured
by pressure probes and/or transducers of the local direction of the aerodynamic flow. The development of an air-data system is a multidisciplinary activity which comprises sensor technologies,
electronics, information/signal processing, fluid dynamics, and flight dynamics. The research field
is very active, since measurement methods and information processing systems must be continually
updated to follow aircraft evolution and the introduction of new classes of air vehicles. For instance,
in some aircrafts the range of variation of the flight attitude is wide and it may be difficult to ensure
that all probes are always operational and unperturbed; also, in some small unmanned air vehicles
(UAVs), the issues related to installation, intrusivity, and cost are becoming fundamental. In all
cases, it is necessary to satisfy growing requirements in terms of reliability.
In the context introduced above, the research activity herein described is devoted to the investigation of strongly innovative methodologies for the acquisition and the processing of air-data.
The methods under exam are based on networks of sensors of new conception (as described in the
research line Capacitive Sensors for Fluid Dynamics Applications) and on redundancy levels largely
superior to those commonly employed. The methodology involves ”strip-type” capacitive sensors,
directly applicable ”on the skin” of air vehicles, avoiding tubes, vanes, orifices, and pneumatic link
(which, conversely, tend to characterize conventional measurement systems). The sensors exploit
low-cost technologies derived from those commonly applied to the production of printed circuit
boards (PCBs) and are array-type, i.e. each device includes a plurality of elementary units. The
economic competitiveness of the fabrication process, the low installation intrusivity and the inherent array nature of the sensors, shall all enable the use of an unprecedented number of sensitive
units. This is a change of paradigm with regards to conventional measurement methods that typically take advantage of only a few very specialized sensors, characterized by high accuracy and
high costs.
With regard to the state of the art, the high redundancy level being pursued makes it necessary
to devise novel algorithms and techniques to infer flight parameters from the sensor readings. On
the other hand, it may enable a significant relaxation in the accuracy and linearity requirements
posed on the individual sensors. Furthermore it may ease sensor placement issues with regard to
conventional techniques. Finally, it shall enable graceful degradation of performance in case of
faults. The possibility of inferring flight parameters from pressure gradients read on the surfaces
of an aircraft has already been experimentally proved (although considering only simple surfaces).
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Research done at NASA has verified that the approach is suitable for real-time data processing and
that it enables operation even at large angles of attack. Compared to this, the current activities
target the usage of the proper aircraft surfaces, rather than simple surfaces. This requires extended
reference to fluid dynamic analysis and simulation codes; it also makes necessary to integrate
analytic, simulation and experimental data in semi-empiric models, for instance by approximation
techniques; finally it compels to develop estimation technique, for the computation of the flight
attitude as no closed form inverse-models can be obtained.
Activites have already lead to preliminary results in the form of estimation algorithms trained
and validated both on simulation and experimental data.
[1] S. Callegari, A. Talamelli, M. Zagnoni, A. Golfarelli, V. Rossi, M. Tartagni, and E. Sangiorgi,
Aircraft angle of attack and air speed detection by redundant strip pressure sensors, in Proceedings
of IEEE Sensors 2004, (Vienna, AT), 2004.
[2] S. Callegari, M. Zagnoni, A. Golfarelli, and A. Talamelli, Apparecchiatura e metodo per la
determinazione di parametri caratterizzanti il moto relativo di un corpo rispetto ad un fluido, Italian
Patent application for industrial invention BO2004A000647, University of Bologna, Oct. 2004.
EXPLOITATION OF CHAOTIC DYNAMICS FOR TRUE RANDOM BIT
GENERATION AND APPLICATION TO CRYPTOGRAPHICAL KEY
GENERATION
R. Rovatti, G. Setti, S. Callegari, F. Pareschi
Random number generators (RNG) have a plethora of application ranging from Monte-Carlo
simulation to dithering and noise shaping in sampled data applications, from power spectrum
spreading for EMC enhancement to generation of session keys of initialization vectors for cryptographic procedures.
RNGs can be dividied in two classes: pseudo-random (PRGN) and true-random (TRNG).
PRNG are based on hashing and mixing procedure that expand the entropy contained in a relatively
small seed into a very long sequence of bits that are not properly random but whose statistical
features are compatible with the requirements of the application.
Critical applications such as cryptographic key generation recommend the use of TRNG in which
the source of entropy is not limited to a small initial seed but it is renewed while the generator is
running.
Typical implementations of TRGN exploit physical phenomena such as resistor noise, oscillator
jitter, etc. They usually suffer from the problem that the process suppling the entropy heaviliy
contraints the statistical features of the proces of generated bits. Hence, TRNG are often paired
with heavy post-processing stages “shaping” their randomness into someting satisying application
requirements. In conventional approaches the entropy rate of the physical source is quite limited and
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the subsequent post-processing further reduces the rate at which true-random bits can be generated.
A typical speed for commercially available product is that of frew hundreds of Krandom-bits per
second.
We propose to use the ability of analog discrete-time chaotic systems of extracting the entropy
in their initial conditions and exposing it in the samples oftheir trajectories. The system we devise
is based on a suitably designed chaotic-map and on the quantization of its trajectories to produce
random bits. This approach has many advantages
• The entropy generator and its translation into a sequence of bits can be proved to be “perfect”,
in the sense that a mathematical theory exists granting that the output process is made of
independent bits, each of them assuming one of two values with probability 1/2. This makes
any subsequent post processing minimum if not absent.
• The mixed analog/digital implementation of such a generator can be based on the same
building blocks the are designed for pipelined ADC. This know-how reuse greatly simplify
implementation and allows the conceivement of reconfigurable circuits that either perform as
ADC or TRGN as needed.
• The possibility of pursuing a heavily pipelined generation allows to reach output rates that
are at least two orders of magnitude greater than what is achievable with conventional means.
A TRNG adopting this approach has been designed and characterized as far as implementation
inaccuracies are concerned. Assessment of randomness has been performed by means of three test
suites to be applied on the bit stream produced. These test suites are comonly adopted to certify
that a RNG can be used in the most severe cryptographical applications and are the FIPS-140.2
and SP-800.22 suites by NIST and the DIEHARD suite that is a de-facto standard.
A proof of concept prototype has been designed and fabricated in a 0.35µm CMOS technology
and is currently under test.
Future directions will comprise the integration of the TRNG with some simple post-processing
stage adding flexibility to bit arrangment and allowing interfaces with a standard PC bus.
This activity is supported by the FIRB project “Innovative Mothodologies for the design of
chaotic circuits” as well as the local project: “Sfruttamento di dinamiche caotiche per la generazione
di chiavi crittografiche”
[1] S. Poli, S. Callegari, G. Setti, R. Rovatti, “Post Processing of Chaotic Pipelined ADC for the
Robust Generation of Perfectly Random Bit Streams”, IEEE International Symposium on Circuit
and Systems (ISCAS 2004)
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STOCHASTIC MODULATION OF PERIODIC SIGNALS FOR ENHANCED EMC
R. Rovatti, G. Setti, S. Santi, L. De Michele
Periodic signals are common in electronic systems are timing-references. They can be simple
clocks driving digital circuitry ar well as triangular reference signals for the generation of PWM
trains driving amplifiers or even power bridges.
Their periodicity results in an accumulation of power around harmonic frequencies and thus to
rather “peaky” power spectra. This goes against current EMC regulation that, in general, poses
limits to the EM emisssion of a systems at each frequency.
A common idea to prevent peaks in power spectrum is to alter the strict periodicity of the
responsible signals so that their power is spread in a small bandwidth around nominal harmonic
frequencies hopefully lowering power spectral density below regulation limits.
We choose to do so by applying a stocastic frequency modulation to the periodic signal under
consideration. We do this to simple clocks and to PWM carriers. We consider high-index modulations choosing the istantaneous frequency deviation among all the possible deviations up the
maximum allowed, as well as a low-index modulation setting the istantaneous frequency deviation
either to its positive or negative maximum.
A thorough theoretical investigation has been carried out to analytically model the power
spectrum of clock and PWM signals when they are subject to these modulations.
Beyond the fact that many of the closed form expressions obtained for the condiered spectra
are novel and can be considered an output per se, they can be employed to design the modulation
parameters in order to maximize the reduction of power density peaks.
A proof of concept prototype of properly jittered clock generator has been fabricated in a 0.35µm
CMOS technology. Its measurements revealed that, as expected, peak reduction outperforms that
of any other method currently employed and patented. Gains in peak height with respect, for
example, to spreading methods adopted by INTEL, IBM and Cypress reach 9dB.
Future directions will comprise the design of a jittered clock generator compatible with the
highest SATA specification as well as the design of, possibly, monolithic DC/DC power conversion
stages with jittered control signals.
This activity is supported by FIRB project “METHODS FOR THE STATISTICAL CHARACTERIZATION OF NONLINEAR DYNAMICAL SYSTEMS WITH APPLICATIONS TO INFORMATION AND ELECTRICAL ENGINEERING”.
[1] F. Pareschi, G. Setti and R. Rovatti, “Noise Robustness condition for chaotic maps with Piecewise constant invariant density,” International Symposium on Circuit and Systems (ISCAS2004),
Vancouver (Canada), May 2004. Vol IV, pagg 681-684.
[2] M. Balestra, S. Santi, R. Rovatti, G. Setti, “Generalized Modulation Law for Generating
Constant-Envelope Spread Spectrum Signal via Frequency Modulation”, IEEE Workshop on Nonlinear Dynamics of Electronic Systems (NDES2004), pp. 79-82, Evora,, Portugal, May 2004
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[3] S. Santi, R. Rovatti, G. Setti, “Spectral aliasing effects of PWM signals with time-quantized
switching instants” Circuits and Systems, 2004. ISCAS ’04. Proceedings of the 2004 International
Symposium on Vol. 4, pp. IV - 689-92, 23-26 May 2004
[4] M. Balestra, A. Bellini, C. Callegari, R. Rovatti, G. Setti, “Chaos-Based Generation of PWMLike Signals for Low-EMI Induction Motor Drives: Analysis and Experimental Results” IEICE
Transactions on Electronics, vol.87-A , pp. 66-75, 2004
OVERSAMPLED LOW-DEPTH CODING OF SIGNALS FOR CONVERSION
AND ACTUATION
R. Rovatti, G. Setti, S. Santi
This activity investigates the idea of representing a bandlimited analog signal with a stream of
digital words of limited precision and whose rate is larger that the Nyquist sampling rate. The idea
is not new as, for example, it is the key point in Σ∆ conversion. Yet, recently it has attracted an
increased interest since it has been adopted as the key storing method for sound and music waves
in the Super Audio CD (SACD) standard as well as for driving either class-D amplifiers or AC
motors power bridges.
When reduced to its minimum terms the problems amounts to finding an high-frequency antipodal stream that reproduces a given bandlimited analog signals when low-pass filtered to its
natural bandwidth.
Classical techniques exploit the concept of Σ∆ conversion by adjusting the loop filter to improve
performance and a limited-depth trellis algorithm for dynamic compensation of reproduction error.
We choose to model the problem as an optimization task in which the function to minimize is
the difference between the original waveform and the filtered stream and the stream is constrained
to be antipodal.
When the reproduction error is measured in a way related to signal energy this task can be addressed in the framework of combinatorial optimization in which it is known as a Binary Quadratic
Programing (BQP) problem. Exact as well as heuristis approaches to BQP problems have been
suitably tuned to the specific problem yielding results comparable if not better than conventional
techniques.
In particular, a proper variant of a Tabu-Search approach, is able to produce high-frequency
antipodal streams that can be used in the driving of AC motors achieving a spectral accuracy that
is almost 30dB better that what is achieved by conventional Σ∆ approaches.
Future directions will comprise the introduction of a mixed feedback-optimization structure to
exploit the strenghts of both the Σ∆/trellis approach and the BQP approach.
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[1] S. Santi, R. Rovatti, G. Setti, “Generation of optimal switching pattern for single-phase inverter”
Circuits and Systems, 2004. MWSCAS ’04. The 2004 47th Midwest Symposium on Vol. 2, pp.
II-625 - II-628 25-28 July 2004
[2] S. Santi, M. Bassani, R. Rovatti, G. Setti, “Generation of Optimal Constrained Switching
Pattern for Single-Phase Inverter”, IEEE/IEICE International Symposium on Nonlinear Theory
and its Applications (NOLTA 2004), Fukuoka, Japan, November 2004
EXPLOITATION OF CHAOTIC DYNAMICS IN FUTURE GENERATION
DS-CDMA SYSTEMS
R. Rovatti, G. Setti, G. Mazzini, G. Cimatti, S. Vitali
Direct Stream Code Division Multiple Access systems are physical level multiple access schemes
in which users share the same bandwidth and the same time-slot but are distinguished by means
of a signature or spreading code. DS-CDMA is the core of many 3G systems (such as UMTS) and
appears in many of the proposals for future communication schemes.
The performance of the receivers dedicated to the decoding of DS-CDMA streams depend,
amoung other factors, on the statistical features of the spreading sequences.
We investigate the possiblity of generating these codes by quantizing and periodically repeating
slices of trajectories of suitably designed discrete-time chaotic systems.
In the past we have shown that correlation-based receivers in asynchronous environments achieve
their maximum performance when chaos-based coding is employed. Improvements can be also
demonstrated in multipath situations and with certain architectures of multi-user receivers based
on interference cancellation.
This activity has now two branches
• General DS-CDMA. We have addressed the problem of characterizing the ultimate limits of
this communication scheme. This has been done by resorting to the concept of Shannon
capacity of vector channel. It has been proved that chaos-based spreading improves the
Shannon capacity of the systems and, under suitable conditions, maximizes it. We have also
analyzed the effect of non rectangular pulse shapes in performance evaluation showing the
chaos-based improvement still exists when commonly adopted pulses are considered.
• Multi-Code CDMA. We have addressed the problem of designing chaos-based code generators that operate in systems in which each users can be assigned more than one spreading
sequences. Optimized chaos-based generators have been compared with the approach adopted
by the UMTS standard revealing that nonngegligible improvement can be obtained.
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Future directions will comprise Ultra-Wide-Band CDMA for sensor networks and Multi-Carrier
CDMA.
This activity is supported by the FIRB project “ENABLING TECHNOLOGIES FOR WIRELESS RECONFIGURABLE TERMINALS” and by the FIRB project “ULTIMATE LIMITS OF
CHAOS-BASED DS-CDMA SYSTEMS”.
[1] R. Rovatti, G. Mazzini, G. Setti, “On the Ultimate Limits of Chaos-Based Asynchronous DSCDMA - Part I: Basic Definitions and Results,” IEEE Transactions on Circuits and Systems- Part
I, pp. 1336-1347, vol. 52, July 2004
[2] R. Rovatti, G. Mazzini, G. Setti, “On the Ultimate Limits of Chaos-Based Asynchronous
DS-CDMA - Part II: Analytical Results and Asymptotics,” IEEE Transactions on Circuits and
Systems- Part I, pp. 1348-1364, vol. 52, July 2004
[3] G. Setti, R. Rovatti, G. Mazzini, “Performance of Chaos-Based Asynchronous DS-CDMA with
Different Pulse Shapes,” IEEE Communications Letters, pp. 416-418, vol. 8, July 2004
[6] R. Rovatti, G. Setti, G. Mazzini, “Pulse Shaping and SIR-Energy Trade-off in Chaos-based
Asynchronous DS-CDMA,”IEEE International Symposium on Circuits and Systems (ISCAS2004),
pp. IV-613–IV-616, Vancouver, May 2004
[7] C. Poggi, G. Mazzini, R. Rovatti, G. Setti, “Eigenvalues Distribution and Average Shannon
Capacity of Asynchronous DS-CDMA Systems with Classical and Chaos-Based Spreading,” IEEE
International Conference on Communication (ICC2004), pp. 2899-2903, Paris, June 2004
HIGH-LEVEL MULTI-STANDARD SIMULATION OF RF FRONT-END
ARCHITECTURES
R. Rovatti, S. Vitali, F. Agnelli
Telecommunication standards are given at functional level, i.e., they specify conditions in which
devices must operate and the performance they must feature in terms of Bit-Error-Rate (BER) or
Packet-Error-Rate (PER). When the RF front-end of the transceiver chain has to be designed,
these high-level specifications must be translated into circuit-level requirements.
This process has two phases. In the first phase baseband processing is reduced to minimum
demodulation devices and BER or PER levels are roughly translated into lower bounds on the
Signal-to-Disturbance (SDR) ratio. Blocks are then individually sized in a way that the accumulated SDR does not exceed such a lower bound.
In a second phase the system must be simulated to ensure that the local choices are actually
compliant with the standards when real non-idealities are taken into account and real base-band
processing is applied.
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To achieve this, a time-domain simulator of the RF front-end as well as of the baseband processing must be set up. We have done so exploiting the numeric Matlab engine end devising a
proper interface between baseband and RF blocks as well as a suitable multiband macro-model for
the RF blocks commonly employed in transceiver architectures. Interfaces and macro-model are
kept as generic as needed to be able to simulate, within the same framework, GSM, UMTS as well
as IEEE802.11a/b/g standards.
The simulator has proved itself flexible enough to
• validate choices made a block level in a scenario compliant with formal high-level specification
for all considered standards
• identify trade off between design requirements on different blocks, or bewteen requirements
on different characteristics of the blocks, thus paving the way to a non-local optimization of
the RF transceivers.
This activity is supported by the FIRB project “ENABLING TECHNOLOGIES FOR WIRELESS RECONFIGURABLE TERMINALS”.
[1] S. Vitali, N. De Laurentiis, G. Albertazzi, F. Agnelli, R. Rovatti, “Design of Multi-standard
Analog Front-End by Homogeneous Simulation of WLAN/UMTS Transceivers”, WoWCAS - Workshop on Wireless Circuit and Systems - proceedings , May 2004, Vancouver, Canada
[2] S. Vitali, N. De Laurentiis, G. Albertazzi, F. Agnelli, R. Rovatti, “Multi-standard Simulation of
WLAN/UMTS/GSM Transceivers for Analog Front-End Validation and Design”, ISWCS - International Symposium on Wireless Communication Systems, September 2004, Port Louis, Mauritius
CNR-IMM
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CNR-IMM
Sezione di Bologna
Research topics
1) SOLID-STATE GAS SENSORS FOR ENVIRONMENTAL MONITORING APPLICATIONS
I. Elmi, S. Zampolli, F. Mancarella, A. Roncaglia, G. C. Cardinali, M. Severi
Collaborations: University of Parma, SINTEF (Norway), EADS (Germany)
2) SIMULATION OF THE AS DIFFUSION IN ULTRA-SHALLOW JUNCTIONS
FOR 45NM CMOS TECHNOLOGY
S. Solmi, M. Ferri, A. Parisini, D. Nobili, G. Lulli
3) FAST ELECTROMIGRATION TESTS
M. Impronta, S. Farris, A. Scorzoni
Collaborations: STMicroelectronics
4) TECHNOLOGICAL PROCESSING OF SIC FOR MICROELECTRONIC APPLICATIONS
R.Nipoti, A.Poggi, S. Solmi, A. Parisini, G.C.Cardinali, F.Bergamini, M. Canino, F.Moscatelli
Collaborations: DIEI-Uni. PG, Dipartimento di Fisica-Uni.BO, INFN-Fi, Uni. Tampa -USA,
CNM-Barcelona, INSA-Lyon
5) CARBON NANOTUBES SYNTHESIS AND CHARACTERIZATION
R. Angelucci, R. Rizzoli, A. Parisini, S. Guerri, F. Corticelli, G. P. Veronese
Collaborations: STMicroelectronics, Catania (Italy), STMicroelectronics, Naples (Italy), INFN
Sez. Bologna, Bologna (Italy), Dept. of Physics, University of Bologna, Bologna (Italy)
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SOLID-STATE GAS SENSORS FOR ENVIRONMENTAL MONITORING
APPLICATIONS
I. Elmi, S. Zampolli, F. Mancarella, A. Roncaglia, G. C. Cardinali, M . Severi
Highly selective gas sensing systems for environmental monitoring applications are developed.
Through the integration of micromachined gas chromatographic devices, fluidic components and
thin film metal oxide gas sensors used as detectors, complete miniaturized multisensing systems for
quantitative analyses of indoor and outdoor air quality tracers are designed, developed and characterized. Miniaturized spectroscopic systems for CO2 , CO and CH4 based on infrared absorption
are realized in collaboration with other european research groups and high-tech industries. The
system components are all based on silicon mems technology, the core element being a miniaturized
photoacustic cell for selective infrared detection on the absorption line of the detected gas.
[1] S. Zampolli, I. Elmi, J. Stürmann, S. Nicoletti, L. Dori, G. C. Cardinali “Selectivity enhancement of metal oxide gas sensors using a micromachined gas chromatographic column”, Sensors and
Actuators B: Chemical, vol. 105 (2), pp. 400-406, 2005. [2] J. Stürmann, W. Benecke, S. Zampolli,
I. Elmi, G. C. Cardinali, W. Lang, “A Micromachined Gas Chromatographic Column to Optimize
the Gas Selectivity for a Resistive Thin Film Gas Senso”, The 13th International Conference on
Solid-State Sensors, Actuators and Microsystems Transducers ’05, June 2005, Seoul (Korea). [3]
S.Zampolli, I.Elmi, G.C.Cardinali, L.Masini, A.Zani, M.Severi, J. Stuermann, W.Benecke, “Micromachined Gas-Chromatographic Columns and MOX Sensor Arrays for Enhanced Selectivity Gas
Sensing Microsystems”, Matter, Materials and Devices, June 2005, Genova (Italy). [4] F. Mancarella, A. Roncaglia, M. Passini, G. C. Cardinali, M. Severi, “A Measurement Technique for
Thermoelectric Power of CMOS Layers at the Wafer-Level”, EurosensorsXIX Proceedings, vol. 1,
p. TC11, 11th - 14th Sept. 2005, Barcellona (Spain). [5] A. Roncaglia, F. Mancarella, G. C. Cardinali, F. Tamarri, M. Severi, “A CMOS-Compatible Process for Thermopiles with High Sensitivity
in the 3-5 µm Atmospheric Window”, EurosensorsXIX Proceedings, vol. 2, p. MC11, 11th - 14th
Sept. 2005, Barcellona (Spain). [6] O. Schulz, G. Müller, M. Lloyd, A. Ferber, G. C. Cardinali, A.
Roncaglia, S. Brida, K. H. Suphan, “Miniaturized photo acoustic gas sensors - revival of a reraly
used technology for environmental monitoring applications”, Eurosensors XIX Proceedings vol. 2,
p. Wpb61, 11th - 14th Sept. 2005, Barcelona(Spain). [7] F. Mancarella, A. Roncaglia, M. Passini,
M. Sanmartin, G. C. Cardinali, M. Severi, “Wafer-level testing of thermopile IR detectors”, IEEE
Sensors 2005 Proceedings, p. 1133-1136, 31st Oct. - 3th Nov. 2005, Irvine, CA (USA) [8] F.
Mancarella, A. Roncaglia, F. Tamarri, G. Pizzochero, G. C. Cardinali, M. Severi, “Fabrication
of Pt-polysilicon thin-film thermopiles: a preliminary study”, IEEE Sensors 2005 Proceedings, p.
1141-1144, 31st Oct. - 3th Nov. 2005, Irvine, CA (USA).
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SIMULATION OF THE AS AND B DIFFUSION IN ULTRA-SHALLOW
JUNCTIONS FOR 45NM CMOS TECHNOLOGY
S. Solmi, M. Ferri, A. Parisini, D. Nobili, G. Lulli
The diffusion and the annealing mechanisms of the low energy As implanted Si have been investigated by comparing Secondary Ion Mass Spectrometry (SIMS) and simulated profiles. Z-contrast
scanning transmission electron microscopy (STEM) imaging has been also used to determine the
As local distribution in proximity of the sample surface. The implants have been performed with
energies between 1 and 10 keV both through a thermally grown 11 nm thick oxide and without
any oxide mask. SIMS and STEM profiles show, after short annealing at 800-1000 ◦ C, an As pileup in the first 3-4 nm of the Si matrix in proximity of the SiO2 /Si interface that gives rise to a
drastic reduction of the dopant able to diffuse inside the bulk. We demonstrate that very accurate
simulations of the experimental profiles can be obtained with a “Fickian” standard diffusion by assuming the presence of unspecified ”dopant traps” near the SiO2/Si interface. We have also verified
that removing before annealing the superficial 4 nm of Si does not eliminate the As pile-up. The
availability of a correct simulation model allows us to evaluate the dopant diffusivity during the
annealing and investigate the eventual presence of transient enhanced diffusion (TED) phenomena.
The As profiles show a moderate TED just during the first step of annealing at 800 ◦ C. However,
the phenomenon is of modest entity at these low energies and vanishes after few seconds. No TED
phenomenon is observed at temperatures higher than 900 ◦ C. Moreover, the effects of 2 MeV Si+
implantation on the carrier density of SOI layers heavily doped with Boron and the kinetics of its
recovery by thermal annealing has been determined and discussed. The dependence of the carrier
concentration and mobility on annealing temperature and time are investigated by resistivity and
Hall-effect measurements. The B reactivation in condition of vacancy excess evidences the presence
of three recovery stages which are analysed and discussed. Experimental results, which include
TEM observations, allowed to distinguish the recovery of the defects from SiB3 precipitation which
can take place at temperatures ≥ 700 C.
[1] M. Ferri, S. Solmi, A. Armigliato, D. Nobili, M. Passini, “Damage and recovery in boron doped
SOI layers after high energy implantation”, Matter, Materials, and Devices, June 22th-25th 2005,
Genova (Italy). [2] D. Nobili, S. Solmi, “Features of Arsenic Clusters in Silicon”, Physica Status
Solidi C: Conferences, vol. 2 (10), pp. 3681-3685, 2005. [3] A. Satta, E. Albertazzi, M. Bianconi,
G. Lulli, S. Balboni, L. Colombo, “Atomistic simulation of ion channeling in heavily doped Si:As”,
Nuclear Instruments and Methods in Physics Research Section B-beam Interactions with Materials
and Atoms, vol. 230, pp. 112-117 Sp. Iss. SI APR, 2005.
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FAST ELECTROMIGRATION TESTS
M. Impronta, S. Farris, A. Scorzoni
As the copper damascene technology has gained widespread use for ULSI interconnections, a
renewed interest arises on fast wafer level reliability (WLR) measurements to evaluate electromigration (EM). While the common package level reliability (PLR) tests, used in the semiconductor
industry, are very expensive in terms of cost and required time, when applied to Cu metallizations,
WLR tests are very promising, when a correlation between the PLR and WLR tests should be
demostrated. The WLR Isothermal method (ISOT), assuming a uniform temperature around the
structure, is the most suitable method to obtain comparable results.
Activity: The ISOT method, developed in the last year by the authors, has been optimized, to
reach a better stability during the stress. Comparative ISOT and PLR tests are on the way, in
collaboration with the industrial partner, to demonstrate the applicability of ISOT tests as an
indicator of the Cu metallization quality.
Results: The new ISOT procedure has been fully developed and accepted from the JEDEC JC-14.2
Subcommittee on Wafer Level Reliability for ballot as revised JEDEC Standard JESD61A.
[1] M. Impronta, S. Farris, A. Ficola, A. Scorzoni, “Resistance Instability in Cu-damascene
Structures during the Isothermal Electromigration Test”, IEEE International Integrated Reliability
Workshop, Final Report, pp. 135-138, 2005.
TECHNOLOGICAL PROCESSING OF SIC FOR MICROELECTRONIC
APPLICATIONS
R. Nipoti, A. Poggi, S. Solmi, A. Parisini, G.C.Cardinali, F.Bergamini, M. Canino, F.Moscatelli
Silicon carbide (SiC) has a wide band gap, large electrical breakdown field, high thermal conductivity and outstanding chemical inertness all of which make it an attractive replacement for
conventional semiconductors in high-power devices operating in high temperatures and harsh environments. However several crucial fabrications issues must be solved before truly advantageous SiC
devices can be realized experimentally. Therefore the development of the technological processes
on SiC is mandatory in order to exploit the potentiality of this material. Our research activity
on the technological processing of SiC for microelectronic applications is focused on three processes: selective doping by ion implantation, ohmic contacts and thermal oxidation. Concerning
ion implantation process, Al and P have been studied as acceptor and donor elements, respectively.
The obtained results shown, both for Al+ and for P+, that the implantation temperature can
be lowered down to 300/400 ◦ C still producing doped layer with resistivity values and electrical
junction characteristics as good as those produced by ion implantation processing at temperature
higher than 500◦ C. Post-implantation annealing conditions have been changed to evaluate the effect
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of different temperatures (in the range 1300-1650◦ C) and different ambient (Ar and silane) on the
electrical activation of the dopant and the presence of the surface roughness. The studies performed
on the metal contacts result in Ni to obtain ohmic contact on n-type SiC and in Ti/Al to obtain
ohmic contact on p-type SiC. Oxidation process has been studied both on crystalline material and
amorphized one. The experimental conditions to grow oxide layers on SiC with high oxidation rate
and low temperature have been determined st
[1] F. Bergamini, F. Moscatelli, M. Canino, A. Poggi and R. Nipoti, “Ar anneling at 1600 ◦ C
and 1650◦ C of Al+ implanted p+/n diodes: analysis of the J-V characteristics versus annealing
temperature”, Mat. Sc. Forum, vol. 483-485, pp. 625-628, 2005. [2] F. Bergamini, S.P. Rao, S.
saddow and R. Nipoti “J-V characteristics of Al+ ion implanted p+/n 4H-SiC diodes annealed in
silane ambient at 1600◦ C”, Mat. Sc. Forum, vol. 483-485, pp. 629-632, 2005. [3] M. Canino,
A. Castaldini, A. Cavallini, F. Moscatelli, R. Nipoti and A. Poggi, “n+/p diodes realized in SiC
by Phosphorous ion implantation: electrical characterization as a function of temperature”, Mat.
Sc. Forum, vol. 483-485, pp. 649-652, 2005. [4] A. Poggi, A. Parisini, S. Solmi and R. Nipoti,
“Competition between oxidation and recrystallisation in ion amorphised (0001) 6H-SiC”, Mat. Sc.
Forum, vol. 483-485, pp. 665-668, 2005. [5] F. Moscatelli, A. Scorzoni, A. Poggi, M. Canino and R.
Nipoti “Ni-silicide contacts to 6H-SiC: contact resistivity and barrier height on p-type epilayers”,
Mat. Sc. Forum, vol. 483-485, pp. 737-740. [6] F. Moscatelli, A. Scorzoni, A. Poggi, M. Bruzzi,
S. Lagomarsino, S. Mersi, S. Sciortino, M. Lazar, A. Di Placido and R. Nipoti, “Measurements
of charge collection efficiency of p+/n junction SiC detectors”, Mat. Sc. Forum, vol. 483-485,
pp. 1021-1024, 2005. [7] A. Poggi, A. Parisini, R. Nipoti, and S. Solmi “Oxidation kinetics of
ion-amorphized (0001) 6H-SiC: Competition between oxidation and recrystallization processes”,
Appl. Phys. Lett., vol. 86, pp. 121907-9, 2005. [8] F. Moscatelli, A. Scorzoni, A. Poggi, M. Bruzzi,
S. Lagomarsino, S. Mersi, S. Sciortino, and R. Nipoti “Measurements and simulations of charge
collection efficiency of p+/n junction SiC detectors”, Nucl. Instr. and Method. A, vol. 546, pp.
218-221, 2005.
CARBON NANOTUBES SYNTHESIS AND CHARACTERIZATION
R. Angelucci, R. Rizzoli, A. Parisini, S. Guerri, F. Corticelli, G. P. Veronese
Within the mainstream of electronic applications we have recently started a research activity
in the field of carbon nanotubes synthesis and characterization. The fabrication of a position
particle detector, cold cathode field emitters for storage devices and the developing of electronic
devices, such as FETs have been the driving forces of our research. In every case a highly needed
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major breakthrough in the CNTs technology is the development of a fabrication method capable
of producing well organized nanotube structures, with uniform CNTs and reproducible electronic
properties.
In order to meet the requirements of the projects we are involved in we are developing site-selective
Chemical Vapor Deposition (CVD) approaches to the growth of carbon nanotubes. Several types of
flat substrates such as silicon, silicon oxide and nitride, and porous silicon (PS) have been prepared.
In order to perform the template based CVD growth, a fabrication method to prepare a highly
ordered anodic porous alumina matrix has been set up. Transition metal catalysts, such as nickel,
iron and cobalt, have been investigated as seeds to nucleate the growth of CNTs. Various CVD
process parameters, such as carbon gas precursor type and percentage in the gas mixture, use of
etching or carrier gases in the gas mixture and deposition temperature, have been investigated to
obtain ordered arrays of reproducible CNTs.
[1] V. Vinciguerra, M. F. Bevilacqua, R. Angelucci, R. Rizzoli, Chimica Oggi 2005, 23, 33-36. [2]
R.Angelucci, R. Rizzoli, F. Corticelli, A. Parisini, V. Vinciguerra, F. Bevilacqua, L. Malferrari,
M. Ruffiani, Proceedings Consultants Meeting IAEA-TECDOC-1438, March 2005, 39-44. [3] R.
Rizzoli, R. Angelucci, S. Guerri, and F. Corticelli, ASI NATO School ”Carbon Nanotubes: From
Basic Research to Nanotechnology” 21 - 31 May 2005, Sozopol, Bulgaria.
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Dipartimento di Elettronica per l’Automazione
Research topics
1) MODELING OF ORGANIC THIN FILM TRANSISTORS
Luigi Colalongo, Zsolt M. Kovacs Vajna, Anna Richelli, Emanuela Calvetti, Alessandro Savio
Collaborations: ENEA
Other sources of funding: MURST
2) DESIGN, FABRICATION AND CHARACTERIZATION OF CMOS INTEGRATED DC-DC CONVERTERS
Zsolt M. Kovacs Vajna, Luigi Colalongo, Anna Richelli, Luca Mensi
Other sources of funding: MURST, STMicroelectronics
3) RESIZING PROCEDURES FOR ANALOG DESIGN REUSE IN TECHNOLOGY
MIGRATION
Zsolt M. Kovacs Vajna, Luigi Colalongo, Anna Richelli, Alessandro Savio
4) MEMS SENSORS AND INTERFACE CIRCUITS
Vittorio Ferrari, Marco Bau’, Riccardo Brunelli, Costantino De Angelis, Alessio Ghisla
Zs. Kovacs Vajna, Daniele Marioli, Emilio Sardini, Andrea Taroni
Collaborations: Dip.Ingegneria Elettrica, Elettronica e dei Sistemi - Università di Catania
5) ENERGY HARVESTING FOR POWERING AUTONOMOUS SENSORS
Vittorio Ferrari, Marco Bau’, Marco Ferrari, Alessio Ghisla, Daniele Marioli, Andrea Taroni
Collaborations: Universidad Politecnica de Cataluna (UPC), Castelldefels, Barcelona
6) PIEZOELECTRIC ACOUSTIC-WAVE SENSORS AND MEMS IN HYBRID
TECHNOLOGY
Vittorio Ferrari, Marco Bau’, Riccardo Brunelli, Marco Ferrari, Alessio Ghisla, Daniele Marioli,
Andrea Taroni
Collaborations: Dip.Ingegneria Elettrica, Elettronica e dei Sistemi - Università di Catania, Institute
for Micro and Sensor Systems - Otto Von Gericke University, Magdeburg
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7) INTERFACE CIRCUITS FOR THICKNESS-SHEAR MODE QUARTZ SENSORS
AND CHEMICAL SENSING
Vittorio Ferrari, Marco Ferrari, Daniele Marioli, Andrea Taroni
Collaborations: Dip. Chimica e Fisica per i Materiali - Università di Brescia, Dip. Chimica
Organica ed Industriale - Università di Parma, Dep. Ingenieria Electronica - Universitad Politecnica
de Valencia, Instituto de Ingenieria Electrica - Universidad de la Republica - Montevideo - Uruguay,
Laboratoire de Physique des Liquides et Electrochimie CNRS - Universita P. et M. Curie - Paris
8) CONDITIONING ELECTRONICS FOR READING MEASUREMENT INFORMATION FROM A PASSIVE SENSOR
Mauro Serpelloni, Emilio Sardini, Daniele Marioli, Andrea Taroni
9) A CIRCUIT TO DETECT RESONANCE FREQUENCY FROM AUTONOUMOUS SENSORS BASED ON CANTILEVER MAGNETICALLY EXCITED
Mauro Serpelloni, Emilio Sardini, Vittorio Ferrari, Daniele Marioli, Costantino De Angelis, Andrea
Taroni
10) DIGITAL COMMUNICATIONS FOR INDUSTRY
Paolo Ferrari, Alessandra Flammini, Daniele Marioli, Andrea Taroni
Other sources of funding: MURST 60%
11) WIRELESS SENSOR
Sebastian Bicelli, Paolo Ferrari, Alessandra Flammini, Giuseppe Gritti, Daniele Marioli, Giuseppe
Mazzoleni, Emiliano Sisinni, Andrea Taroni
12) NUMERIC INSTRUMENT FOR CHEMICAL DETECTION
Alessandro Depari, Paolo Ferrari, Alessandra Flammini, Daniele Marioli, Stefano Rosa, Andrea
Taroni
13) SENSOR SIGNAL PROCESSING
Alessandro Depari, Paolo Ferrari, Alessandra Flammini, Daniele Marioli, Emiliano Sisinni, Andrea
Taroni
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MODELING OF ORGANIC THIN FILM TRANSISTORS
Luigi Colalongo, Zsolt M. Kovacs Vajna, Anna Richelli, Emanuela Calvetti, Alessandro Savio
Organic thin film transistors (OTFTs) have gained considerable interest due to their potential
applications in large-area, low-performance, low-cost integrated circuits. Such applications include:
driving devices for active matrix flat panel displays based on organic light emitting diodes, low-end
smart cards, radio frequency identification tags, sensors, etc. Organic semiconductors for low-cost
integrated circuits are typically deposited from solution leading to amorphous or polycrystalline
thin films. Field-effect transistors based on such materials present several appealing features: the
techniques for depositing films allow large areas to be coated, they can be vacuum-deposited at
moderate temperatures, many polymers and oligomers are soluble and may be processed by spin
coating. Furthermore, thanks to their intrinsic structural flexibility, in the case of all-polymer systems, OTFTs allow the production of flexible integrated circuits. The efficient design of complex
integrated circuits based on OTFTs requires preliminary optimization and modelling. To this purpose, the availability of accurate analytical models (SPICE like) is very important. Our activity
may be divided in three main areas: numerical simulation and physical modeling of OTFTs, analytical modeling (spice models), and development of TCAD tools for the design and verification of
integrated circuits based on such materials.
[1] E. Calvetti, L. Colalongo, Zs. M. Kovacs Vajna, “Organic Thin Film Transistors: a
DC/Dynamic model for Circuit Simulation”, Solid State Electronics , Vol. 49-4, pp. 567-577,
2005
[2] E. Calvetti, A. Savio, L. Colalongo, Zs. M. Kovacs-Vajna, “An Analytical Model for Organic
Thin-Film Transistors Operating in the Subthreshold Region”, Appl. Phys. Lett., Vol. 87, No
22, pp. 3506-3508, Nov. 2005 [3] E. Calvetti, L. Colalongo, Zs. M. Kovacs-Vajna, “A New
DC/Dynamic model for Organic Thin Film Transistors”, EDAA PhD Forum (DATE05) - Munich,
Mar 2005
DESIGN, FABRICATION AND CHARACTERIZATION OF CMOS
INTEGRATED DC-DC CONVERTERS
Zsolt M. Kovacs Vajna, Luigi Colalongo, Anna Richelli, Luca Mensi
The goal of the research activity is to design efficient integrated DC-DC converter circuits. Many
circuits, such as Flash memories, EEPROM and OTP memories, still require high internal voltages
(about 6-8V), despite of the power supply trends. Therefore, the design of efficient converters is
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getting more and more demanding as the technology scales down. The capacitive charge pumps
are widely used because they can be easily integrated. Their limitations are the high number of
stages required to boost the output voltage and the efficiency degradation due to the body effect
and channel resistances of pass transistors. From these considerations derives the need for new
converter architectures which overcome the problems described above. Other DC-DC converters are
switching regulators that use inductors or transformers as energy storage devices. They can reach
the required output voltage in a single stage and they are widely used in power electronics. Such
an approach seems to be very promising in micro electronics as well, considering that technology
evolution allows the integration of more and more efficient inductors and transformers. Today,
however, many efforts may be done to demonstrate the feasibility of fully integrated inductive
converters because the parasitics are very relevant in standard CMOS technologies.
[1] L. Mensi, L. Colalongo, A. Richelli, Zs. M. Kovacs-Vajna, “A new integrated charge pump
architecture using dynamic biasing of pass transistors”, Esscirc - Grenoble, pp. 85-88, Sep. 2005
[2] L. Mensi, A. Richelli, L. Colalongo, Zs. M. Kovacs-Vajna, “Charge Pump Circuit with Reuse
of Accumulated Electrical Charge”, U.S.A. Patent Appl. No. 11/261,397, filing date: 28.10.2005
RESIZING PROCEDURES FOR ANALOG DESIGN REUSE IN TECHNOLOGY
MIGRATION
Zsolt M. Kovacs Vajna, Luigi Colalongo, Anna Richelli, Alessandro Savio
In recent years, there is an increasing interest in design porting, in the analog circuits also, due
to the rising gap between circuit complexity and designer productivity. The trend to include analog
and digital blocks in the same chip has caused growing difficulties for system on chip designers.
While the synthesis of digital circuits is a highly automated process, the analog design is still a
hand based procedure and it is usually the bottleneck of the whole project. During technology
migration the overall behaviour of analog circuits is often modified and performance is reduced.
Hence, analog migration is not a straightforward task and it often involves a complete redesign.
As a first solution, we use an analytical migration approach that allows for the scaling of analog
circuits with MOSFETSs in the triode and saturation regions. Resizing rules are based on the
application of the ACM MOSFET model. The bias conditions of each transistor are described
by forward and reverse inversion levels if and ir. If we impose that the gain-bandwidth product
(GBWP) and the dynamic range (DR) of an amplifier are kept constant during the scaling, we can
find two different migration strategies: the constant inversion level scaling that preserves original
inversion levels and the channel length scaling that reduces channel lengths, inversion levels and
power dissipation. These scaling equations, which are valid for a wide class of analog circuits and
do not depend on circuit topologies, provide an analytical method for the migration of an analog
circuit. On the contrary, scaling rules do not account for MOSFET parasitics so inaccurate solutions
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are still possible. If this is the case, at each step the AC responses are compared to the original
circuit ones and the MOSFET aspect ratios are modified by the Levenberg-Marquardt algorithm:
the original and the scaled circuit frequency responses should be suitably sampled, for example
using 10 points per decade. This approach also allows the sizing of a compensation network. As a
drawback, the method requires the definition of input and output terminals, hence the generality
of the conductance fitting is reduced. When the transient response becomes an important issue,
the scaling methods based on conductance or AC fitting may not ensure good results. The above
migration procedures are suitable for the scaling of small signal circuits whereas the transient fitting
is applicable to non-linear circuits such as comparators or charge pumps as well. As in the AC
fitting, input and output terminals have to be defined. The curve to be fitted is the circuit response
to a time dependent input signal. At each step, if the response does not match the desired output,
the tuning algorithm modifies the MOSFET aspect ratios to reduce the overall square error. As a
drawback, the procedure requires very time consuming transient simulations.
[1] A. Savio, L. Colalongo, M. Quarantelli, Zs. M. Kovacs-Vajna, “Resizing Procedures for Analog
Design Reuse in Technology Migration”, EDAA PhD Forum (DATE05) - Munich, Mar 2005
MEMS SENSORS AND INTERFACE CIRCUITS
Vittorio Ferrari, Marco Bau’, Riccardo Brunelli, Costantino De Angelis, Alessio Ghisla
Zs. Kovacs Vajna, Daniele Marioli, Emilio Sardini, Andrea Taroni
Silicon and silicon-based sensors manufactured in MEMS technology are studied together with
tailored interface circuits. A resonant accelerometer with electrothermal excitation and piezoresistive detection has been manufactured in silicon bulk micromachining. A phase-locked loop
oscillator was designed which compensates for the the parasitic cross-talk made important by the
comparatively low quality factor of the microsensor due to air damping. A multi-axial piezoresistive
accelerometer has been manufactured in silicon bulk micromachining. By a dynamic reconfiguration of the piezoresistors in different active bridges, the capability of a triaxial response has been
preliminarily demonstrated. The possibility of exciting and interrogating passive microresonators
in a contactless way is being studied. This is done with the aim of obtaining miniaturized passive
sensing elements suitable for harsh or poorly-accessible environments where active circuitry cannot
usually be inserted and operated. An ASIC front-end interface for resistive-bridge sensors has been
designed, produced in 0.7um CMOS technology, and tested. The circuit advantageously provides
two independent sensor measurements on the same rectangular-wave output signal, respectively
supported by the frequency and the duty-cycle.
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[1] V. Ferrari, A. Ghisla, D. Marioli, A. Taroni, ”Silicon Resonant Accelerometer with Electronic
Compensation of Input-Output Cross-Talk” Sensors and Actuators A, 123-124, (2005) 258-266. [2]
V. Ferrari, A. Ghisla, D. Marioli, A. Taroni, ”Electronic Suppression of Input-Output Cross-Talk
in a Micromachined Resonant Accelerometer”, Proceedings of First International Workshop on Advances in Sensors and Interfaces IWASI 2005, Bari, ITALY, April 19-20, 2005, Edizioni Giuseppe
Laterza, 45-50. [3] G. Fagnani, V. Ferrari, A. Ghisla, D. Marioli, A. Taroni, ”Resonant Accelerometer in Micromachined Silicon”, Proceedings of the 9th Italian Conference on Sensors and
Microsystems, Ferrara, 8-11 Febbraio 2004, World Scientific Publishing, Singapore, 2005, 241-245.
[4] V. Ferrari, A. Ghisla, Zs. Kovacs Vajna, D. Marioli, A. Taroni, ”ASIC Font-End Interface with
Frequency and Duty Cycle Output for Resistive-Bridge Sensors”, Proceedings of the Eurosensors
XIX Conference, Barcelona, Spain, 11-14 September, 2005. [5] C. De Angelis, V. Ferrari, D.
Marioli, E. Sardini, M. Serpelloni, A. Taroni, ”Magnetically Induced Vibrations on a Conductive
Cantilever for Resonant Microsensors”, Proceedings of the Eurosensors XIX Conference, Barcelona,
Spain, 11-14 September, 2005. [6] D. Belleri, V. Ferrari, A. Ghisla, F. Lucchini, D. Marioli, A.
Taroni, ”Accelerometro Multiassiale MEMS con Riconfigurazione Dinamica dei Ponti Piezoresistivi”, Atti del XXII Congresso Nazionale Associazione Misure Elettriche ed Elettroniche GMEE,
Altavilla Milicia (PA), 5-7 Settembre 2005, 113-114. [7] V. Ferrari, D. Marioli, E. Sardini, M.
Serpelloni, A. Taroni, ”Vibrazioni Indotte Tramite Campo Magnetico su un Cantilever Conduttivo
per Microsensori Risonanti”, Atti del XXII Congresso Nazionale Associazione Misure Elettriche
ed Elettroniche GMEE, Altavilla Milicia (PA), 5-7 Settembre 2005, 127-128. [8] V. Ferrari, A.
Ghisla, D. Marioli, A. Taroni, ”Soppressione elettronica del cross-talk in un accelerometro risonante
MEMS”, Riunione Annuale GE2005, Naxos, 30 giugno-2 luglio 2005.
ENERGY HARVESTING FOR POWERING AUTONOMOUS SENSORS
Vittorio Ferrari, Marco Bau’, Marco Ferrari, Alessio Ghisla, Daniele Marioli, Andrea Taroni
Prototypes of mechano-electrical energy converters based on the piezoelectric effect have been
fabricated and tested for powering autonomous sensor nodes from background vibrations. Demonstrators have been built which are powered by such converters, interface to passive sensors, and
intermittently trasmit the sensor readings over a short-range radiofrequency link. The developed
systems can operate indefinitely and unattended, without any internal battery required. Poweraware architectures for sensor interfacing are studied and tested at the system level, in order to
assess and improve the performances obtainable with energetically-autonomous sensors.
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[1] M. Ferrari, V. Ferrari, D. Marioli, A. Taroni, ”Modeling, fabrication and performance measurements of a piezoelectric energy converter for power harvesting in autonomous microsystems”,
Proceedings of the IEEE Instrumentation and Measurement Technology Conference (IMTC/05),
Ottawa, Canada, 16-19 May 2005, 1862-1866. [2] M. Ferrari, V. Ferrari, D. Marioli, A. Taroni,
”Thick-film piezoelectric energy converter for powering autonomous microsystems from background
vibrations”, Proceedings of First International Workshop on Advances in Sensors and Interfaces
IWASI 2005, Bari, ITALY, April 19-20, 2005, Edizioni Giuseppe Laterza, 54-58. [3] M. Ferrari, V.
Ferrari, D. Marioli, A. Taroni, ”Thick-Film Piezoelectric Energy Converter for Power Harvesting
in Autonomous Microsystems”, Proceedings of the Eurosensors XIX Conference, Barcelona, Spain,
11-14 September, 2005. [4] M. Ferrari, V. Ferrari, D. Marioli, A. Taroni, ”Trasmissione Contactless
dell’Informazione di Misura da un Sensore Autonomo Alimentato Mediante Convertitore Piezoelettrico a Recupero di Energia”, Atti del XXII Congresso Nazionale Associazione Misure Elettriche
ed Elettroniche GMEE, Altavilla Milicia (PA), 5-7 Settembre 2005, 335-344. [5] M. Ferrari, V.
Ferrari, D. Marioli, A. Taroni, ”Convertitore piezoeletrico a recupero di energia per alimentazione
dei microsistemi autonomi”, Riunione Annuale GE2005, Naxos, 30 giugno-2 luglio 2005.
PIEZOELECTRIC ACOUSTIC-WAVE SENSORS AND MEMS IN HYBRID
TECHNOLOGY
Vittorio Ferrari, Marco Bau’, Riccardo Brunelli, Marco Ferrari, Alessio Ghisla, Daniele Marioli, Andrea Taroni
Microresonators have been developed comprising a suspended micromass in SoI (Silicon on Insulator) technology with built-in piezoresitors, mounted on a lead zirconate titanate (PZT) screenprinted driving element that provides off-chip excitation of the resonance of the micromass. Such a
hybrid configuration conveniently offers the possibility of realizing resonant microstructures usable
as sensitive microbalance elements for chemical sensing, at the same time avoiding the need to
insert the piezoelectric layers within the process of MEMS fabrication, thereby avoiding the need
to address compatiblity issues. The direct coupling of PZT thick films with silicon micromachined
membranes is being studied with the final aim of obtaining ultrasound microarrays. The resulting
compatibilty issues between the thick-film process used for the PZT layers and the silicon microfabrication process are being investigated, and the vibration behaviour of different test microstructures
is being analyzed and modeled.
[1] S. Baglio, V. Ferrari, A. Ghisla, V. Sacco, N. Savalli, A. Taroni, ”SOI Mass-Sensitive Microresonators with Off-Chip Piezoelectric Excitation by PZT Thick Films”, Proceedings of the IEEE
Instrumentation and Measurement Technology Conference (IMTC/05), Ottawa, Canada, 16-19
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May 2005, 1736-1739. [2] S. Hirsch, S. Doerner, D.J. Salazar Velez, R. Lucklum, B. Schmidt, P.
Hauptmann, V. Ferrari, M. Ferrari, ”Thick-Film PZT Transducers For Silicon Micro Machined Sensor Array”, Proceedings of IEEE Sensors 2005 Conference, Irvine, CA, USA, October 31-November
1, 2005, 444-447. [3] S. Doerner, S. Hirsch, R. Lucklum, B. Schmidt, P.R. Hauptmann, V. Ferrari, M. Ferrari, ”MEMS ultrasonic sensor array with thick film PZT transducers”, Proceedings of
IEEE International Ultrasonics Symposium 2005, Rotterdam, The Netherlands, September 18-21,
2005, 487-490. [4] B, And, S. Baglio, S. Graziani, N. Pitrone, V. Sacco, N. Savalli, R. Brunelli,
V. Ferrari, A. Ghisla, D. Marioli, A. Taroni, ”Multisensori di Massa Risonanti in Tecnologia SoI
con Eccitazione Esterna per mezzo di Film Spessi di PZT”, Atti del XXII Congresso Nazionale
Associazione Misure Elettriche ed Elettroniche GMEE, Altavilla Milicia (PA), 5-7 Settembre 2005,
325-334.
INTERFACE CIRCUITS FOR THICKNESS-SHEAR MODE QUARTZ SENSORS
AND CHEMICAL SENSING
Vittorio Ferrari, Marco Ferrari, Daniele Marioli, Andrea Taroni
Circuit configurations are studied to accurately detect and track the resonant frequency of
quartz-crystal microbalance (QCM) and thickness-shear-mode (TSM) sensors and maximize their
operating range under heavy acoustic and dielectric loading, such as encountered in liquid solutions
for chemical and biochemical sensing. An oscillator circuit has been developed that innovatively
provides the automatic capacitance compensation (ACC) of the sensor parallel capacitance, and
advantageously outputs three signals related to the instantaneous values of the sensor series resonant
frequency, quality factor, and compensated parallel capacitance. A configuration and method for
contactless readout of the resonance response of a TSM quartz resonator sensor has been proposed.
The configuration uses a crystal with a large common electrode on the front face, and one, or
more, small electrodes on the back face, leading to localized sensing regions. Each back electrode
is capacitively coupled to a separated tip electrode. The tip consists of a small disc and a guard
ring, which confine the electric field to the electrode area and make the measurement unaffected by
the stray parallel capacitances. Analysis shows that, by a proper choice of the reference frequency
around resonance, it is possible to obtain frequency readings that do not depend on the tip-tocrystal stand-off distance. Obtained experimental results demonstrate that a mass load added on
the front electrode can be consistently detected and measured irrespective of the tip-to-crystal
stand-off distance.
[1] L. Sartore, M. Penco, S. Della Sciucca, G. Borsarini,V. Ferrari, ”New Carbon Black Composite
Vapor Detectors Based on Multifunctional Polymers” Sensors and Actuators B, 111-112, (2005)
160-165.. [2] M. Ferrari, V. Ferrari, D. Marioli, A. Taroni, ”Automatic Capacitance Compensation
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(ACC) Oscillator for TSM Quartz sensors under Acoustic and Dielectric Loading”, Proceedings
of the 9th Italian Conference on Sensors and Microsystems, Ferrara, 8-11 Febbraio 2004, World
Scientific Publishing, Singapore, 2005, 217-221. [3] L. Steinfeld, M. Ferrari, V. Ferrari, A. Arnau
Vives, H. Perrot, ”Contactless Confined Readout of Quartz Crystal Resonator Sensors” Proceedings
of IEEE Sensors 2005 Conference, Irvine, CA, USA, October 31-November 1, 2005, 457-460.
CONDITIONING ELECTRONICS FOR TRANSMISSION OF MEASUREMENT
INFORMATION BY A PASSIVE SENSOR
Mauro Serpelloni, Emilio Sardini, Daniele Marioli, Andrea Taroni
A measurement method for an inductive telemetric system useful for capacitance transducers
and with distance compensation has been previously proposed and tested. The telemetric system
consists of two planar inductors: one is connected to the sensing element, commonly a capacitance
transducer, and the other to the measuring circuit (readout circuit). The telemetric system has
been also used for relative-humidity measurement: a set of passive sensing element consisting of
planar inductance and hydrophilic polymers have been obtained. The corresponding humidity is
read from the readout inductance by using an impedance analyzer. A conditioning electronic circuit
to measure the humidity from the readout inductance is under development. It consists of a VCO
driving the readout inductance, which is connected to a I-V converter; the current (I) and voltage
(V) are squared and filtered to obtain continuous values; the last stage is a logarithmic amplifier
that permits to obtain the ratio of the two entities.
[1] D. Marioli, E. Sardini, M. Serpelloni, A. Taroni, “A New Measurement Method for Capacitance
Transducers in a Distance Compensated Telemetric Sensor System”, Measurement Science and
Technology (MST) 16 (2005), 1593-1599. [2] D. Marioli, E. Sardini, M. Serpelloni, A. Taroni,
“Contactless transmission of Measurement Information Between Sensor Conditioning Electronics
”, Proceedings IEEE IMTC 2005 Ottawa, 394-399.
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A CIRCUIT TO DETECT RESONANCE FREQUENCY FROM AUTONOUMOUS
SENSORS BASED ON CANTILEVER MAGNETICALLY EXCITED
Mauro Serpelloni, Emilio Sardini, Vittorio Ferrari, Daniele Marioli, Costantino De Angelis, Andrea Taroni
A technique to excite resonant sensors by a magnetic field has been analyzed and tested in the
laboratory. A cantilever covered with a conductive and non-magnetic film, located in a time- variable magnetic field, is brought into resonance thanks to the interaction between the eddy currents
in the conductive film and the external magnetic field. The technique proposed can be applied
to resonant microsensors obtained through a MicroElectroMechanical-System (MEMS) technology
based, for example, on a standard CMOS process. The testing equipment was constituted by a
piezoelectric bimorph covered by two aluminium sheets used as cantilever: the piezoelectric has
bee only used to detect the induced vibrations. A sinusoidal generator, followed by a power amplifier that drives a coil inductor, works as a magnetic field generator. The power amplifier drives
the coil with a voltage up to +/-30V with a maximum current of 5A and its bandwidth is about
100kHz. The oscillations are revealed by a charge amplifier, which has a differential input stage
and an instrumentation amplifier as output stage, it has a gain of 5 and a bandwidth of 100kHz.
Experimental results demonstrate that, when the time-variable magnetic field is applied, resonant
vibrations are induced and measured by the piezoelectric cantilever. A conditioning circuit based
on the possibility to detect the resonance is under development.
[1] C. De Angelis, V. Ferrari, D. Marioli, E. Sardini, M. Serpelloni, A. Taroni, “Magnetically Induced Vibrations on a Conductive Cantilever for Resonant Microsensors”, Proceedings eurosensors
XIX Barcelona Spain (2005), Wpb48.
DIGITAL COMMUNICATIONS FOR INDUSTRY
Paolo Ferrari, Alessandra Flammini, Daniele Marioli, Andrea Taroni
Digital communications for industry are moving from fieldbus to emerging Real Time Ethernet
(RTE) protocols. Ethernet is the natural physical layer of more used protocols (first of all TCP/IP);
the idea to use it even at the field level took place in the last years thanks to the more efficient
switch-based architecture, to the increased transmission rate and to the availability of low-cost
devices. Recently proposed RTE protocols, as Powerlink, PROFINET IO, EtherCAT, MODBUSRTPS allow more powerful performances if compared to traditional fieldbuses. Attention has been
focussed on PROFINET thanks to its flexibility, but special hardware tools are needed to reach
hard real time performance. In this area a new RTE protocol has been developed to solve an
isochronism problem yielding to an international patent. In this area a new research concerning
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performance evaluation and related instrumentation is growing. In fact simulator are lacking in
terms of models of the new proposed protocols and ICT instrumentation seems not suitable as
performance to be evaluated are below 1us. A new multi-probe instrument has been designed and
a first prototype of the probe has been realized with performance in the order of 100ns.
[1] FERRARI P., FLAMMINI A., VITTURI.S. (2005). Response Times Evaluation of PROFINET
Networks. International Symposium on Industrial Electronics (ISIE2005). June 20-23. (vol. 4, pp.
1371-1376). ISBN 0-7803-8739-2. Dubrovnik, Croatia. [2] DEPARI A., FERRARI P., FLAMMINI
A., MARIOLI D., TARONI A. (2005). A New Instrument for Real-Time Ethernet Performance
Measurement. IEEE Instrumentation and Measurement Technology Conference (IMTC05). May
16-19. (vol. 3, pp. 1803-1807). ISBN 0-7803-8880-1. Ottawa, Canada.
WIRELESS SENSOR
Paolo Ferrari, Alessandra Flammini, Daniele Marioli, Emiliano Sisinni, Andrea Taroni
This research activity deals with wireless sensor networks. Starting from analysis of commercial components, as RF-microcontrollers, performance in terms of power dissipation and timings
have been experimentally tested. To achieve scalability, that is the possibility to dynamically
add or remove sensors, standard solutions have been exploited. As regard industrial environment,
IEEE802.11-based solutions have been designed to reduce cost (8-bit microcontroller) and experimentally characterized. To further limit costs, Bluetooth networks (Piconet) have been realized
to replace segments of fieldbus. Performance of Bluethooth modules, managed by a 8-bit microcontroller, demonstrate that timings allow cycle time in the order of 10ms, while power consuming
is in the order of 200mW. To reduce power consuming and allow rechargeable battery use, new
solutions have been experimentally investigated, as WUSB or Zigbee (IEEE802.15.4): the latter
seems the most attractive alternative for wireless sensors. Channel diversity has been exploited in
low-power wireless sensor networks to increase battery life.
[1] FERRARI P., FLAMMINI A., MARIOLI D., SISINNI E., TARONI A. (2005). A Bluetoothbased Sensor Network with Web Interface. IEEE TRANSACTIONS ON INSTRUMENTATION
AND MEASUREMENT. vol. 54, pp. 2359-2363 ISSN: 0018-9456. [2] FLAMMINI A., GRITTI
G., MARIOLI D., SISINNI E., TARONI A. (2005). An Adaptive Channel Selection Method for
Wireless sensor Networks. International Workshop on Advanced Sensor Interfaces 2005 (IWASI05).
April 19-20 2005. (pp. 165-170). ISBN 88-8231-323-9. Bari, Italy. [3] FLAMMINI A., MARIOLI
D., MAZZOLENI G., SISINNI E., TARONI A. (2005). A low-power solution of wireless sensor
network. Eurosensors XIX. Sep 11-14. (vol. 2). Barcelona, Spain (WPa43). [4] BICELLI S.,
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FLAMMINI A., MARIOLI D., SISINNI E., TARONI A. (2005). Implementation of an energy
efficient wireless smart sensor. Eurosensors XIX. Sep 11-14. (vol. 1). Barcelona, Spain (TC3).
NUMERIC INSTRUMENT FOR CHEMICAL DETECTION
Alessandro Depari, Alessandra Flammini, Daniele Marioli, Andrea Taroni
This research activity presents a numeric instrument for chemical detection. In this electronic
nose chemical sensors have a resistive value that could vary in the range from tens of GOhm down
to kOhm. A new low-cost circuit, that acts as a resistance to period converter, has been proposed
starting from a previous solution that suffered from sensibility to sensor capacitive effects. In this
new approach (European patent) the sensor is normally DC powered and a suitable management of
thresholds and references allows high resolution (better than 0.1%) and very good linearity (better
than 1% of relative error over more than 6 decades of ranges). The method has been further
improved to estimate small parasitic capacitance (1-10pF) in parallel to the resistor. The output
period (frequency from 1 Hz to 1 MHz) is suitable to be interfaced to a low-cost microcontroller or a
counting device. New MLP-based techniques have been studies to estimate and quantify substance
even in moisture. Suitable features related to the sensor recovery phase has been used in addition to
well-known features in order to realize a low-cost elecronic nose, based on a simple microcontroller,
for domestic use.
[1] DEPARI A., FALASCONI M., FLAMMINI A., MARIOLI D., ROSA S., SBERVEGLIERI
G., TARONI A. (2005). A New Hardware Approach to Realize Low-Cost Electronic Noses. IEEE
Sensors2005. Oct 31 - Nov 3. Irvine, USA (CA) [2] DEPARI A., FALASCONI M., FLAMMINI A.,
MARIOLI D., ROSA S., SBERVEGLIERI G., TARONI A. (2005). Substance Classification and
Measure for Low Cost Electronic Noses. IEEE Sensors2005. Oct 31 - Nov 3. Irvine, USA (CA) [3]
M. VEZZOLI, M. PARDO, M. FALASCONI, FLAMMINI A., A. DEPARI, G. SBERVEGLIERI.
(2005). Feature Selection on High and Low Resistance Sensors. AISEM - Associazione Italiana
Sensori e Microsistemi. 15-17 Febbraio. Firenze, Italy.
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SENSOR SIGNAL PROCESSING
Alessandro Depari, Paolo Ferrari, Alessandra Flammini, Daniele Marioli, Emiliano Sisinni, Andrea Taroni
Linear Variable Differential Transformer (LVDT) and Differential Variable Reluctance Transducer (DVRT) position sensors are widely used in industrial applications thanks to their good characteristics in terms of repeatability, stability, reliability and linearity. A new method for LVDTs
and DVRTs signal processing, based on a spectral estimation of the differential secondary signal,
has been developed to avoid the dependence on cos(fi) (where fi is the phase difference between the
signal applied to the primary and the differential secondary signal). The realized system, based on
a ADSP21160, is able to estimate position of up to 11 half-bridges in less than 0.4ms achieving a
resolution of 0.1%FS. As regard sensors array management, some linearization tools (Best fitted
plane in the least mean square sense, Look-up table, Neural networks) have been tested, with particular attention to an ANFIS method, to estimate biaxial position by a pyroelectric sensor array.
To experimentally verify simulation results, a DSP-based electronic circuit has been realized.
[1] DEPARI A., FERRARI P., FERRARI V., GHISLA A., FLAMMINI A., MARIOLI D., TARONI A. Digital Signal Processing for Biaxial Position Measurement with a Pyroelectric Sensor
Array. IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT. vol. IM-55
n.2, pp. 501-506 ISSN: 0018-9456. [2] FLAMMINI A., A., MARIOLI, D., SISINNI, E., TARONI, A. (2005). A Multichannel DSP-Based Instrument for Displacement Measurement Using
Differential Variable Reluctance Transducer. IEEE TRANSACTIONS ON INSTRUMENTATION
AND MEASUREMENT. vol. 54, pp. 178-183 ISSN: 0018-9456. [3] DEPARI A., FLAMMINI A.,
MARIOLI D., TARONI A. (2005). Application of an ANFIS Algorithm to Sensor Data Processing.
IEEE Instrumentation and Measurement Technology Conference (IMTC05). May 16-19. (vol. 3,
pp. 1596-1599). ISBN 0-7803-8880-1. Ottawa, Canada.
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CAGLIARI
Dipartimento di Ingegneria Elettrica ed Elettronica
Research topics
1) RELIABILITY OF ELECTRONICS DEVICES AND ELECTRON MICROSCOPY
Massimo Vanzi, Giovanni Martines, Francesca Mighela, Andrea Morelli, Giovanna Mura, Ruggero
Pintus, Simona Podda
Collaborations: Universitdi Modena e Reggio Emilia, Universitdi Padova, Thermowatt, Datalogic,
Digitek, Pirelli Labs, CRS4, FEICompany, Magneti Marelli, Consorzio 21, Neuroscienze
Other sources of funding: MURST, CNR
2) VLSI ARCHITECTURES, CIRCUITS AND MICROSYSTEMS FOR DISTRIBUTED VISUAL ELABORATIONS
Gian Nicola Angotzi, Massimo Barbaro, Luigi Raffo
Collaborations: Universitá di Genova
3) VLSI ARCHITECTURES, ELABORATION AND COMMUNICATION TECHNIQUES FOR SISTEM-ON-CHIPS
Salvatore M. Carta, Giovanni Busonera, Luigi Raffo
4) NETWORK ON CHIP ARCHITECTURES
Gianni Mereu, Paolo Meloni, Salvatore M. Carta, Luigi Raffo
Collaborations: ST Microelectronics, Universitá di Bologna
5) BIOMOLECULAR INTEGRATED CMOS SENSORS
Massimo Barbaro, Annalisa Bonfiglio, Luigi Raffo
Collaborations: INFM - S3 Modena
6) SWARM VLSI SYSTEMS FOR DISTRIBUTED DATA PROCESSING
Danilo Pani, Luigi Raffo
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7) NEW ELECTRONIC DEVICES MADE BY ORGANIC MATERIALS FOR NON
CONVENTIONAL APPLICATIONS
Annalisa Bonfiglio, Piero Cosseddu, Ileana Manunza, Mauro Morana, Emanuele Orgiu
Collaborations: Centro S3 ”nanoStructures and bioSystems at Surfaces” INFM Modena, Centro
Piaggio Universita di Pisa, Smartex Pisa, Institute for Materials Research University of Limburgs,
Siemens - Erlangen, Germany, Konarka Linz, Austria, ISM-CNR Bologna, EU Joint Research
Centre IHCP Ispra
Other sources of funding: INFM, EU-Future and Emerging Technologies, Ministero per l’Università
e la Ricerca Scientifica, quota 60% e progetto FIRB
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RELIABILITY OF ELECTRONICS DEVICES AND ELECTRON MICROSCOPY
M.Vanzi, G.Martines, F.Mighela, A.Morelli, G.Mura, R.Pintus, S.Podda
The research activities, described in the previous annual report, has been focalized on specific
application as: - Reliability of GaN emitters: The research, developed in collaboration with the
University of Padova, has been extended to different typology of substrates (SiC and Sapphire),
and to High Power Light emitters diodes for civil and industrial illumination applications. The consolidated de-processing technique, makes available a complete chemical, physical and geometrical
device characterization. - Reliability of silicon devices: the demonstrated availability of advanced
analytical techniques, permits started cooperation with industrial partners as Datalogic, Digitek,
Termowatt and Magneti Marelli. The activity has been focalized to on field reliability, with some
particular emphasis on Formula1 and MotoGP electronics components. - Selective Gold etch in
electronic devices: a new project related to gold recovery from electronic waste has been promoted
in collaboration with the Department of Inorganic and Analytic Chemistry of the University of
Cagliari, RAS and Consorzio 21 - A new procedure for TEM-oriented thin section preparation of
stressed and virgin single commercial devices has been ultimated. This technique has been developed for investigating failure modes, up to micro-structural level, of real devices. - Reverse
rendering: this technique, related with the domain called shape from shading, has been implemented to authenticate artistic and archaeological items. The effectiveness of this technique in
scanning electron microscopy has also been proven with the 3D reconstruction of many samples as
parts of insects, detail of electronic structures, bullets for ballistics analysis etc.. - Remote control
of electron microscopy: during this year the remote control activity has been accelerated thanks
to the active cooperation of FEI Company (the main microscopy manufacturer in Europe) that
made available some proprietary codex to develop a common interest product. In 2005 a prototype
should be presented. - Laser modelling: In 2004 was born an intensive collaboration with Pirelli
labs related to gain and resonance modes modelling and reliability analysis of tunable external
cavity laser. This devices are used in RAMAN amplifiers. The complexity of assemblage makes
difficult any reliability estimation. The research aims to build up an interpretation platform for
life-test data of single system part, for interpreting the behaviour of the complete system.
[1] Pintus R., S. Podda, F. Mighela and M. Vanzi Quantitative 3D reconstruction from BS imaging
Microelectronics Reliability 44, 2004 1547-1552.
[2] Mura G., M. Vanzi, G. Micheletti Failure Analysis of RFIC Amplifiers Microelectronics Reliability 44, 2004 1599-1604
[3] Podda S., M. Vanzi, G. Cassanelli, F. Fantini Failure Analysis of RuO2 Thick Film Chip
Resistors Microelectronics Reliability 44, 2004 1763-1767
[4] Morelli A., M. Vanzi, F. Artizzu, M. C. Cabras, P. Deplano, M. L. Mercuri, A Serpe, E
Trogu. An Effective Method for Gold Dissolution in Microelectronic Devices Failure Analysis
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XXXII Congresso Nazionale della Divisione di Chimica Inorganica della SocietChimica Italiana.
Roma, 20-23 Settembre 2004.
VLSI ARCHITECTURES, CIRCUITS AND MICROSYSTEMS FOR
DISTRIBUTED VISUAL ELABORATIONS
Gian Nicola Angotzi, Massimo Barbaro, Luigi Raffo
In the domain of microelectronic design for signal processing, this research covers the whole
pathway from the conception of the algorithm which solves a specific problem to the description
of an architecture able to implement it and to the digital/analog design of an application specific
device.
The research on vision systems has been addressed to the behaviour of lattice networks for
modeling arrays of sensors with local interaction. Different kind of imagers integrating photsensors
and processing circuits have been developed. These imagers implement low-level vision tasks such
as spatial and temporal convolutions with low-power and real-time capabilities. On-chip processing stages have been developed both with an ultra low-power, medium accuracy approach based
on weak-inversion transistors and with a low-power, high-accuracy approach based on switched
capacitors.
Simulation and experimental results prove the feasibility of the approach and the fulfillment of
real-time and low-power constraints.
VLSI ARCHITECTURES, ELABORATION AND COMMUNICATION
TECHNIQUES FOR SISTEM-ON-CHIPS
Salvatore M. Carta, Giovanni Busonera, Luigi Raffo
The growing introduction of new electronic devices and applications leads to heterogeneous
electronics systems, managing a number of different activities. To optimize overall computational
and energy efficiency, each activity needs a dedicated, properly sized subsystem. This computational and design challenge drives the development of increasingly more complex multi-processor
Systems-On-Chip (MPSoCs). In this scenario the most critical factor will be related to the communication scheme among components. The most promising answer in the search for more efficient
communication paradigm for future MPSoC systems comes from the Network on Chip (NoC) proposal [2][6]. This kind of networks intrinsically meets the major requirements for future SoCs:
reusability, scalability and parallelism, while coping with power constraints and clock distribution.
We are developing a new network on chip architecture, switch and network interface (ni in the
following), conceived following these principles: (i) minimum switch architectural complexity, to
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maximize allowable frequency and to minimize area, power dissipation and network latency; (ii)
topology indipendence, to adapt to heterogenos communication needs of future MPSoCs; (iii) multiple standards interfacing, to allow integration with the larger number of SoC cores. We named
this architecture sheerNet, to underline our will to make it the most light (sheer) as possible. So, no
QoS services are supported, and all control overhead due to packet disassembling and reassembling
in (more or less indipendent) flits is avoided simply transmitting the whole packet on communication lines in a single cycle. Each packet encodes data and/or address related to a single or burst
read and write transactions, and overhead bits added to handle packet routing are minimized: 3 for
packet type encoding plus 2*log2 (number of network interfaces) bit for internal NoC addressing.
Switch and NIs are modeled in Verilog HDL using a RTL synthetizable style, synthesized on a 0.13
micron CMOS technology and validated using an example MPSoC architecture and benchmark.
NETWORK ON CHIP ARCHITECTURES
Gianni Mereu, Paolo Meloni, Salvatore M. Carta, Luigi Raffo
Today design challenges push the engineers to bring interconnect subsystems to a performances
level day by day higher. Network on Chip architectures popularity comes directly from the growing interest around System-on-Chip and Multi-Processor-System-on-Chip techologies. In a SoCoriented approach the designer integrates in the same chip different Intellectual Property cores, with
different functionalities (ALUs, pheripherals controllers, RAM blocks). The design philosophy oriented to the concept of Multi-Processor-System-on-Chip is even more up-to-date, and surely pushes
engineers to study and to improve the interconnect technologies available today . Furthermore the
growth of the number of elements that need to be interconnected is starting to increase the negative
side effects of classical shared bus architectures, and pose the need for an interconnection system
that allows more than one IP to use the communication resources at the same time. For all these
reasons the NoC approach appears to be the most promising solution at hand. In this framework,
our research aims to the development of a library of synthesis oriented modules (network interfaces
and switches) for the implementation of different kinds of NoCs.
BIOMOLECULAR INTEGRATED CMOS SENSOR
Massimo Barbaro, Annalisa Bonfiglio, Luigi Raffo
A novel solid-state sensor for label-less detection of biomolecular processes (DNA hybridization, gene-antigene interaction, proteomics) is being investigated. The device may be realized in a
standard CMOS process, providing fully electronic readout and large-scale of integration of biosensors on a single chip. A model of the device was developed and simulated. Testing of the chip
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required the realization of a microchannels system. First experimental results prove the feasability of the approach. [1] M. Barbaro, A. Bonfiglio, L. Raffo, A. Alessandrini, P. Facci, I. Barak,
”BEST: biomolecular recognition by integrated smart-sensor technology”, 13th NID workshop,
Athens (Greece), 4-6 February 2004
SWARM VLSI SYSTEMS FOR DISTRIBUTED DATA PROCESSING
Danilo Pani, Luigi Raffo
Swarm Intelligence approach at the moment mainly concern software for optimization and
problem-solving algorithms (ie.: TSP), adaptive routing algorithms in communication networks,
and robotics. Differently from other bio-inspired approaches, the Swarm Intelligence has not been
exploited yet in the field of VLSI system design, even if this field should be a very promising
research area. The goal of this research work is to investigate the applicability of Swarm Intelligence
paradigm to VLSI digital processing, to exploit its most important properties. Particularily we
consider very interesting the lightness of distributed control strategies that we want to apply to
the government of a cooperative set of interacting hardware agents able to perform arithmetic
operations. The field of applicability of the approach is very wide: from digital signal processing
to matrix manipulation, from big number crunching to intrinsically fault tolerant systems.
[1] D. Pani, L. Raffo, ”A Swarm Intelligence Based VLSI Multiplication-and-Add Scheme”, PPSN
VIII: 8th International Conference, 2004, September 18-22, Birmingham (UK)
[2] D.Pani, L.Raffo, ”A VLSI Multiplication-and-Add Scheme Based on Swarm Intelligence Approaches”, ANTS 2004, 2004, September 5-8, Brussels
NEW ELECTRONIC DEVICES MADE BY ORGANIC MATERIALS FOR NON
CONVENTIONAL APPLICATIONS
Annalisa Bonfiglio, Piero Cosseddu, Ileana Manunza, Mauro Morana, Emanuele Orgiu
Organic devices are deeply studied in Molecular Electronics, a discipline which is trying to
achieve two main goals: the first is the employment of organic materials as alternative to inorganics
in applications where they are not suitable both for economic or for technological reasons, the second
is the reasearch about single molecule devices. Following the first approach, we are involved, in
collaboration with the University of Pisa (Centro E. Piaggio) and with a start-up company in
the textile field, in the development of organic material based Thin Film Transistors with the
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aim of producing completely flexible devices, suitable for large area applications. In this field, we
are working towards obtaining a flexible field effect device with a shape factor suitable for being
employed in a textile process. Coniugated polymers and oligomers are the most promising materials
for organic devices. Thinking to devices made with organic materials requires to take into account
many changes, first of all those concerning the structure. OFETs are made according to a TFT
(Thin Film Transistor) structure, very diffused in the case of low conductivity materials, as, for
example, hydrogenated amorphous silicon. In this structure, source and drain are ohmic contacts
made directly on the channel semiconductor. The channel and the substrate are in contact and
therefore the low level of the off current is guaranteed only by the low conductivity of the organic
semiconductor. Another difference with MISFET is that TFT is an accumulation device. Like
MISFETs, when the gate voltage is below a threshold value, the device is off while, when it is
above threshold (a negative threshold), positive charges are attracted at the interface between
organic and insulator and a (more) conductive channel is formed between drain and source. When
the device is on, a negative drain-source voltage will cause a current flow. With most organic
semiconductors, the device works as an accumulation p-channel transistor. Two parameters are
especially important for the good behaviour of OFETs: carrier mobility and, as a consequence,
Ion/Ioff ratio, mainly relevant in logical circuits. In oligothiophenes, which are now the most
used materials for OFETS, mobility are normally between 0.04 and 0.13 cm2V-1s-1. In particular,
we have produced a new kind of field effect device that has been assembled without employing
a substrate and using a thin flexible and transparent film as the insulator layer. This device
has given state-of-the-art results for what concerns the performances and at the same time has
given a valuable contribution towards its possible application of large area, flexible substrates.
Starting from this basic structure, we have also developed different other devices: in particular, in
collaboration with the Istituto Materiali Nanostrutturati of CNR in Bologna, we have produced
the first example of plastic Organic Light Emitting Transistor (OLET), a device whose function is
to couple the switching ability of a transistor with the light emission of a LED. Furthermore, we
have developed two kinds of field effect based sensors: the first is a chemical sensor, very similar in
principle to the silicon ISFET, the second is a strain gauge/pressure sensor. Work is in progress
on these interesting and highly innovative examples of evolution of organic semiconductor based
devices.
[1] A. Bonfiglio, D. De Rossi, T. Kirstein, I. Locher, F. Mameli, R. Paradiso, G. Vozzi, ”A feasibility
study of yarns and fibers with annexed electronic functions: the ARIANNE project”, Proc. Int.
Workshop ”New generation of wearable systems for health: Towards a revolution of citizens health
and life style management?”, Il Ciocco, Italy 11-14 December 2003, IOS Press, 2004
[2] O. Sanna, M. Cossu, A. Bonfiglio, ”An original flexible structure for Organic Photovoltaic
Devices”, Proc. MRS Spring Meeting, April 2004 San Francisco, USA, Ed. N. Fruehauf, B. R.
Chalamala, B. E. Gnade, J. Jang, vol. 814, I10.13 (2004)
[3] P. Cosseddu, F. Mameli, I. Manunza, O. Sanna, A. Bonfiglio, ”An organic thin film transistor
structure for optoelectronic applications”, proc. SPIE Photonics Europe, ”Organic Optoelectronics
and Photonics”, Ed. P. Heremans, M. Muccini, H. Hofstraat, vol CDS122-5464, pp. 74-79, 2004
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Dipartimento di Automazione, Elettromagnetismo, Ingegneria dell’Informazione e Matematica Industriale
Research topics
1) POWER DEVICES MODELLING
G. Busatto, F. Iannuzzo
Collaborations: ANSALDO Trasporti Napoli
2) INNOVATIVE DRIVING STRATEGIES AND EMI ANALYSIS IN HIGH
POWER IGBT MODULES
C.Abbate, G. Busatto, F. Iannuzzo
3) SERIES-CONNECTION TECHNIQUES OF HIGH POWER IGBT MODULES
FOR TRACTION APPLICATIONS
4) RELIABILITY OF POWER DEVICES UNDER IRRADIATION
G. Busatto, F. Iannuzzo, A. Porzio, A. Sanseverino, F. Velardi
Collaborations: ST Microelectronics Catania
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POWER DEVICES MODELLING
G. Busatto, F. Iannuzzo
The use of the MOSFET’s embedded body diode in soft-switching applications may lead to the
device failure also at reduced power. A non-destructive diagnosis equipment has been developed and
employed to systematically investigate the breakdown, as a support to theoretical investigations.
The guiding idea has been to perform several tests in which the dangerous conditions to be studied
are artificially provoked, including temperature, and the power supply is completely removed from
the device under test at increasing instants from the commutation. The equipment has been tested
on four different commercial devices, and the results have been published on an international
journal.
[1] F. Iannuzzo, Non-destructive Testing Technique for MOSFET’s Characterisation during SoftSwitching ZVS Operations, Microelectronics Reliability, Vol.45, pp. 1738-1741, 2005.
INNOVATIVE DRIVING STRATEGIES AND EMI ANALYSIS IN HIGH POWER
IGBT MODULES
The driving improvement in terms of IGBT switching losses reduction is accompanied by a
significant increase of EMC noise problems. The research activity focused the attention on the
electromagnetic noise irradiated by the high voltage high power IGBT modules during the inductive
turn-on. The noise variation and the dependence of each IGBT commutation phase is investigated
by means of an experimental set-up that reproduces a real inverter used in railway applications[1,2].
The EMC measures have been executed by means of an original experimental method that is
most indicated for the high power inverter systems. The experimental and the simulation results
demonstrate that the radiated electromagnetic noise is stimulated by the dv/dt voltage gradient and
the amplitude of the noise is proportional to it[2]. The main high frequency harmonic components
of the emitted signal are stimulated by the voltage variations across the device during the first
phase of the turn-on, whereas the signal is emitted by the freewheeling diode during the second
phase of its reverse recovery when this diode is stimulated by a large voltage variation. The noise
oscillations are related to the internal IGBT stray capacitances and inductances. Starting from
the theoretical and experimental considerations, an original IGBT equivalent model for the high
frequencies oscillations has been proposed. The model, using a PSPICE simulation and a small
signal measurement, allow to predict the frequencies and amplitude of the main emitted spectral
noise components[2].
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[1] G. Busatto, C. Abbate, F. Iannuzzo, L. Fratelli, B. Cascone, G. Giannini, EMI Characterisation
of high power IGBT modules For Traction Application, Proc. PESC 2005, Record 36th, pp. 21802186, June 2005, Recife, Brazil.
[2] G. Busatto, C. Abbate, L. Fratelli, F. Iannuzzo, G. Giannini, B. Cascone, EMI Analysis in High
power Converters for Traction Application, Proc. EPE 2005, September 2005, Dresden, Germania.
SERIES-CONNECTION TECHNIQUES OF HIGH POWER IGBT MODULES
FOR TRACTION APPLICATIONS
Series connection of IGBTs in railways applications is very interesting because higher operating
voltage can be reached and, moreover, the performances of series connected lower-voltage IGBTs
can be better than the ones of a single high-voltage device, in terms of losses and switching frequency. The series connection could result in real improvements of converter weight, volume and
cost thanks to the possibility of reducing energy losses so as to increase operating frequency. An
appropriate switching circuit for high power IGBT modules is studied. Voltage balance on IGBTs
is ensured by means of a simple auxiliary circuit applied directly on the high power inverter used
in hard switching applications. Analysis in terms of dissipated energy, collector overvoltage and
switching frequencies, comparing performances of a single high voltage IGBT module and two series
connected 1700V IGBTs is conducted. The experimental analysis confirm the advantages in using
series connected IGBT in substitution of a single high voltage module in terms of power losses and
switching performances.
[1] C. Abbate, G. Busatto, L. Fratelli, F. Iannuzzo, B. Cascone, G. Giannini, Series Connection of
High Power IGBT modules for traction applications, Proc. EPE 2005, September 2005, Dresden,
Germania.
RELIABILITY OF POWER DEVICES UNDER IRRADIATION
G. Busatto, F. Iannuzzo, A. Porzio, A. Sanseverino, F. Velardi
The impact of heavy ions onto power MOSFETs is being investigated, aimed to study the possibility of employ of commercial low-cost devices in aerospace environments. Experiments conducted
at an ion accelerator facility are being performed with the target of simulating ion impacts on the
device surface. More in detail, the Single-Event Burnout (SEB) and the Single-Event Gate Rupture
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(SEGR) are stimulated at various bias conditions and the current waveforms at the external leads
of the device are acquired. The damage is detected by an increase in the gate leakage current. On
the basis of simulation results and experimental data, we demonstrated that the SEB is related to
an electrical instability that takes place during parasitic BJT operation due to a double injection
phenomenon correlated to the contemporaneous presence of a local large current density and an
intense electric field. During irradiation at VGS=0V, we observed also a gate damage that can be
considered to be very similar to a SEGR event. For this phenomenon we pointed-out that the gate
damage can be attributed to the coexistence of a large amount of generated charge and an intense
electric field that forms across the gate oxide due to the movement of generated holes underneath
the oxide itself.
[1] G. Busatto, A. Porzio, F. Velardi, F. Iannuzzo, A. Sanseverino, G. Curr, Experimental and
Numerical investigation about SEB/SEGR of Power MOSFET, Microelectronics Reliability, Vol.
45, No. 9-11, pp. 1711-1716, Sept.-Nov. 2005.
[2] A.Porzio, G. Busatto, F. Velardi, F. Iannuzzo, A. Sanseverino, G. Curr, Experimental and 3D
Simulation Study on the Role of the Parasitic BJT Activation in SEB/SEGR of Power MOSFET,
Proc. RADECS 2005, September 2005, CAPE D’AGDE, France.
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CATANIA
Dipartimento di Ingegneria Elettrica Elettronica e dei Sistemi
Research topics
1) LOW-VOLTAGE ANALOG CIRCUITS
W. Aloisi, G. Giustolisi, R. Mita, G. Palumbo, S. Pennisi
Other sources of funding: MIUR, STMicroelectronics
2) MODELING AND DESIGN OF ANALOG CIRCUITS
W. Aloisi, S. O. Cannizzaro, G. Di Cataldo, G. Giustolisi, A. D. Grasso, R. Mita, G. Palumbo,
M. Pennisi, S. Pennisi
3) MODELING AND DESIGN OF DIGITAL CIRCUITS AND SYSTEMS
A. D. Grasso, R. Mita, G. Palumbo
4) CURRENT-MODE ANALOG CIRCUITS
G. Di Cataldo, R. Mita, S. Pennisi
5) RF TRANSCEIVERS FOR WCDMA, WLAN, AND DVB-S APPLICATIONS
F. Carrara, A. Italia, E. Ragonese, Antonino Scuderi, C. D. Presti, G. Palmisano
Other sources of funding: European Commission, MIUR, Agilent Technologies
6) POWER AMPLIFIERS FOR WIRELESS TRANSMITTERS
F. Carrara, Antonino Scuderi, Angelo Scuderi, G. Palmisano
7) INTEGRATED SPIRAL INDUCTORS AND TRANSFORMERS ON SILICON
E. Ragonese, Angelo Scuderi, F. Carrara, A. Italia, G. Palmisano
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LOW-VOLTAGE ANALOG CIRCUITS
W. Aloisi, G. Giustolisi, R. Mita, G. Palumbo, S. Pennisi
In this area we have investigated about some low-voltage circuits capable of working at less
than 1.5-V power supply.
A high-performance sense amplifier for nonvolatile memories capable of working under a very
low-voltage power supply was presented in [1]. The topology of the sense amplifier uses a pure
current-mode comparison allowing power supplies lower than 1 V to be used and includes two
subcircuits which improve slew rate performance. The sense amplifier was implemented in an
EEPROM realized with a 0.18-µm EEPROM technology. Experimental results showed a read
access time of about 30 ns with a power supply of 1.65 V.
A novel CMOS current feedback op-amp was presented in [2]. The solution works using a low
supply voltage and provides a wide input/output swing as well as a high current driving capability.
Experimental results from a prototype implemented in a 0.35-µm technology and powered with 1.5
V are also given. The circuit exhibits a better than 500 kHz closed-loop bandwidth and a ±1 mA
current drive capability.
A comparison of CMOS output stages for very low-voltage operational amplifiers was developed
in [3],[4]. The analysis was carried out by taking into account output stage performance parameters
which also affect the characteristics of the overall amplifier. In particular, three quality factors
were defined to afford the designer a better understanding of the relationships between current
dissipation, area consumption, bandwidth, and linearity. Exploiting these new parameters, four
output stages were analyzed in detail and compared. Finally, comparison results were validated by
simulations.
A biasing scheme for minimum supply CMOS amplifiers was presented in [5],[6]. The approach
exploited the bulk terminals to set the quiescent current of a pseudo differential amplifier, thereby
avoiding the use of the tail current source. Non-ideal effects of the switched-capacitor network used
in the feedback control loop were theoretically examined. Transistor-level simulations on a design
powered with 0.7 V showed that the obtained performance is comparable to that of a traditional
differential pair supplied with 1 V.
[1] A. Conte, G. Lo Giudice, G. Palumbo, A. Signorello, “A High Performance Very Low-Voltage
Current Sense Amplifire for Non Volatile Memories,” IEEE Jour. of Solid-State Circuits, Vol. 40,
No. 2, pp. 507–514, Feb. 2005.
[2] R. Mita, G. Palumbo, S. Pennisi, “Low-Voltage High-Drive CMOS Current Feedback Op-Amp,”
IEEE Trans. on CAS part II, Vol. 52, No. 6, pp. 317–321, June 2005.
[3] W. Aloisi, G. Giustolisi, G. Palumbo, “Design and Comparison of Very Low-Voltage CMOS
Output Stages,” IEEE Trans. on CAS part I, Vol. 52, No. 8, pp. 1545–1556, Aug. 2005.
[4] W. Aloisi, G. Giustolisi, G. Palumbo, “Analysis and Optimization of a Low-Voltage Class-AB
Output Stage,” ICECS‘05, Gammarth (Tunisia), n. 450, Dec. 2005.
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[5] P. Monsurrò, S. Pennisi, G. Scotti, A. Trifiletti, “Biasing Technique Via Bulk Terminal For
Minimum Supply CMOS Amplifiers,” IEE Electronics Letters, Vol. 41, No. 14 , pp. 779–780, Jul.
2005.
[6] P. Monsurrò, S. Pennisi, G. Scotti, A. Trifiletti, “Switched-Capacitor Body-Biasing Technique
For Very Low Voltage CMOS Amplifiers,” ECCTD‘05, Cork (Ireland), pp. 257–260, Aug. 2005.
MODELING AND DESIGN OF ANALOG CIRCUITS
W. Aloisi, S. O. Cannizzaro, G. Di Cataldo, G. Giustolisi,
A. D. Grasso, R. Mita, G. Palumbo, M. Pennisi, S. Pennisi
The activity involves several non homogeneous research aspects, all treated from a theoretical
point of view, but without disregarding main design elements.
An analysis and comparison of the performance of Tow-Thomas biquadratic filter sections, implemented with Miller integrators based on current feedback opamps (CFOAs) and voltage opamps
(VOAs) was carried out in [1]. We found that the implementations with CFOAs show less parameter accuracy and an increased tendency to become unstable. Design criteria to partially overcome
these drawbacks and to maximally exploit the inherent high-speed potential of CFOAs were also
derived. The theoretical derivations and related results were experimentally validated through
implementations from commercially available devices.
A thorough efficiency analysis of a boost PWM converter was presented in [2]. The analysis is
extended in the synchronous rectification case where a self driven transistor instead of the diode
rectifier is adopted. The expressions of the converter efficiency can be used to predict the circuit
behaviour for both a constant input and constant output voltage operation. The model has been
validated using SPECTRE simulator and a 0.35 µm CMOS process, and error always lower than
2% were found.
A simple and comprehensive study of the high-frequency harmonic distortion of two-stage Millercompensated CMOS OTA used in inverting configuration was presented in [3]. An improved extension of a symbolic approach recently proposed by the authors is adopted here. As a result
of a better formalisation, inaccuracies incurred by the original formulation can be avoided and
closed-form expressions of second- and third-order harmonic distortion factors are derived, whose
precision extends well beyond the amplifier’s gain-bandwidth product. The correctness of both this
approach and the expressions derived was confirmed by comparison with computer simulations at
transistor level.
A simple and well-defined design procedure for a three-stage CMOS OTA was presented in [4].
The approach is suited for a pencil-and-paper design and yields accurate performance optimization
without introducing unnecessary circuit constraints. Simulations on a circuit implemented in a 0.35
µm technology closely agree the results expected.
In [5] we presented a simple method to evaluate harmonic distortion in the frequency domain
of amplifiers embedded in a generic nonlinear feedback network. The closed-form expressions
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obtained are accurate and extend our understanding of nonlinear frequency behavior in general
feedback circuits. As an example, linearity of an active-RC integrator is considered and analyzed
in detail. The suitability of the proposed approach was confirmed by comparison with computer
simulations.
A simple CMOS current reference circuit was introduced in [6] and analytical model able to
predict the statistic of the output current was derived. The model is validated by means of both
simulation and measurement results and, finally, some design guidelines are given.
In [7] an approach for analyzing and designing low-power CMOS output stages is proposed.
The analysis is carried out by taking into account output stage performance parameters which also
affect main characteristics of the overall amplifier. To this aim, three quality factors are defined
to afford the designer a better understanding of the relationships between current dissipation, area
consumption, bandwidth and linearity.
In [8] we presented a fast active quenching and recharging circuit (AQRC) for single-photon
avalanches diodes (SPAD). The proposed circuit topology exhibits an overall quenching time lower
than 1.5 ns and quiescent power dissipation equal to about 5 mW. Moreover, the circuit allows
tunable excess voltage from 5 V to 12 V. The circuit was design by using the DIB12 BiCMOS 2 µm
technology supply by STM that is perfectly compatible with the SPAD process. Many SPECTRE
simulations were executed in different operative conditions confirming the high performance of the
proposed topology.
In [9] we introduced a theoretical approach for evaluating distortion in the frequency domain of
three-stage amplifiers adopting two commonly used compensation techniques, namely the nested
Miller and the reversed nested Miller. The analysis is based on appropriate amplifier modeling and
on the assumption that the nonlinearity generated by each stage is static. Calculations are thus
greatly simplified avoiding complex methods based on the Volterra series. The adopted approach
provides useful design guidelines and explains why the nested-Miller compensation technique allows
generally better linearity performance at low frequency and why the reversed-nested Miller is best
suited to high frequencies. Simulation results are in very good agreement with expected results.
A digital interface to manage the information deriving from a Single Photon Avalanche Diode
(SPAD) was presented in [10]. The designed circuit acquires the bit stream produced by a SPAD
active quenching circuit, counting the photon absorbed by the device. Moreover, the system memorizes the photon’s arriving time and manages the hold-off parameter. The interface was firstly simulated in Xilinx Foundation Series 3.1i environment and then implemented in to the XC4010EPC84
Xilinx FPGA device. In order to verify the correctness of the circuit’s functionality, several measurements were performed confirming the validity of the design.
An optimized strategy for designing charge pumps having only capacitive loads was presented in
[11]. The approach allows designers to define the number of stages that minimize silicon area (and
minimize rise time) for a given input and output voltage. The approach was analytically developed
and validated through simulations and experimental measurements on 0.18 µm EEPROM CMOS
technology.
In [12] we presented a methodology to compare different driver circuits for AMOLED pixel
fabricated in TFT technology in terms of driving speed, area occupied and power consumption.
A RC equivalent driver circuit is also derived in order to allow array simulations of all the pixels
contained in the matrix. The results were achieved considering a QVGA display (320 × 240), a line
frequency of 60 Hz, and were verified by simulations with AIM-SPICE.
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99
A behavioral model of an N-stages charge pump was presented in [13]. The description language
used to develop the model is the VHDL thus permitting simulations of both digital and analog
systems, such as nonvolatile memories. Moreover, the presented model allows a huge reduction in
the simulation time also maintaining a good agreement with transistor level simulations. For a
useful comparison, a three stages charge pump was simulated with Symphony EDA Sonata (eventdriven VHDL simulator) and Spectre (transistor level simulator). The obtained result confirmed
the validity of the developed description in terms of accuracy and low required simulations time.
A novel model useful to simulate Single-Photon Avalanche Diodes (SPADs) was presented in
[14]. The developed description uses both voltage-controlled analog switch and Verilog-A description codes and it overcomes the drawbacks of the models reported in literature. Moreover, it
exhibits a better fitting with the experimental results extracted from real devices. Many Spectre
simulations confirmed the validity of the developed model.
In [15] we compared four different methods for analytically evaluating the harmonic distortion
in class-AB stages. All the methods are suitable for pencil-and-paper analysis and are based on
modeling the stage with a specific non-linear function. Comparisons made by means of simulations,
reveal that some methods are more precise than others but require more computational effort. On
the contrary, some of them are simple to use but are less precise. Moreover, some are more
appropriate for predicting HD2 and others for HD3 , only.
A VHDL-based description of a DC-DC boost converter was presented in [16]. Starting from
description of simple functional blocks such as voltage dividers, comparators and function’s generators, more complex DC-DC step-up voltage converter was modeled by adopting a structural
description of previous blocks. The proposed VHDL modeling can be used to simulate complex
digital circuits which includes a few of analog parts (e.g., memory banks or DSP core) by adopting
an event-driven standard simulator and avoiding using common transistor-level simulators which
dramatically increase the verification time.
Other works in the field of CMOS analog circuits are those related to the design of a class-AB
single-input differential-output transconductor [17] and pseudo-differential amplifier [18]. Moreover,
a novel architecture of a current steering digital-to-analog converter based on triple-tail cells instead
of differential pair was introduced in [19] and a tool for the analysis of analog circuits in Matlab
was described in [20].
[1] R. Mita, G. Palumbo, S. Pennisi, “Nonidealities of Tow-Thomas Biquads Using VOA- and
CFOA-Based Miller Integrators,” IEEE Trans. on CAS part II, Vol. 52, No. 1, pp. 22–27, Jan.
2005.
[2] W. Aloisi, G. Palumbo, “Efficiency Model of Boost dc-dc PWM Converters,” International
Journal of Circuit Theory and Applications, Vol. 33, No. 5, pp. 419–432, Sep. 2005.
[3] S. O. Cannizzaro, G. Palumbo, S. Pennisi, “Accurate Estimation of High-Frequency Harmonic
Distortion in Two-Stage Miller OTAs,” IEE proc. Circuits, Devices and Systems, Vol. 152, No. 5,
pp. 417-424, Oct. 2005.
[4] R. Mita, G. Palumbo, S. Pennisi, “Well-Defined Design Procedure for a Three-Stage CMOS
OTA,” ISCAS‘05, Kobe (Japan), pp. 2579–2582, May 2005.
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[5] S. O. Cannizzaro, G. Palumbo, S. Pennisi, “New Analytical Approach to Evaluate Harmonic
Distortion in Nonlinear Feedback Amplifiers,” ECCTD‘05, Cork (Ireland), No. 058, Sep. 2005.
[6] G. Giustolisi, G. Palumbo, M. Gaibotti, M. Pisasale, “Statistical Analysis of CMOS Current
Reference,” ECCTD‘05, Cork (Ireland), No. 074, Sep. 2005.
[7] W. Aloisi, G. Giustolisi, G. Palumbo, “Guidelines for Designing Class-AB Output Stages,”
ECCTD‘05, Cork (Ireland), No. 075, Sep. 2005.
[8] R. Mita, G. Palumbo, G. Fallica, “A Fast Active Quenching and Recharging Circuit for SinglePhoton Avalanche diodes,” ECCTD‘05, Cork (Ireland), No. 232, Sep. 2005.
[9] S. O. Cannizzaro , G. Palumbo, S. Pennisi, “Distortion Analysis of Three-Stage Amplifiers with
Reversed Nested-Miller Compensation,” ECCTD‘05, Cork (Ireland), No. 057, Sep. 2005.
[10] R. Mita, G. Palumbo, “Digital Interface for Single Photon Avalanche Diodes,” ECS‘05,
Bratislava (Slovakia), pp. 177–180, Sep. 2005.
[11] G. Palumbo, D. Pappalardo, L. Innacolo, “Design Strategy to Minimize rise Time and Silicon
Area of Charge Pump with only Capacitive Loads,” ICECS‘05, Gammarth (Tunisia), No. 508,
Dec. 2005.
[12] G. Palumbo, M. Pennisi, “A comparison between AMOLED poly-TFT driver circuits,”
ICECS‘05, Gammarth (Tunisia), No. 445, Dec. 2005.
[13] R. Mita, G. Palumbo, M. Pennisi, “Behavioral model of charge pumps with VHDL,” ICECS‘05,
Gammarth (Tunisia), No. 471, Dec. 2005.
[14] R. Mita, A. Oliveri, G. Palumbo, P. G. Fallica, “Novel Model for Single Photon Detectors,”
ICECS‘05, Gammarth (Tunisia), No. 383, Dec. 2005.
[15] G. Giustolisi, G. Palumbo, “Comparison of Methods for Predicting Distortion in Class-AB
Stages,” ICECS‘05, Gammarth (Tunisia), No. 439, Dec. 2005.
[16] R. Mita, G. Palumbo, “VHDL-Based Modeling of a DC-DC Boost-Converter,” ICECS‘05,
Gammarth (Tunisia), No. 384, Dec. 2005.
[17] A. D. Grasso, S. Pennisi, “CMOS Class AB Single-To-Differential Transconductor,” ECCTD‘05, Cork (Ireland), pp. 333–336, Aug. 2005.
[18] A. D. Grasso, S. Pennisi, “High-Performance CMOS Pseudo-Differential Amplifier,” ISCAS‘05,
Kobe (Japan), pp. 1569–1572, May 2005.
[19] A. D. Grasso, S. Pennisi, “Current-Steering D/A Converter Based on Triple Tail Cell,” ECCTD‘05, Cork (Ireland), pp. 273–276, Aug. 2005.
[20] A. D. Grasso, S. Pennisi, “A Symbolic Analysis Tool of Linear Circuits In Matlab (SALCIM),”
ECS‘05, Bratislava (Slovakia), pp. 141–144, Sep. 2005.
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MODELING AND DESIGN OF DIGITAL CIRCUITS AND SYSTEMS
A. D. Grasso, R. Mita, G. Palumbo
In this topic the investigation regarding the current mode logic was continued treating aspects
of the gates implemented with different technologies. In particular, the effect of the transit time
degradation of bipolar transistors on the power-delay trade-off in CML gates and their design is
dealt with. A simple and compact delay model which accounts for the transit time increase due to
the high bias current values used in high-speed applications is derived by generalizing the approach
previously proposed. The resulting closed-form delay expression is achieved by properly simplifying
the SPICE model, and has an explicit dependence on the bias current which determines the power
consumption of CML gates. Accordingly, the delay model is used to gain insight into the powerdelay trade-off by considering the effect of the transit time degradation in high-speed designs. In
particular, the cases where such effects can be neglected are identified, to better understand how
the transit time degradation affects the performance of CML gates for current bipolar technologies
[1].
Design strategy for MUX, XOR and D-latch with the Source-Coupled Logic (SCL) gates was
proposed. To this end, an analytical model of the delay and the noise margin as a function of the
transistors’ aspect ratio and bias current was first introduced. Successively, analytical equations of
the transistors’ aspect ratio to meet a given noise margin specification was derived as a function of
the bias current, and was then used along with the delay model to express the delay as an explicit
function of the bias current and noise margin. The simplified delay expression explicitly relates
speed performance to power dissipation and the noise margin, thereby providing the designer with
the required understanding of the trade-offs involved in the design. The delay dependence on the
logic swing was also investigated with results showing that this delay is not necessarily reduced by
reducing the logic swing, in contrast with the usual assumption [2].
Design techniques for cascaded CML gates was also proposed. Criteria to size each gate bias
current in a cascade of CML gates were derived in practical design cases, i.e. when a high speed
or a low power consumption is targeted [3].
A simple model for the propagation delay of Source Coupled Logic gates composed of a differential pair and a common drain output buffer in III-V HEMT technology was developed. The
propagation delay model was used for a design strategy that permits pencil-and-paper design of
the gates, accounting for power-delay trade-off. The methodology was applied to a charge-control
high-frequency model of the HEMT, but is general-purpose and applicable also to different models
[4].
Finally, in this sub area a design strategy for the optimization of the propagation delay of
emitter coupled logic (ECL) gates when a power constraint was proposed and analyzed in detail.
The optimization is carried out in terms of bias currents when a maximum level of total current for
each gate, much lower than the optimum one, is available. The proposed approach is independent
of the process used, avoiding the trial-and-error approach based on time-consuming simulations [5].
Moreover, research also involved another theme which regards analysis of power consumption in
RC network. In particular, evaluation of energy consumption of RC tree networks during an input
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transition was analyzed. A closed-form analytical model of the energy consumption was derived for
arbitrary values of the input rise time by introducing a suitable first-order equivalent RC circuit,
which avoids the explicit pole-zero evaluation. The proposed expression of the energy consumption
has an evident meaning, thereby affording a deeper understanding of the network dissipation [6].
[1] M. Alioto, G. Palumbo, “Modelling and Design Considerations on CML Gates Under HighCurrent Effects,” International Journal of Circuit Theory and Applications, Vol. 33, No. 6, pp.
503–518, Nov. 2005.
[2] M. Alioto, G. Palumbo, “Power-Delay Optimization of D-Latch/MUX Source Coupled Logic
Gates,” International Journal of Circuit Theory and Applications, Vol. 33, No. 1, pp. 65–86, Jan.
2005.
[3] M. Alioto, G. Palumbo, “Design Techniques for Low-Power Cascaded CML Gates,” ISCAS‘05,
Kobe (Japan), pp. 4685–4688, May 2005.
[4] G. Palumbo, P. Tommasino, A. Trifiletti, “Optimized Design of Source Coupled Logic gates in
GAAS HEMT Technology,” ISCAS‘05, Kobe (Japan), pp. 4685–4688, May 2005.
[5] A. D. Grasso, G. Palumbo, “Optimized Design of ECL Gates with a Power Constraint,”
ECCTD‘05, Cork (Ireland), No. 052, Sep. 2005.
[6] M. Alioto, G. Palumbo, M. Poli, “Energy Consumption in RC tree Circuits with Exponential
Inputs: an Analytical model,” PATMOS‘05.
CURRENT-MODE ANALOG CIRCUITS
G. Di Cataldo, R. Mita, S. Pennisi
The research activity has been devoted to the development of circuit approaches and topologies
that rely on current-mode techniques. This activity has been partially carried out in collaboration
with researchers of the University of Rome “La Sapienza”.
A new concept of current-mode interface circuit for differential-capacitance transducers was
proposed. The solution, suitable for integration and comprising a capacitance-to-current conversion
that enables low-voltage operation, provided both high speed and accuracy, and minimized postprocessing [1],[2].
A high-performance and robust CMOS current-feedback operational amplifier was proposed in
[3]. It was based on a feedback configuration, which provides low input resistance and, working in
class AB, allows high slew-rate capability.
A CMOS current amplifier providing single input to differential-output conversion was proposed
in [4]. The circuit exhibits high CMRR and allows an electrical tuning of the current gain. A simple
model of the circuit was presented as well as design guidelines. Another CMOS current operational
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amplifier with high common mode rejection was presented in [5]. This performance was obtained
through a novel feedback-enhanced output stage exhibiting also low supply voltage requirements.
Simulations using a 0.25-µm process on an implementation powered with 2 V and consuming 2.4
mW showed both DC loop gain and CMRR higher than 80 dB and a gain-bandwidth product of
about 40 MHz. Compared to the traditional solution, the CMRR improvement was higher than 20
dB.
Finally, a high-performance CMOS unity-gain current amplifier was proposed. The solution
adopted two feedback loops to reduce the input resistance and a nested-Miller technique to provide
frequency compensation. A design example using a 0.8-µm process and a 2-V supply was given and
SPICE simulations showed a bandwidth of 75 MHz, no slew-rate limitations and a settling time
better than 50 ns, irrespective of the current amplitude. Input and output resistances were
√ about
0.1 Ω and 15 MΩ, respectively. The input-referred white noise spectral density is 10 pA/ Hz.
[1] S. Pennisi, “High-Performance And Simple CMOS Interface Circuit For Differential Capacitive
Sensors,” IEEE Trans. on Circuits and Systems part II, Vol. 52, No. 6, pp. 327–330, Jun. 2005.
[2] G. Di Cataldo, S. Pennisi, “CMOS Interface For Differential Capacitive Transducers,” ECCTD‘05, Cork (Ireland), pp. 265–268, Aug. 2005.
[3] S. Pennisi, “High-Performance CMOS Current-Feedback Operational Amplifier,” ISCAS‘05,
Kobe (Japan), pp. 1573–1576, May 2005.
[4] S. Pennisi, G. Scotti, A. Trifiletti, “CMOS Single-To-Differential Current Amplifier,” ISCAS‘05,
Kobe (Japan), pp. 2583–2586, May 2005.
[5] R. Luzzi, S. Pennisi, G. Scotti, A. Trifiletti, “2-V CMOS Current Operational Amplifier With
High CMRR,” ECCTD‘05, Cork (Ireland), pp. 27–30, Aug. 2005.
[6] G. Di Cataldo, R. Mita, S. Pennisi, “High-Performance CMOS Current Follower,” ECS‘05,
Bratislava (Slovakia), pp. 55–58, Sep. 2005.
RF TRANSCEIVERS FOR WCDMA, WLAN, AND DVB-S APPLICATIONS
F. Carrara, A. Italia, E. Ragonese, Antonino Scuderi, C. D. Presti, G. Palmisano
This research activity is focused on the design and characterization of RF transceivers for
WCDMA handsets, IEEE802.11a/HIPERLAN2 wireless LANs and DVB-satellite communications.
A WCDMA silicon bipolar LNA, based on a cascode architecture, implementing input and
output matching networks, and designed to simultaneously optimize matching, noise and linearity,
is presented in [1]. The LNA exhibits a gain of 18 dB, a noise figure of 1.6 dB and an OIP3 of +40
dBm, while consuming only 4 mA. To measure the linearity performance a novel test-bench was
developed. Statistical simulations and measurements were carried out on the LNA revealing a high
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sensitivity of the OIP3 to process variations. A technique to restore the linearity performance is
also described.
The design and measured performance of a novel IF VGA for WCDMA transmitters is presented
in [2]. A compensation technique for parasitic coupling is proposed which allows a high dynamic
range of 77 dB to be attained at 400 MHz while using a single variable-gain stage. Temperature
compensation and decibel-linear characteristic are achieved by means of a control circuit which
provides a lower than ±1.5 dB gain error over full temperature and gain ranges. The device is
fabricated in a 0.8-µm 46-GHz-fT silicon bipolar technology and drains up to 6 mA from a 2.7-V
power supply.
In [3] and [4] a variable-gain up-conversion mixer based on a bias-offset variabletransconductance input stage is presented. The proposed topology allows dc current reuse and reduces the overall transmitter power consumption in WCDMA [3] and 5-GHz WLAN [4] applications.
Moreover, a new low-consumption control circuit is introduced, which achieves a temperature-stable
and linear-in-dB characteristic, providing a lower than ±1 dB gain error over a 46-dB dynamic
range. At 2 GHz, a 3-dBm output compression point, 13-dB noise figure, and −45-dB ACLR are
obtained under maximum gain conditions.
A 5-GHz transmitter front-end for 802.11a and HIPERLAN2 WLANs was also implemented [5]
using the same silicon bipolar technology. The transmitter includes a digitally controlled linear-indB variable-gain up-converter and a three-stage linear power amplifier. At a 3-V supply voltage,
the front-end exhibits a 23.5-dBm output 1-dB compression point, 35-dB maximum power gain,
and 30-dB dynamic range. The dB-linear gain error is lower than ±0.8 dB. The transmitter is able
to comply with the stringent error vector magnitude requirement of the standard up to a 19-dBm
output power level.
In [6] the first 12-GHz DVB-S monolithic receiver integrated in a low-cost silicon bipolar technology is presented. The receiver is based on a dual-conversion superheterodyne architecture that
employs a single LO integrated in the same die. To comply with the stringent LO phase noise
requirement of −101 dBc/Hz at 100 kHz offset from the carrier, an innovative VCO topology,
based on a three-layer monolithic transformer, was used. The VCO exhibits a phase noise of −102
dBc/Hz at 100 kHz offset from a 5.3-GHz carrier and a 1.1-GHz tuning range. At 12 GHz, the
conversion gain is 33.6 dB, the single-sideband noise figure is 5.9 dB and the output IP3 is +16
dBm.
In [7] a DVB-S monolithic heterodyne receiver is presented. The integrated circuit consists of
a down-converter block and a phase-locked-loop-based local-oscillator synthesizer to translate the
DVB-S RF-band (10.7-12.75 GHz) to an IF ranging in the L-band (0.95-2.15 GHz). The receiver
exhibits a conversion gain of 38 dB, a single-sideband noise figure of 7 dB, and an output 1-dB
compression point of +5 dBm. A 2.2-GHz-wide VCO tuning range, extending from 8.6 to 10.8
GHz, is achieved adopting a transformer-based topology. The VCO phase noise is as low as −95
dBc/Hz at 100-kHz offset from a 10.6-GHz carrier. The integrated receiver draws 160 mA from
a 3.3-V supply voltage. This paper demonstrates the feasibility of a Ku-band DVB-S heterodyne
receiver integrated in low-cost 46-GHz-fT silicon bipolar technology.
A 12 GHz single-chip silicon bipolar receiver for multi-user low-noise block down-converters is
presented in [8]. The die includes two down-converter channels and a 10.2 GHz local oscillator
synthesizer. The receiver features a 7.8 dB SSB NF, an output 1-dB compression point of 5 dBm
with 32 dB conversion gain and phase noise of −96 dBc/Hz at 100 kHz offset from the 10.2 GHz
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carrier. The monolithic approach reduces both manufacturing costs and system complexity and
avoids the tuning of the dielectric resonant oscillator.
The design of a monolithic switch-matrix for dual-user digital-satellite applications is investigated in [9]. The circuit implemented in the same silicon bipolar technology, performs a 29-dB
isolation between the two output channels and an output 1-dB compression point of +5 dBm. The
good overall performance, despite the monolithic approach, is due to the adopted design choices as
well as to the proposed output buffer.
[1] C. Motta, G. Girlando, A. Castorina, G. Palmisano, “A 40-dBm OIP3, 2-GHz silicon bipolar
LNA,” in IEEE Radio Frequency Integrated Circuits Symp. Dig. (RFIC 2005), Long Beach,
California, USA, June 2005, pp. 633–636.
[2] F. Carrara, G. Palmisano, “High-dynamic-range VGA with temperature compensation and
linear-in-dB gain control,” IEEE J. Solid-State Circuits, vol. 40, pp. 2019–2024, Oct. 2005.
[3] F. Carrara, G. Palmisano, “Variable-gain up-converter with current reuse for WCDMA wireless
transmitters,” in IEEE Int. Symp. on Circuits and Systems (ISCAS 2005), Kobe, Japan, May
2005, pp. 3247–3250.
[4] C. D. Presti, F. Carrara, G. Palmisano, “Variable-gain up-conversion mixer with current reuse
for 5-GHz W-LAN applications,” in Proc. IEEE European Conference on Circuit Theory and
Design (ECCTD 2005), Cork Ireland, Sept. 2005.
[5] A. Italia, L. La Paglia, A. Scuderi, F. Carrara, E. Ragonese, G. Palmisano, “A silicon bipolar
transmitter front-end for 802.11a and HIPERLAN2 Wireless LANs,” IEEE J. Solid-State Circuits,
vol. 40, pp. 1451–1459, July 2005.
[6] T. Copani, S. A. Smerzi, G. Girlando, G. Palmisano, “A 12-GHz silicon bipolar dual-conversion
receiver for digital satellite applications,” IEEE J. Solid-State Circuits, vol. 40, pp. 1278–1287,
June 2005.
[7] G. Girlando, S. A. Smerzi, T. Copani, G. Palmisano, “A monolithic 12-GHz heterodyne receiver
for DVB-S applications in silicon bipolar technology,” IEEE Transactions on Microwave Theory
and Techniques, vol. 53, pp. 952–959, March 2005.
[8] T. Copani, S. A. Smerzi, G. Girlando, G. Ferla, G. Palmisano, “A single-chip receiver for multiuser LNBs,” in IEEE International Solid-State Circuits Conference (ISSCC 2005), San Francisco,
USA, Feb. 2005, pp. 438–439.
[9] T. Copani, G. Girlando, S. A. Smerzi, A. Castorina, G. Palmisano, “A wide-band low-crosstalk
switch-matrix and output buffer for DVB-S applications,” in IEEE Radio Frequency Integrated
Circuits Symp. Dig. (RFIC 2005), Long Beach, California, USA, June 2005, pp. 87–90.
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POWER AMPLIFIERS FOR WIRELESS TRANSMITTERS
F. Carrara, Antonino Scuderi, Angelo Scuderi, G. Palmisano
This research activity is focused on the implementation of RF power amplifiers for GSM/DCS
and WCDMA transmitters.
The design and measured performance of a 1.8-GHz power amplifier featuring load mismatch
protection and soft-slope power control is presented in [1] and [2]. Load-mismatch-induced breakdown can be avoided by attenuating the RF power to the final stage during overvoltage conditions.
This was accomplished by means of a feedback control system, which detects the peak voltage at
the output collector node and clamps its value to a given threshold by varying the circuit gain. The
issue of output power control has been addressed as well. To this end, a temperature-compensated
bias network is proposed, which allows a moderate power control slope (dB/V) to be achieved
by varying the circuit quiescent current according to an exponential law. The non-linear power
amplifier was fabricated using a low-cost silicon bipolar process with a 6.4-V breakdown voltage. It
delivers a 33.5-dBm saturated output power with 46% maximum PAE and 36-dB gain at a nominal
3.5-V supply voltage. The device is able to tolerate a 10:1 load standing-wave ratio up to a 5.1-V
supply voltage. Power control slope is lower than 80 dB/V between −15 dBm and the saturated
output power level.
A monolithic 1.9-GHz linear power amplifier for WCDMA wireless transmitters was also integrated using the same bipolar process and reported in [3]. At a 3.3-V supply voltage, the circuit
exhibits a 31-dBm saturated output power, 57% maximum PAE, and 29-dBm output 1-dB compression point, while using a low quiescent current of 80 mA. Thanks to a linearizing bias network,
the power amplifier is able to comply with the standard −33-dBc ACLR specification up to a 28.3dBm output power level. The circuit also features temperature-stable RF gain as well as quiescent
current control and shut-down functionalities.
Finally, the effect of emitter ballast on the ruggedness of RF power amplifiers is investigated
in [13]. Silicon bipolar 1.8-GHz power amplifiers based on different ballasted transistors have been
integrated and tested under load mismatch conditions. A ballasted device with 25-mV emitter
voltage drop achieves the optimum trade-off between ruggedness and performance. The power
amplifier based on this device is able to tolerate a 20:1 load standing-wave ratio up to a 5.8-V
supply voltage. It delivers a 33.4-dBm saturated output power with 51% maximum PAE at a
nominal 3.5-V supply voltage.
[1] A. Scuderi, L. La Paglia, A. Scuderi, F. Carrara, G. Palmisano, “A VSWR-protected silicon
bipolar RF power amplifier with soft-slope power control”, IEEE J. Solid-State Circuits, vol. 40,
pp. 611–621, March 2005.
[2] A. Scuderi, A. Scuderi, F. Carrara, G. Palmisano, “A soft-slope output power control circuit
for RF power amplifiers,” in Proc. Conf. on PhD Research in Microelectronics and Electronics
(PRIME 2005), Lausanne, Switzerland, July 2005, pp. 235–238.
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[3] F. Carrara, A. Scuderi, A. Scuderi, G. Bottiglieri, G. Palmisano,” Silicon bipolar linear power
amplifier for WCDMA mobile applications,” in IEEE Int. Symp. on Circuits and Systems (ISCAS
2005), May 2005, pp. 2679–2682.
[4] A. Scuderi, F. Carrara, G. Palmisano, “A VSWR-rugged silicon bipolar RF power amplifier,” in
IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2005), Santa Barbara, California,
USA, Oct. 2005, pp. 116–119.
INTEGRATED SPIRAL INDUCTORS AND TRANSFORMERS ON SILICON
E. Ragonese, Angelo Scuderi, F. Carrara, A. Italia, G. Palmisano
This activity concerns the design and modelling of integrated passive components for RF applications.
In [1] and [2] a design methodology for the optimization of transformer-loaded RF circuits is
discussed and a simplified equation for the maximum available output power is presented. The
optimization procedure is based on a novel figure of merit for the integrated transformer, which
was introduced to quantify its performance when operated as a tuned load. The proposed parameter (namely the transformer characteristic resistance) provides a more reliable performance
characterization compared to previously reported ones (i.e., insertion loss and maximum available
gain), since it is inherently related to the maximization of the available output power in tuned-load
RF circuits. By means of the proposed approach, a highly linear up-converter for 5-GHz wireless
LAN applications was implemented in a 40-GHz-fT SiGe HBT technology. The circuit achieves
an output 1-dB compression point of 4.5 dBm and a power gain of 18 dB, while drawing only 34
mA from a 3-V power supply. In [3] the transformer characteristic resistance is used to evaluate
the effect of different substrate management approaches on the performance of silicon integrated
transformers.
In [4] and [5], the analysis and modeling of thick-metal spiral inductors are addressed. The
accuracy of a 2.5 D electromagnetic simulator is first validated by comparison with on-wafer experimental measurements. The actual improvements of metal thickening in terms of quality factor are
evaluated and related to skin and proximity effects. The inductance decrease due to metal thickening is modelled by using a modified current-sheet expression. The proposed formula achieves higher
accuracy compared to the original one revealing errors below 5% even for thickness-to-width ratio
up to 2.5.
In [6] the modeling of sub-nH radial patterned ground shield circular inductors is presented.
Based on both electromagnetic simulations and experimental measurements, the well-known current sheet expression for circular spirals is revised and modified to improve its accuracy at lower
inductance values. The proposed expression is also extended to inductors with polygonal geometries showing significant improvements with respect to the state-of-the-art. Finally, the original
and modified expressions are employed in a lumped scalable model for silicon spiral inductors.
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Comparisons with measured data revealed that the modified expression allows error reductions as
large as 20% with respect to the original one, on both inductance and quality factor simulations.
[1] A. Italia, F. Carrara, E. Ragonese, G. Palmisano, “Design methodology for the optimization
of transformer-loaded RF circuits,” in Proc. IEEE Int. Symp. on Circuits and Systems (ISCAS
2005), Kobe, Japan, May 2005, pp. 3229–3232.
[2] A. Italia, F. Carrara, E. Ragonese, G. Palmisano, “The transformer characteristic resistance and
its application to the design of RF circuits,” in Proc. Conf. on PhD Research in Microelectronics
and Electronics (PRIME 2005), Lausanne, Switzerland, July 2005, pp. 267–270.
[3] A. Italia, F. Carrara, T. Biondi, A. Scuderi, E. Ragonese, G. Palmisano, “The transformer
characteristic resistance and its application to the performance analysis of silicon integrated transformers,” in IEEE Radio Frequency Integrated Circuits Symp. Dig. (RFIC 2005), Long Beach,
California, USA, June 2005, pp. 597–600.
[4] A. Scuderi, T. Biondi, E. Ragonese, G. Palmisano, “Inductance calculation of thick-metal
inductors,” in Proc. Conf. on PhD Research in Microelectronics and Electronics (PRIME 2005),
Lausanne, Switzerland, July 2005, pp. 167–170.
[5] A. Italia, F. Carrara, E. Ragonese, G. Palmisano, “Analysis and modeling of thick-metal spiral
inductors on silicon,” in Proc. IEEE European Microwave Conference (EuMC 2005), Paris, France,
Oct. 2005, pp.81–84.
[6] T. Biondi, A. Scuderi, E. Ragonese, G. Palmisano, “Sub-nH inductor modeling for RF IC
design,” IEEE Microwave and Wireless Components Letters, vol. 15, pp. 922–924, Dec. 2005.
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Dipartimento di Elettronica, Informatica e Sistemistica
Research topics
1) SILICON OPTOELECTRONIC DEVICES AND MICROSYSTEMS
R. Carotenuto, G. Cocorullo, F. Della Corte, L. Moretti
Collaborations: IMM-CNR, Napoli; Delft Institute of Microelectronics and Submicron Technology,
Olanda
2) VLSI DESIGN OF EFFICIENT CIRCUITS FOR MULTIMEDIA APPLICATIONS AND ON-CHIP INTERCONNECTS FOR DEEP-SUBMICRON DIGITAL
CIRCUITS
G. Cappuccino, G. Cocorullo, P. Corsonello, M. Lanuzza, S. Perri, G. Staino
Collaborations: University of California, Davis and Idhao State University, USA
3) CMOS-BASED NANOELECTRONICS
F. Crupi, F. Della Corte, C. Pace
Collaborations: IMM-CNR; IMEC, Leuven, Belgio
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SILICON OPTOELECTRONIC DEVICES AND MICROSYSTEMS
G. Cocorullo, F. Della Corte, L. Moretti
Study of the infra-red absorption induced by visible light in amorphous materials: a novel
high-sensitivity measurement technique has been developed for the characterisation of the photon
induced infra-red absorption in thin film materials. Anodic bonding of silicon to glass: the effect of
different process parameters (e.g. temperature, voltage) were studied in their low range. The use of
a transparent thin film front electrode (Indium Thin Oxide - ITO), allowing the visual monitoring
of the bonding process, has been proposed
[1] L. Moretti, M. Iodice, F.G. Della Corte, I. Rendina,”Temperature dependence of the thermooptic coefficient of lithium niobate, from 300 to 515 K in the visible and infrared region”, Journal
of Applied Physics, vol. 98, art n. 036101
[2] K. Malecki, F. G. Della Corte, ”Silicon-glass anodic bonding at low temperature”,Proceedings
of SPIE International Symposium on Micromachining and Microfabrication Process Technology,
vol. 5715, pp. 180-189, San Jose, CA (USA), 2005
[3] F. G. Della Corte, M. Gagliardi, K. Maleki, M. A. Nigro, C. Summonte, ”All-optical modulation in thin film-film silicon-based waveguiding structures”, Proceedings of SPIE International
Symposium on Silicon-based Optoelectronics, vol. 5730, pp. 242-249, San Jose, CA (USA), 2005
[4] F. G. Della Corte, M.G. Donato, G. Messina, M.A. Nigro, S. Santangelo, C. Summonte,
”Study of in-gap defects in intrinsic and B-doped a-SiC:H by means of optical absorption, Raman,
spectroscopy and photoluminescence”, First Conference on Advances in Optical Materials, Tucson,
AZ, USA, 12-15 Oct 2005
[5] De Stefano, K. Malecki, F. G. Della Corte, L. Moretti, I. Rea, L. Rotiroti, I. Rendina, ”Silicon/Glass integrated optical sensor based on porous silicon for gas and liquid inspection”, XIX
EUROSENSORS Barcelona, September 11-14, 2005.
VLSI DESIGN OF EFFICIENT CIRCUITS FOR MULTIMEDIA APPLICATIONS
AND ON-CHIP INTERCONNECTS FOR DEEP-SUBMICRON DIGITAL
CIRCUITS
G. Cappuccino, G. Cocorullo, P. Corsonello, F. Crupi, M. Lanuzza, S. Perri, G. Staino
VLSI design: today multimedia applications are one of the major drivers for growth in the
mobile electronic products, such as personal digital assistants, cellular phones, video cameras, etc.
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These applications typically use computationally intensive algorithms that can be efficiently executed by exploiting the Single Instruction Multiple Data (SIMD) and/or the Very Long Instruction
Word (VLIW) paradigms. The latter make data level and instruction level parallelisms available
that is the simultaneous processing of several instructions on lower precision data packed into a
word is possible. For example, a 64-bit SIMD ALU can process eight 8-bit data or four 16-bit data
or two 32-bit data or one 64-bit data. In order to efficiently support such operations extremely
flexible circuits are needed. More explicitly, those circuits have to be able to adapt themselves to
different precisions at run-time. Solutions proposed in the past exploit partitioned architectures in
which auxiliary circuitries are introduced to operate on the required precision. Unfortunately this
solution causes longer critical paths to take place, thus significantly influencing speed-performances.
As a counterpart of the conventional approach above described, we recently proposed an efficient design approach, which guarantees an extreme flexibility to be obtained without compromising speed
performances. The new approach has been exploited in both ASIC (full-custom and standard
cells based-circuits) and FPGA-based circuits for multimedia applications. On-chip interconnects:
The research work focuses on interconnects and CMOS line drivers for high performance ICs and
Network-on-Chip (NoC) systems. The particular area and power requirements imposed by complex circuits dictate the need for a more accurate design of repeaters and in some cases, it implies
to take in to account important phenomena previously considered as secondary or unimportant.
However, actual role played by MOSFETs parasitic capacitance on the buffer performance remains
quite unexplored. The work is aimed to develop advanced models allowing parasitic capacitances
to be taken into account. in the transient behaviour analysis of the line drivers and most of all
in their optimisation.A further just started up research topic deals on the frequency compensation
of multistage CMOS low-power cascade amplifiers. In discrete-time applications, it is fundamental
to allow for amplifier parasitic elements which are not more negligible in the analysis of frequency
compensation. In fact, mainly imposed by speed requirements, in such circuits the amplifier usually
drives on-chip capacitor whose value is sufficiently small so to be comparable to the transistor parasitic capacitances. The research objective is to carry out a novel methodology for designing nested
Miller amplifier that allows parasitic capacitances to be taken into account, preserving simplicity.
A significant portion of the work is devoted to settling time minimisation of OP-AMP response.
[1] P.Corsonello, S.Perri Efficient Reconfigurable Manchester Adders for low-power media processing, Journal of Circuit, System and Computers, Vol. 14, No. 1 (February 2005) USA, 2005
[2] S.Perri, M.Lanuzza, P.Corsonello, G. Cocorullo; ”A High-Performance Fully Reconfigurable
FPGA-based 2-D Convolution Processor ”, Microprocessors and Microsystems, Vol.29, n8-9, The
Netherlands 2005
[3] P. Corsonello, S.Perri, P.Zicari, G.Cocorullo; Microprocessor-based FPGA implementation of
SPIHT image compression subsystems Microprocessors and Microsystems,Vol.29, n6, The Netherlands, 2005
[4] Perri S. , Corsonello P. , Iachino M. A. , Lanuzza M. , Cocorullo G. , ” Variable Precision
arithmetic circuit for FPGA-based multimedia processors”. IEEE Transactions on VLSI Systems,
2004, Vol. 12, n. 9, pp. 995-999.
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[5] S.Perri, P.Corsonello, G. Cocorullo; Efficient recursive multiply architecture for FPGAs IEE
Electronics Letters , Vol. 41, n24, November 2005
[6] P. Corsonello, S.Perri, P.Zicari; ”A matrix product coprocessor for FPGA embedded soft
processors Proceedings of IEEE Conference, ISSCS05, Iasi, (Romania), Luglio 2005
[7] F.Frustaci, P. Corsonello; Impact of oxide thickness on performances of logic circuits: a predictive simulation study Proceedings of IEEE Conference, ISSCS05, Iasi, (Romania), Luglio 2005
[8] M. Lanuzza, M. Margala, P. Corsonello;Cost-Effective Low-power Processor-In-Memory-based
Reconfigurable datapath for Multimedia Applications Proceedings of IEEE Conference, ISPLED05,
San Diego, USA, Agosto 2005
[9] S.Perri, P.Corsonello, G.Cocorullo;Fast Low-Power 64-bit Modular Hybrid Adder Proceedings
of the IEEE PATMOS 2005 Conference, Lecture Notes on Computer Science, Leuven (Belgio),
Settembre 2005
[10] M. Lanuzza, S.Perri, M. Margala, P. Corsonello;Low-Cost Fully Reconfigurable Data-Path
for FPGA-Based Multimedia processor Proceedings of IEEE International Conference on Field
Programmable Logic and Applications, FPL05, Tampere (Finlandia), Agosto 2005
[11] M. Lanuzza, S.Perri, P. Corsonello, G.Cocorullo;An efficient wavelet image encoder for FPGAbased design Proceedings of IEEE Workshop on Signal Processing Systems, Athens (Grecia),
Novembre 2005
[12] P. Corsonello, S.Perri, M.Margala; A new charge-pump based countermeasure against differential power analysis Proceedings of IEEE Conference, ASICON05, Shanghai, Cina, Ottobre
2005
[13] P. Zicari, S.Perri, P. Corsonello, G.Cocorullo; An optimized Adder accumulator for high speed
MACs Proceedings of IEEE Conference, ASICON05, Shanghai, Cina, Ottobre 2005
[14] G. Cappuccino, A. Pugliese and G. Cocorullo, Output Resistance Scaling Model for DeepSubmicron Cmos Buffers for Timing Performance Optimisation, Lecture Notes in Computer Science, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and
Simulation, Vol. 3728, V. Paliouras, J. Vounckx, D. Verkest, (eds.) Springer-Verlag, Berlino;
[15] Andrea Pugliese, Franco Corapi e Gregorio Cappuccino, Channel Widening Effect on the
Effective Output Resistance of Deep-Submicron CMOS Line Driver and its Application to Repeater Insertion, Proceedings of Work in Progress Euromicro Symposium on Digital System Design,
DSD’2005, Porto, Portugal, Settembre 2005
[16] A. Pugliese, G. Cappuccino e G. Cocorullo, Nested Miller Compensation capacitors sizing
rules for fast-settling amplifier design, IEE Electronics Letters, vol. 41 N.10 , pp. 573 - 575
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CMOS-BASED NANOELECTRONICS
G. Cocorullo, F. Crupi, C. Pace
To meet the challenges from the continued downscaling of CMOS devices, the introduction of
new materials and architectures is strongly demanded. Our activity is focused on: i) the electrical characterization, reliability and modeling of CMOS devices with alternative materials and
architectures; ii) the design of dedicated ultra-low noise instrumentation. We have investigated
the impact of the main reliability issues (bias-temperature instability, time dependent dielectric
breakdown and hot carrier injection) on the device performance and lifetime of CMOS devices with
Hafnium based high-k gate dielectrics. We have studied the single-electron effects in Si nanocrystal memories. We have proposed and experimentally validated a new method for voltage noise
measurements, which overcomes the drawbacks of the conventional cross-correlation technique and
allows, at least in principle, the complete elimination of the noise introduced by the amplifiers used
for the measurements.
[1] F. Crupi, C. Pace, G. Cocorullo, G. Groeseneken, M. Aoulaiche, M. Houssa, PBTI in nMOSFETs with ultra-thin Hf-silicate gate dielectrics, Microel. Engin., special issue devoted to INFOS2005, vol. 80, pp. 130-133, 2005
[2] F. Crupi, T. Kauerauf, R. Degraeve, L. Pantisano, G. Groeseneken, A novel methodology for
sensing the breakdown location and its application to the reliability study of ultra-thin Hf-silicate
gate dielectrics, IEEE Trans. on Electron Devices, vol. 52, n. 8, pp. 1759-1765, 2005
[3] C. Pace, F. Crupi, S. Lombardo, C. Gerardi, G. Cocorullo: Room-temperature single-electron
effects in Si nanocrystal memories, Appl. Phys. Lett., vol. 87, 182106, 2005, also selected for the
November 7, 2005 issue of Virtual Journal of Nanoscale Science and Technology
[4] F. Crupi, G. Giusi, C. Ciofi, C. Pace, A novel ultra sensitive method for voltage noise measurements, pp. 1190-1193, IMTC Conf. Proc., Ottawa 2005
[5] T. Kauerauf , R. Degraeve, F. Crupi, B. Kaczer, G. Groeseneken, H.E. Maes, Trap generation
and progressive wearout in thin HfSiON, IRPS, pp. 45-49, San Diego 2005
[6] S. Cimino, L. Pantisano, M. Aoulaiche, R. Degraeve, D.H. Kwak, F. Crupi, G. Groeseneken,
A. Paccagnella, Hot carrier degradation on n-channel HfSiON MOSFETs: effects on the device
performance and lifetime, IRPS, pp. 275-279, San Diego 2005
[7] A. Campera, G. Iannaccone, F. Crupi, G. Groeseneken, Extraction of physical parameters of alternative high-k gate stacks through comparison between measurements and quantum simulations,
pp. 35-38, ULIS Conf. Proc., Bologna 2005
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FERRARA
Dipartimento di Ingegneria
Research topics
1) ELECTRON DEVICE MODELING FOR MMIC DESIGN
G.Vannini, A.Raffo, M.Pirazzini
Collaborations: IEIIT-CNR Bologna, DEIS Università di Bologna, Ericsson Lab Italy, TARGET
NoE VI FP EU, MEC s.r.l.
2) CHARACTERISATION OF DISPERSIVE EFFECTS IN III-V ELECTRON DEVICES
G.Vannini, A.Raffo
Collaborations: DEIS Università di Bologna, MEC s.r.l.
3) NETWORK ON CHIP ARCHITECTURES AND DESIGN ISSUES
D.Bertozzi
Collaborations: University of Bologna, Stanford University, EPFL Lausanne, University of Cagliari
4) ALLOCATION AND SCHEDULING STRATEGIES FOR STREAM-ORIENTED
ON-CHIP MULTIPROCESSOR SYSTEMS
D.Bertozzi
Collaborations: University of Bologna, Linkoeping University
5) RELIABILITY OF NON-VOLATILE MEMORIES
A. Chimenton, P. Olivo
Collaborations: Universit di Roma La Sapienza, ST Microelectronics, Infineon Flash
6) METODOLOGIES FOR EMI REDUCTION IN INTEGRATED CIRCUITS AND
SYSTEMS
F. Pareschi, M. Balestra, G. Setti
Collaborations: Università di Bologna
7) DESIGN AND APPLICATIONS OF CHAOTIC CIRCUITS AND SYSTEMS
F. PareschiG. Setti
Collaborations: Università di Bologna, EPFL, Kyushu University, University of Birmingham, Telecom Italia
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ELECTRON DEVICE MODELING FOR MMIC DESIGN
G.Vannini, A.Raffo, M.Pirazzini
Nonlinear modelling of active devices for microwave circuit design is quite a complex task due
to the simultaneous presence of important nonlinear, reactive and parasitic effects. As a possible
alternative to conventional equivalent circuit models, which present some drawbacks especially in
the identification procedures, different mathematical modelling approaches have been proposed
which can be directly identified on the bases of conventional measurements carried out by means of
automatic instrumentation. The problem of dispersive effects due to traps and thermal phenomena
was further dealt with and new modelling approaches were proposed.
Recently, the problem of quantifying the level of accuracy of a given nonlinear electron device
model was also addressed in the framework of the TARGET Network of Excellence (VI FP of the
European Union).
[1] A.Raffo, A.Santarelli, P.A.Traverso, G.Vannini, F.Palomba, F.Scappaviva, M.Pagani, F.Filicori,
Accurate PHEMT Nonlinear Modeling in the Presence of Low-Frequency Dispersive Effects, IEEE
Trans. on Microwave Theory and Techniques, Vol.53, no.11, pp., Nov 2005.
[2] A.Raffo, A.Santarelli, P.A.Traverso, M.Pagani, F.Palomba, F.Scappaviva, G.Vannini, F.Filicori,
Improvement of PHEMT Intermodulation Prediction Through the Accurate Modelling of LowFrequency Dispersion Effects, Proc. of IMS2005, Long Beach, California, Jun 2005.
[3] A.Raffo, A.Santarelli, P.A.Traverso, G.Vannini, F.Filicori, ”Small-Signal Operation-Based Simplified Verification of Non-Linear Models for Millimeter-Wave Electron Devices”, 65th ARFTG,
IMS2005, Long Beach, California, Jun 2005.
[4] M.Pirazzini, G.Fernndez, A.Alabadelah, G.Vannini, M.Barciela, E.Snchez, D.Schreurs, A Preliminary Study of Different Metrics for the Validation of Device and Behavioral Models, 65th
ARFTG, IMS2005, Long Beach, California, Jun 2005.
[5] D. Schreurs, M. Barciela, G. Vannini, Methodology to Validate and Inter-compare RF Device and Circuit Models, Workshop on Advances in RF Power Amplifiers, IMS2005, Long Beach,
California, Jun 2005.
[6]
F.Palomba, A.Meazza, M.Pagani, A.Raffo, A.Santarelli, P.A.Traverso, F.Scappaviva,
G.Vannini, F.Filicori, High Linearity MMIC Power Amplifier design based on a Non-Linear Discrete
Convolution model, TARGET Network of Excellence VI FWP, Workshop on RF Power Amplifiers,
Orvieto, Italy, April 14-15, 2005.
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CHARACTERISATION OF DISPERSIVE EFFECTS IN III-V ELECTRON
DEVICES
G.Vannini, A.Raffo
Dispersive phenomena due to surface state densities, deep-level traps and thermal effects must
be accounted for in the nonlinear modelling of III-V electron devices. From a macroscopic point of
view they cause important differences between the static and dynamic device current characteristics.
In terms of differential parameters a frequency dependence is found in a frequency range where
reactive effects due to charge storage or transit time phenomena are still negligible.
As an alternative to special purpose measurement setup’s for dynamic current and thermal
resistance measurements, new characterisation techniques based on conventional instrumentation
have been developed.
[1] A.Raffo, A.Santarelli, P.A.Traverso, M.Pagani, G.Vannini, F.Filicori, Accurate Modeling of
Electron Device I/V Characteristics Through a Simplified Large-Signal Measurement Setup, International Journ. of RF and Microwave Computer-Aided Engineering, Special issue on microwave
power amplifier modelling and design, September 2005.
[2] F.Filicori, P.Rinaldi, G.Vannini, A.Santarelli, A New Technique for Thermal Resistance Measurement in Power Electron Devices, IEEE Transactions on Instrumentation and Measurements,
Vol.54, n.5, Oct 2005.
[3] R.P.Paganelli, I.Melczarsky, R.Cignani, G.Vannini, F.Filicori, M.C.Comparini, M.Feudale,
R.Giordani, R.Battaglia, X-Band Power Amplifier for future generation SAR T/R Modules in HBT
technology, 28th ESA Antenna Workshop on Space Antenna Systems and Technologies, State of
the art in a strategic area and creative ways forward, ESA/ESTEC, Noordwijk, The Netherlands,
31 May - 3 June 2005
NETWORK ON CHIP ARCHITECTURES AND DESIGN ISSUES
D.Bertozzi
Networks on chip (NoCs) have been proposed as the long term solution for the communication
scalability problem. In fact, as the number of integrated Intellectual Property (IP) cores on a single
silicon die approaches several tens or even hundreds, state-of-the-art interconnect fabrics are not
proving capable of providing the required bandwidth between communicating cores. NoCs exhibit
a few relevant advantages: they represent a modular solution to on-chip communication (since
they just consist of two replicated components: network interfaces and network switches) and they
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provide the required scalability. However, some distinctive challenges still characterize research in
this domain. First, NoCs significantly impact interconnect fabric area and power consumption.
Second, a new tool flow is required in order to map the communication requirements of application
tasks on top of a network on chip architecture. Finally, the development of a synthesis backend is
now an undelayable need of the NoC community. In this context, the research activity we carried
out concerned all the above challenges. Our contribution to design technology for NoCs consisted
of the development of a tool flow able to analyse an abstract representation of the application
(pointing out the communication requirements), to compare several topology alternatives, to select the best network configuration based on the selected objective function and to automatically
generate SystemC code for functional simulation and for logic synthesis. The NoC architecture
we are developing (named xpipes was among the first ones to be equipped with a complete synthesis flow starting from high level application specification all the way to layout generation and
post-layout verification. Concerning the synthesis backend, we have set up a synthesis and performance/energy characterization flow, allowing us to perform design space exploration of NoC
components. Therefore, we have been able to identify critical paths and hot spots inside switches
and network interfaces, and perform the relative optimizations. Although the synthesis flow has
drawn most of our efforts, we have continued developing the xpipes architecture, with the objective
of tuning architecture parameters and explore alternative design choices. For instance, we have
compared several flow control schemes, pointing out their memory requirements and their native
support for communication reliability. The reliability issue has then been addressed leveraging
redundant link encoding: in practice, the voltage swing of switch-to-switch links was lowered (thus
cutting down on transition energy), and lightweight link encoding schemes were used to make up
for the reduced noise margins.
[1] D. Bertozzi, A. Jalabert, S. Murali, R. Tamhankar, S. Stergiou, L. Benini, G.De Micheli, ”NoC
synthesis flow for customized domain specific multiprocessor systems-on-chip”, IEEE Transactions
on Parallel and Distributed Systems, Volume 16, Issue 2, Feb 2005, Page(s):113-129.
[2] L. Benini, D. Bertozzi, ”Network-on-chip architectures and design methods”, IEE Proceedings
on Computers and Digital Techniques, Volume 152, Issue 2, Mar 2005, Page(s):261-272.
[3] D. Bertozzi, L. Benini, G.De Micheli, ”Error control schemes for on-chip communication links:
the energy-reliability tradeoff”, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 24, Issue 6, June 2005, Page(s):818-831.
[4] S. Stergiou, F. Angiolini, S. Carta, L. Raffo, D. Bertozzi, G. De Micheli, ”xpipes Lite: A
Synthesis Oriented Design Flow For Networks on Chips”, Proceedings of the Design, Automation
and Test in Europe Conference 2005, Munich, Germany, March 7-11, 2005, Page(s):1188-1193.
[5] A. Pullini, F. Angiolini, D. Bertozzi, L. Benini, ”Fault Tolerance Overhead in Network-on-Chip
Flow Control Schemes”, Proceedings of 18th Annual Symposium on Integrated Circuits and System
Design (SBCCI) 2005, Florianopolis, Brazil, Sep 4-7, 2005, Page(s) 224-229.
[6] F. Angiolini, P. Meloni, D. Bertozzi, L. Benini, S. Carta, L. Raffo, ”Networks on Chips: A
Synthesis Perspective”, Proceedings of the Parallel Computing (ParCo) Conference 2005, Malaga,
Spain, Sep 13-16, 2005.
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[7] F. Angiolini, D. Bertozzi, L. Benini, S. Murali, S. Stergiou, G. De Micheli, P. Meloni, S.
Carta, L. Raffo, ”The SUNMAP/xpipes NoC Synthesis Flow”, University Booth at the Design,
Automation and Test in Europe Conference and Exhibition 2005, Munich, Germany, Mar 7-11,
2005.
ALLOCATION AND SCHEDULING STRATEGIES FOR STREAM-ORIENTED
ON-CHIP MULTIPROCESSOR SYSTEMS
D.Bertozzi
Multi-Processor Systems-on-Chip (MPSoCs) integrate a number of heterogeneous and reconfigurable computation, storage and communication resources. Traditional embedded software
development tools mostly focus on a single-processor, centralized architecture. These tools can be
adapted to produce working code for MPSoCs, but tedious and error-prone hand-tuning of generated assembly code is required, which contradicts dependability requirements. Furthermore, in
the traditional approach, software development tools and RTOSs (Real-Time Operating Systems)
are mostly developed in isolation first and are being integrated only later in a project, which is a
major source for wasting resources and reduced dependability in a system context. In a nutshell,
traditional embedded software development tools suffer from limited scalability and composability.
These limitations become critical when targeting a highly complex MPSoC platform. Our research
in this field has addressed these shortcomings and has achieved the following objectives. First, we
have developed a set of tools and a methodologies that will assist the software designer in optimising
a complex embedded application for a target MPSoC platform against a set of complex quality-ofservice, power and cost constraints. In particular, we have focused on communication-aware and
power-efficient optimization of the system, taking memory and real-time requirements into account
and always validating theoretical results against functional simulation. Second, we have evaluated
the state of the art and exploited optimisation engines for developing solvers that are specifically
tuned for solving complex and structured constrained optimisation problems arising in the various
steps of the application mapping process, where application tasks must be allocated and scheduled
on multiple computation and communication resources available in the hardware platform. Finally,
we have addressed the problem of selecting the optimal number of processing cores and their operating voltage/frequency settings for a given workload, to minimize overall system power under
application-dependent QoS constraints.
[1] L. Benini, D. Bertozzi, A. Guerri, M. Milano, F. Poletti, ”Measuring Efficiency and Executability of allocation and scheduling in Multi-Processor Systems-on-Chip”, in ”Intelligenza Artificiale,
Anno II, Volume 3 ”, pagg. 13-21. Also in ”Atti della Giornata di Lavoro: Analisi sperimentale e
benchmark di algoritmi per l’Intelligenza Artificiale” (AIIA-RCRA05), Ferrara, Italy, Jun. 2005.
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[2] L. Benini, D. Bertozzi, A. Guerri, M. Milano, ”Allocation and Scheduling for MPSoCs via decomposition and no-good generation”, Proceedings of the 11th International Conference on Principles and Practice of Constraint Programming” (CP2005), Sitges, Spain, Sep. 2005, pagg. 107-121.
[3] L. Benini, D. Bertozzi, A. Guerri, M. Milano, ”Allocation and Scheduling for MPSoCs via
decomposition and no-good generation” in ”Proceedings of the 19th International Joint Conference
on Artificial Intelligence” (IJCAI05), Edinburgh, Scotland, Aug. 2005, pag. 1517-1518. Full Text
(pdf, 112 Kb)
[4] M. Ruggiero, A. Acquaviva, D. Bertozzi, L. Benini, ”Application-specific power-aware workload
allocation for voltage scalable MPSoC platforms”, 2005 International Conference on Computer
Design, Oct. 2-5, 2005, Page(s):87 - 93.
RELIABILITY OF NON-VOLATILE MEMORIES
A. Chimenton, and P. Olivo
The research activity concerns experimental characterization and simulation/modeling of Flash
memory arrays, with particular emphasis towards reliability issues related to data retention, erratic
bits, fast and tail bits and erased distribution width.
The availability of a dedicated instrumentation called RIFLE, from Research Instrument for
FLash Evaluation) able to characterize large arrays of cells allows analyzing important reliability
effects that cannot be studied in simpler test structures such as small arrays of capacitors or
transistors. In fact, some important effects, like anomalous leakage and erratic erase, can lead
to memory single bit failure with premature reduction of endurance or data retention. These
phenomena afflict a small percentage of cells within a large array thus requiring a statistical study
of a significant number of cells (¿1Mb).
In 2005 the experimental characterization concerned the analysis of the impact of the erasing
electric field on the erratic erase. In particular the effect of short erasing pulses featuring very high
electric fields has been experimentally evaluated. The effect of post erasing repair schemes (soft
erasing and soft programming) has been studied in order to evaluate their impact on long terms
reliability.
[1] A. Chimenton, and P. Olivo, Reliability of erasing operation in NOR type Flash memories,
Introductory Invited Paper in Microelectronic Reliability, Vol. 45, pp.1094-1108, July-Aug. 2005
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METODOLOGIES FOR EMI REDUCTION IN INTEGRATED CIRCUITS AND
SYSTEMS
M. Balestra, F. Pareschi, G. Setti
Spurious signals associated to electromagnetic interferences (EMI) conveyed to the input or to
the supply rails of integrated operational amplifiers are likely to induce severe failures. Starting
from this observation, detailed studies from both an electrical and a practical point of view were
carried out to find the electrical and/or the physical origin of circuit failures in OpAmps due to
EMI. Exact prediction of the OpAmps behavior is a very hard task since it is difficult to define
the precise path of the interfering signal injected into the circuit and because one must deal with
multiple inputs circuits in which it is very difficult to recognize the role of each transistor parameter.
As a result of this activity, it has been shown that for some CMOS and BiCMOS topologies,
EMI susceptibility strongly depends on the parasitic interelectrodic capacitances of the OpAmps
differential input stage. With this, such failures can be appreciably reduced by introducing suitable
compensating networks in the OpAmps during the design phase.
As a non-negligible byproduct of the performed analysis, several useful informations have also
been collected, which will be of paramount importance for developing EMI-oriented operational
amplifiers macromodels.
Additionally, chaos based techniques have been applied to reduce EMI due to clock signals,
by adding a slight jitter obtained via a FM modulation with a chaotic signal generated by a onedimensional map. Experimental results confirm the possibility to have a reduction of the power
sepctrum peak (and therefore of the interfering signal) by at least 10dB with respect to similar
methodologies already published in the literature and used by Intel, IBM and Cypress. We have also
designed a spread spectrum clock generator in a 0.35um CMOS technology. The circuit is based on
a modification of a standard PLL circuit and has been shown to be extremely effective in lowering
spectrum peaks. This activity has been particularly successfull, since it has been awarded, since
2004 by the IEEE Circuits and Systems Society Darlington Award and by 2 Best Paper Awards,
at EMCZurich2005 and ECCTD2005.
[1] L. De Michele, F. Pareschi, R. Rovatti, G.Setti, “A PLL based Clock Generator with Improved
EMC,” International Symposium on Electromagnetical Compatibility (EMC2005), Zurigo, Febbraio
2005, pag. 367-372, vincitore del Best Student Paper Award
[2] M. Balestra, M. Lazzarini, R. Rovatti, G. Setti, “Experimental Performance Evaluation of
a Low-EMI Chaos-Based Current-Programmed DC/DC Boost Converter,” IEEE International
Symposium on Circuits and Systems (ISCAS2005), pagg. 1489-1492, Kobe, Maggio 2005
[3] S. Santi, B. Lin, L. Kocarev, G. M. Maggio, R. Rovatti, “On the Impact of Traffic Statistics on
Quality of Service for Networks on Chip,” IEEE International Symposium on Circuits and Systems
(ISCAS2005), pagg. 2349-2352, Kobe, Maggio 2005
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[4] G. Setti, R. Rovatti, G. Mazzini, “Chaos-Based Multi-Carrier CDMA: Orthogonal Subspace Approach,” IEEE/IEICE Int. Symposium on Nonlinear Theory and its Applications (NOLTA2005),
pagg. 106-109, Brugge, Ottobre 2005
[5] M. Balestra, M. Lazzarini, G. Setti, R. Rovatti, “Design of a High EMC Hysteretic CurrentControlled DC/DC Boost Converter Using Chaotic Perturbations,” International Symposium on
Embedded EMC (2emc), Rouen, Settembre 2005
[6] S. Santi, M. Ballardini, R. Rovatti, G. Setti, “The Effects of Digital Implementation on ZePoC
CoDec” 17th European Conference on Circuit Theory and Design (ECCTD’05), pagg. III/173 –
III/176, Cork, Settembre 2005
[7] L. De Michele, F. Pareschi, R. Rovatti, G. Setti, “Chaos-based High-EMC Spread-Spectrum
Clock Generator,” 17th European Conference on Circuit Theory and Design (ECCTD’05), pagg.
I/165–I/168, Cork, August 2005 vincitore del Best Paper Award
DESIGN AND APPLICATIONS OF CHAOTIC CIRCUITS AND SYSTEMS
F. Pareschi, G. Setti
In recent years engineering applications of chaotic electronic circuits and systems have attracted
increasing attention both in the academic and industrial worlds. In fact, the continuous pursuit of
both methodological and technological innovation has led to understand that common linear models
of real systems suffer from severe limitations for predicting all the possible system behaviors. In
particular, they preclude the exploitation of phenomena whose complexity may be an intrinsic
advantage in fields like cryptography, noise generation with prescribed statistical features, random
number generation, communication and nonlinear signal processing.
Starting from the observation that chaotic systems enjoy a mixed deterministic/stochastic nature, advanced method from the statistical approach to dynamical system theory have been employed to clarify that the tasks which are most likely to benefit from chaos-based techniques are
those where the statistical properties of the signals are the dominant factor. Such methods have
been employed to analyze the impact of adopting chaos-based spreading sequences in a standard
DS-CDMA communication system. As a results, it has been shown that chaos-based spreading
sequences exist which behave not worse than purely random sequences (which are often assumed
as the reference case) while not suffering from the limitations on sequence number and/or length
which are intrinsic in all the classical generation methods.
As far as chaotic circuit design is concerned, the research has been mainly devoted to establish
criteria guaranteeing a robust design of one dimensional chaotic maps used as noise generators. By
following this guidelines, despite of some implementations inaccuracies, the desired chaotic behavior
is maintained, without compromising on the statistical features of the generated time-series.
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[1] S. Callegari, R. Rovatti, G. Setti, “First Direct Implementation of a True Random Source on
Programmable Hardware,” International Journal of Circuit Theory and Applications, pagg. 1-16,
vol. 33, Gennaio 2005
[2] S. Callegari, R. Rovatti, G. Setti, “Embeddable ADC-Based True Random Number Generator for Cryptographic Applications Exploiting Nonlinear Signal Processing and Chaos,” IEEE
Transactions on Signal Processing, pagg. 793-805, vol. 53, Febbraio 2005
[3] G. Mazzini, R. Rovatti, G. Setti, “A Closed Form Solution of Bernoullian Two-Classes Priority
Queue,” IEEE Communications Letters, pagg. 264-266, vol. 9, Marzo 2005
[4] G. Mazzini, R. Rovatti, G. Setti, “On the Aggregation of Self-Similar Processes,” IEICE
Transactions on Fundamentals, vol. 88, n. 9, pagg. 2656-2663, Settembre 2005
[5] S. Vitali, R. Rovatti, G. Setti, “On the Performance of Chaos-based Multicode DS-CDMA
Systems,” Circuits, Systems and Signal Processing, vol. 24, n. 5, pagg. 475-495, Dicembre 2005
[6] G. Setti, R. Rovatti, G. Mazzini, “Chaos-Based Generation of Artificial Self-Similar Traffic,”
invitato su: Complex Dynamics in Communication Networks, L. Kocarev, G. Vattay (Editors),
Springer-Verlag, pagg. 159-190, 2005
[7] F. Pareschi, G. Setti, R. Rovatti, “A Macro-model for the Efficient Simulation of an ADC-based
RNG,” IEEE International Symposium on Circuits and Systems (ISCAS2005), pagg. 4349-4352,
Kobe, Maggio 2005
[8] S. Callegari, R. Rovatti, G. Setti, “Reconfigurable ADC/True-RNG for Secure Sensor Networks,” IEEE Sensors 2005, pagg. 1072-1075, Irvine, Ottobre 2005
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FIRENZE
Elettronica e Telecomunicazioni
Research topics
1) AEROSPACE DIELECTRIC MATERIALS CHARACTERIZATION
A. Bulletti, L. Capineri, M. Calzolai, L. Masotti, M. Materassi
Collaborations: ESA-ESTEC, Alcatel Alenia Space,
Other sources of funding: European Space Agency
2) PYROELECTRIC TRANSDUCERS ARRAYS FOR INFRARED MEASUREMENTS
L. Capineri, L. Masotti, M. Calzolai, M. Mazzoni
Collaborations: IFAC - CNR Firenze, El.En. S.p.A. Firenze
Other sources of funding: INOA
3) PIEZO-POLYMER GUIDED WAVES TRANSDUCERS
F. Bellan, A. Bulletti, L. Capineri, M. Calzolai, L.Masotti, E. Rosi, F. Guasti
Collaborations: Alenia Spazio - Laben, ESA-ESTEC
4) BURIED OBJECTS DETECTION WITH ACOUSTIC AND RADAR METHODS
A. Bulletti, L. Capineri, P. Falorni, L. Masotti, C.G. Windsor, S. Matucci, G. Borgioli, B. Morini
Collaborations:
I.D.S. Pisa, EPFL (Switzerland), Remote Sensing Laboratory Baumann
University-Moscow (Russia)
Other sources of funding: University of Florence, I.D.S. Pisa, Ecole Politechnique Federale Lausanne
5) MINIATURIZED FIBER OPTIC ULTRASONIC TRANSDUCERS FOR VIRTUAL BIOPSY
L. Masotti, E. Biagi, A. Acquafresca, S. Cerbai, M. Calzolai
Collaborations: Istituto Nazionale di Ottica, Istituto Elettronica Quantistica di Firenze
Other sources of funding: ACTIS, El.En., Ente Cassa di Risparmio di Firenze
6) ULTRASONIC CONTRAST AGENTS (UCAS)
L. Masotti, E. Biagi, L. Breschi, E. Vannacci
Collaborations: ESAOTE Biomedica S.p.A. Firenze, Clinica Veterinaria Universit degli studi di
Bari, Bracco Research Geneve Switzerland
Other sources of funding: Progetto Coofinanziato FIRB, Fondazione Monte dei Paschi di
Siena,Esaote S.p.A.
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7) ULTRASONIC SPECTRAL IMAGING FOR BIOLOGICAL TISSUES: MULTIRESOLUTION ANALYSIS BY MEANS OF WAVELET PACKETS
L. Masotti, E. Biagi, S. Granchi, D. Bini, F. Ceccarelli, A. Luddi, E. Magrini, A. Cerchiara
Collaborations: ESAOTE Biomedica S.p.A. Firenze, Bracco Imaging Milano, Dipartimento di Radiologia Ospedale Valduce Como,Istituto Oncologico Europeo Milano,Dipartimento di Radiologia
Ospedale di Circolo Busto Arsizio Varese, Clinica Urologica Dipartimento di Scienze Chirurgiche
e Anestesiologiche Universit di Bologna, Sezione di Urologia Dipartimento Area Critica Medico
Chirurgica Universit degli Studi di Firenze, Dipartimento di Patologia Umana e Oncologica Universita’ degli Studi di Firenze
Other sources of funding: Progetto Coofinanziato COFIN, Fondazione Monte dei Paschi di Siena,
Ente Cassa di Risparmio di Firenze, Esaote S.p.A.
8) HARDWARE AND SOFTWARE ECHOGRAPHIC PLATFORM FOR REAL
TIME PROCESSING OF THE RADIOFREQUENCY SIGNAL
L. Masotti, E. Biagi, A. Acquafresca, L. Breschi, M. Calzolai, F. Di Lorenzo, P. Gambacciani, A.
Giombetti, S. Granchi, M. Scabia, G. Torricelli, B. Zanotto
Collaborations: ESAOTE Biomedica S.p.A. Firenze
Other sources of funding: Progetto Coofinanziato COFIN, El.En., ACTIS, Fondazione Monte dei
Paschi di Siena
9) ICARUS: IMAGING PULSE COMPRESSION ALGORITHM THROUGH
REMAPPING OF ULTRASOUND
E. Biagi, L. Masotti, M. Scabia, L.Pampaloni
Collaborations: ESAOTE Biomedica S.p.A. Firenze
Other sources of funding: ESAOTE Biomedica, Fondazione Monte dei Paschi di Siena
10) ULTRASONIC VECTOR DOPPLER
E. Biagi, L. Masotti, M. Scabia, G Torricelli, A. Pastorelli
Collaborations:
Other sources of funding: Progetto PRIN, Esaote S.p.A.
11) MICROWAVE SYSTEM ANALYSIS BY MEANS OF ACCURATE SUBSYSISTEM BEHAVIOURAL MODELING
A. Cidronali, I. Magrini, R. Fagotti, C. Accillaro, G. Loglio, G. Manes
Collaborations: Agilent Technologies,(USA), National Institute for Standard and Technology
(USA)
Other sources of funding: IST Network of Excellence TARGET project no. 507893
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12) MICROWAVE DEVICE AND CIRCUITS CHARACTERIZATION BY USING
VECTORIAL LARGE-SIGNAL MEASUREMENTS
A. Cidronali, I. Magrini, C. Accillaro, G. Loglio, G. Manes
Collaborations: Agilent Technologies, (USA), NIST (U.S.A)
Other sources of funding: IST Network of Excellence TARGET project no. 507893
13) HIGH-SPEED DIGITAL SIGNAL PROCESSING
P. Tortoli, F. Guidi, S.Ricci, E. Boni, L.Bassi, P.Fidanzati, A.Dallai, T.Morganti
Collaborations: Yale University, University of Leicester, University of Rotterdam, Bracco Research
Geneve, Universit Claude Bernard Lyon 1, Universit di Pisa
Other sources of funding: EU UMEDS Project, PRIN
14) CONTINUOUS WAVE SYNTHETIC APERTURE RADAR FOR CIVIL APPLICATIONS: LANDSLIDE MONITORING, ARCHITECTURAL STRUCTURES
TESTING, GROUND AND MASONRY PENETRATION
C.Atzeni, M. Pieraccini, G.Luzi, M.Fratini, D. Mecatti, L. Noferini, G. Macaluso, F. Parrini.
Collaborations: IDS Spa, Pisa,CESI SpA - ISMES Division di Bergamo,Universit di PADOVA, Dipartimento di GEOLOGIA, PALEONTOLOGIA E GEOFISICA Tohoku University Sendai Japan,
ENVEO ENVEO - Environmental Earth Observation Austria,BFW Austrian Federal Office and
Research Centre for Forests Austria, GAMMA Gamma Remote Sensing Switzerland, IGME Instituto Geolgico y Minero de Espaa Spain,IG Institute of Geomatics Spain, Comision Nacional de
Energia Atomica, Argentina
Other sources of funding: Italian Ministry of Research (PRIN: Projects of National Interest
2002 and 2003) European Community (STREP 2004: Specific Targeted Research Proposal of EU
Sixth Framework Programme) Italian Ministry of Foreign Affair Specific research contract with
companies.
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AEROSPACE DIELECTRIC MATERIALS CHARACTERIZATION
A. Bulletti,L. Capineri, M. Calzolai, L. Masotti, M. Materassi, M. Capacci
New dielectric materials have been introduced for printed circuit board applications, such as
Thermount and polyimide with the aim to match the requirements for high speed and high density
of electronic devices that are planned for new spacecraft electronic boards. Before these newer
substrate can fully replace the well known space approved material epoxy FR-4, it is necessary
to investigate more deeply their electrical and mechanical properties. The scope of this study is
a quantitative characterization of the surface resistivity for the different material samples under
various testing conditions that include relative humidity, temperature, solder flux contamination
and corona discharge. The surface resistivity results are reported for sets of samples measured
under a combination of testing conditions.
[1] A. BULLETTI, L. CAPINERI, M. MATERASSI, B.D. DUNN,”Surface resistivity characterisation of new printed circuit board materials for use in space environment”, Submitted to TEPM
on December 2005, under revision [2] A. BULLETTI, L. CAPINERI, M. MATERASSI, B.D.
DUNN,”Characterisation of electrical properties of innovative materials for Printed Circuit Boards’
(PCBs’) design”, accepted at 10th International Symposium on Materials in a Space Environment,
Collioure (France).
PYROELECTRIC TRANSDUCERS ARRAYS FOR INFRARED
MEASUREMENTS
L. Masotti,L. Capineri, M. Calzolai, F.Lenzi , M. Mazzoni, G. Masotti
The research activity has been completed on the development of a large area pyroelectric array
connected to a with a versatile electronic instruments for power laser beam diagnostic in real-time.
[1] L. CAPINERI, F. LENZI, L. MASOTTI, M. MAZZONI, ”Compensation analog filter design for a PVDF pyroelectric array employed in monitoring CO2 laser beams”. IEEE SENSORS
JOURNAL, VOL. 5, NO. 3, JUNE 2005, pp 520-529 [2] L. Capineri, G. Masotti, L. Masotti,
M. Mazzoni (Inventors), Matrix-type pyroelectric sensor, method for its fabrication and device for
characterizing laser beams comprising said sensor. European patent EP1380821
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PIEZO-POLYMER GUIDED WAVES TRANSDUCERS
F. Bellan, A. Bulletti, L. Capineri, M. Calzolai, L.Masotti, O. Occhiolini, E. Rosi, F. Guasti
The capability of strain measurements on carbon fiber reinforced composite subjected to pure
bending has been demonstrated with piezopolymer interdigital transducers. This type of transducers are suitable for non destructive testing with Lamb waves.
[1] F. BELLAN, A. BULLETTI, L. CAPINERI, L. MASOTTI, G.G. YARALIOGLU , F. LEVENT
DEGERTEKIN, B. T. KHURI-YAKUB, ”A new design and manufacturing process for embedded
Lamb waves interdigital transducers based on piezopolymer film”, Sensors and Actuators A 123124 (2005) 379-387 [2] A. BULLETTI, O. OCCHIOLINI, L. CAPINERI, L. MASOTTI and E.
ROSI, ”Strain measurements on carbon-epoxy composites by Lamb waves piezopolymer interdigital
transducers”, IEEE UFFC Symposium , September 2005, Rotterdam, The Netherlands, pp. 407410
BURIED OBJECTS DETECTION WITH ACOUSTIC AND RADAR METHODS
A. Bulletti, L. Capineri, P. Falorni, L. Masotti, C.G. Windsor, S. Matucci, G. Borgioli, B. Morini
The research activity on the detection of buried utilities has been focussed to the determination
of eleongated cylindrical targets with arbitrary directions and with large diameter respect to the
wavelength of the radar. Non linear acoustic methods have been applied and verified for the
detection of mine simualants buried in sand.
[1] C. WINDSOR, L. CAPINERI , P. FALORNI, S. MATUCCI, and G. BORGIOLI, ”The estimation of buried pipe diameters using ground penetrating radar”, INSIGHT, Vol 47, N7 , July 2005,
pp 394-399 [2] L. CAPINERI, P. FALORNI, L. MASOTTI, C.G. WINDSOR ”Pictorial visualization of antipersonnel mines using ground penetrating radar”, Proceedings of abstracts presented
at Progress In Electromagnetics Research Symposium 2005, Hangzhou, China, August 22-26, pp
337 [3] C.G. WINDSOR, L. CAPINERI, P. FALORNI, ”The estimation of buried pipe diameters by generalised Hough transform”, Proceedings of extended papers presented at Progress In
Electromagnetics Research Symposium 2005, Hangzhou, China, August 22-26, pp 345-348 [4] P.
FALORNI, L. CAPINERI, L. MASOTTI, G. ALLI, G. PINELLI, ”Automatic detection of buried
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pipes from ground penetrating radar data”, Proceedings of abstracts presented at Progress In
Electromagnetics Research Symposium 2005, Hangzhou, China, August 22-26, pp 378
MINIATURIZED FIBER OPTIC ULTRASONIC TRANSDUCERS FOR VIRTUAL
BIOPSY
L. Masotti, E. Biagi, A. Acquafresca, S. Cerbai, M Calzolai
Beginning in the 80’s, there have been proposals of opto-acoustic ultrasonic sources, based on
the use of fiber optics, potentially interesting for diagnostic applications. Typically the fiber is
coupled to a pulsed laser. Initially the unique task of the fiber was to guide laser pulses onto a
metallic layer deposed over a thin glass. The film absorbs laser light and the consequent thermal
dilatation generates ultrasound in the surroundings An improved version of this source was realized by deposing directly the metallic layer over the fiber optic tip. This solution permits a strong
miniaturization and eliminates the interference phenomena, due to multiple ultrasonic reflection
inside the glass substrate, which cause strong detriment to ultrasonic spectrum. This was a simple source, with excellent electromagnetic compatibility, galvanic isolation, capable of generating
ultrasonic signals with large and flat band, independently on the physical characteristics of the
investigated medium; moreover it allowed the control of the bandwidth through the choice of laser
pulse duration. Unfortunately this source exhibited very low efficiency, mainly because of high
reflectivity of metal film which absorbs only a small fraction of incident optical energy. Lately, an
extensive theoretical study led us to develop a high-efficiency source by replacing the metallic film
with a thin layer of graphite. The graphite ensures high optical absorption with respect to metallic
layers and possesses excellent thermal properties. As a consequence, an improvement in conversion
efficiency of about two order of magnitude has been obtained by using the same laser peak power.
The effect of varying the graphite layer thickness has been studied and a complete source characterization has been performed in terms of efficiency, spectral distribution and radiation pattern.
The efficient opto-acoustic generation is an appealing technique, intrinsically wide-band, but a
miniaturized broadband ultrasonic receiver is needed to fully exploit its benefits. The experiments
carried out by our group, together with other works presented in literature indicate the way in
which a broad band miniaturized ultrasonic receiver can be realized. It suffices to mount an optical
Fabry-Perot interferometer on the tip of a fiber optic, which is in turn coupled to a continuous
wave laser. The intensity of reflected light is determined by the cavity length modulation induced
by ultrasounds, and can be detected by a fast photodiode. All these results let us to foresee the
possibility to realize a complete ultrasonic miniaturized transducer constituted by two optical fibers
closely bound: a fiber coupled to a pulsed laser to generate ultrasounds, and a second fiber, carrying a continuous wave laser, for receiving. The high- frequency and broad-band characteristics
of generated and received ultrasounds allow investigating the structural organization of biological
tissues by means of echo signal local spectral analysis. In addition the transducer miniaturization
would permit to insert it in vessels, natural orifices or, by a simple syringe needle, through the
derma, to reach and characterize focal lesions with minimal invasive intervention. For all these
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reasons, the proposed transducer might led to the development of ultrasound ”virtual biopsy” if a
proper signal processing for spectral analysis is adopted.
[1] L. Masotti, E. Biagi, A. Acquafresca, and D. Menichelli, ”Towards Ultrasonic Virtual Biopsy,” in
Proc. of Aisem 2002,4-6 Feb,. Bologna, Sensors and Microsystems, River Edge, NJ, (USA): World
Scientific Publ., 2002 [2] L. Masotti, E. Biagi, A. Acquafresca, and D. Menichelli, ”Optoacustica per
diagnostica medica e proposta di un trasduttore miniaturizzato in fibra ottica per ”biopsia virtuale”
ad ultrasuoni,” in Proc. of Elettroottica 2002 - 7 Convegno Nazionale ”Strumentazione e metodi di
misura elettroottici”, Montecatini Terme (Pt), Italy, May 2002, pp. 295-302 [3] L. Masotti, E. Biagi,
and A. Acquafresca, ”Trasduttori in fibra ottica per ”biopsia virtuale” ad ultrasuoni,” presented
at Riunione annuale del Gruppo Elettronica, Trieste, Italy, June 2002 [4] L. Masotti, E. Biagi,
A. Acquafresca, and D. Menichelli, ”Fiber optic sensors for ultrasonic virtual biopsy,” in Proc. of
IEEE Sensors, vol. 1, June 12-14, 2002, pp. 261-265 [5] L. Masotti, E. Biagi, A. Acquafresca, and
S. Cerbai, ”Towards virtual biopsy through an all fiber optic ultrasonic miniaturized transducer:
a proposal,” in Proc. of 2002 IEEE International Ultrasonics Symposium, Oct. 8-11, 2002 [6] A.
Acquafresca, E. Biagi, L. Masotti, and D. Menichelli, ”Towards virtual biopsy through an all fiber
optic ultrasonic miniaturized transducer: a proposal,” IEEE Trans. Ultrason. Ferroelect. Freq.
Contr., vol. 50, no. 10, pp. 1325-1335, Oct. 2003
ULTRASONIC CONTRAST AGENTS (UCAS)
L. Masotti, E. Biagi, L. Breschi, E. Vannacci
The research is aimed to develop new ecographic technique in order to improve diagnostic
power of ecographic equipment by using ultrasound contrast agents (UCAs). A complete measurement set-up based on FEMMINA platform has been realized in order to acoustically characterize
the ultrasonic contrast agents. The experimentation carried on has shown peculiar subharmonic
emissions from contrast agents that have been exploited to develop a new imaging modality. Subharmonic imaging technique shows great contrast to tissue ratio and is able to work in a real time
modality due to the low contrast agent destruction ratio. Subharmonic response from UCAs was
investigated by varing the ultrasound pulse shape in order to enhance subharmonic emission of
bubbles.
[1] E. Biagi, L. Breschi, E. Magrini, M. Gentile,” Acoustical and optical characterization of ultrasound contrast agents,’ Proocedings of 8th National Conference on Sensors and microsystem,
AISEM 12-14 February 2003. In Press. [2] E. Biagi, L. Masotti, L. Breschi, M. Gentile, S. Maz-
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zanti, A. Ricci, and M. Scabia, ”Harmonic and subharmonic acoustic response of microbubbles,”
in Proc. of the 27th International Symposium Acoustical Imaging, Saarbrcken, Germany, March
24-27, 2003. [3] L. Masotti, E.Biagi, M. Scabia, S. Granchi, and L. Breschi, ”Echographic examination method using contrast media,” Italian Patent No. FI2002A000077, date of filing: Mar.
26, 2003, U.S. Patent 10/809758, date of filing: Mar. 25, 2004. [4] L. Masotti, E. Biagi, and L.
Breschi, ”Transient subharmonic and ultraharmonic acoustic emission during dissolution of free
gas bubbles,” IEEE Trans. Ultrason. Ferroelect. Freq. Contr.,2005, June,Vol.52(6),pp.1048-54.
[5] L. Masotti, E. Biagi, L. Breschi, and E. Vannacci, ”Study and characterization of subharmonic
emissions by using shaped ultrasonic driving pulse,” presented at 28th International Symposium
Acoustical Imaging, San Diego, California, March 20-23, 2005. [6] , E. Biagi, L. Breschi,E. Vannacci,L. Masotti ”Subharmonic emissions from microbubbles: Effect of driving pulse shape”, IEEE
Corr Ultrason. Ferroelect. Freq. Contr.,to be published.
ULTRASONIC SPECTRAL IMAGING FOR BIOLOGICAL TISSUES:
MULTIRESOLUTION ANALYSIS BY MEANS OF WAVELET PACKETS
L. Masotti, E. Biagi, S. Granchi, E. Magrini, A. Luddi, F. Ceccarelli, A. Cerchiara, D. Bini
In biological tissue, the interaction between ultrasound and microstructure organizations determines linear and nonlinear effects that generate particular power spectral distribution of the
ultrasonic backpropagated signal. Therefore, spectral analysis seems to be helpful for differentiating biological media. Since the 70’s, several research groups worked on spectral analysis of tissue,
and concentrated their efforts on the extraction of parameters specifically correlated to tissue characteristics. The considered parameters were often high in number and their combination was not
easy to manage for hardware implementation, of real-time processing. We oriented our research in
the direction of producing spectral images through the Wavelet Transform and in particular the
Discrete Wavelet Packets (DWPT). The realization of such algorithm, named RULES ( Radiofrequency Ultrasonic Local EStimators), allowed to associate a set of parameters, called Configuration,
to homogeneous areas of the tissue and the visualization processed images allowed us to highlight
the various properties of tissue as a function of frequency. Experimentation is being performing
on three kinds of biological tissue: prostate, breast, carotid plaques. Considerable results were obtained from in-vitro experimentation on prostatic Gland and in-vivo experimentation on this organ
is carrying on in order to guide the biopsy sampling on the gland. Up to now 194 cases ( 126 benign
hypertrophy nodules and 64 cancers) were processed with encouraging results. An other important
experimentation was performed on breast tissue to detect cancer areas. Two hundred and forty
three women were enrolled in the experimentation, and 143 patients were affected by benign nodules and 100 by cancers. By data processing high sensitivity and specificity values were obtained.
All processed data were compared with histological findings. Thanks to the implementation of the
processing procedure in the FEMMINA platform we can reach high final image production rate and
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thanks to the flexible user interface it is possible to set the various parameters in a fast and easy
way, providing the capability to manage a lot of simultaneous information about the investigated
tissue.
[1] E. Biagi, L. Breschi, S. Granchi and L. Masotti, ”Method and device for spectral analysis of
an echographic signal,” Italian Patent FI2002A34, date of filling: Feb. 27, 2002, European Patent
03425118.1, date of filling: Feb.25, 2003, U.S. Patent 10/383674, date of filing: Feb. 25, 2003. [2]
L.Masotti, E. Biagi, A. Acquafresca, L. Breschi, F. DI Lorenzo, S. Granchi, R.Facchini, E. Magrini,
F. Rindi, M. Scabia, G. Torricelli, ”Real time images of local ultrasonic spectral parameters for
tissue differentation through Wavelet Transform,” in Proc. of the 27th International Symposium
Acoustical Imaging, Saarbrcken, Germany, March 24-27, 2003. In press. [3] L. Masotti, E. Biagi, L.
Breschi, S. Granchi, F. Di Lorenzo, and E. Magrini, ”Tissue differentiation based on radiofrequency
echographic signal local spectral content (RULES: Radiofrequency Ultrasonic Local Estimator),”
in Proc. IEEE Ultrason. Symp., 2003, pp.1030-1033. [4] E. Biagi, L. Breschi, S. Granchi and L.
Masotti, ”Metodo e dispositivo perfezionati per l’analisi spettrale locale di un segnale ecografico,”
Italian Patent FI2003A000254, date of filing: Oct. 8, 2003. [5] A. Bertaccini , A. Franceschelli
, S. Granchi , L. Breschi , E. Biagi , F. Di Loro , R. Ponchietti , G. Nesi , A. D’Errico, L.
Masotti and G. Martorana ,” Novel ultrasonic ”markers” for tumor detection in prostate ” 1st
International Meeting of the European Society of Urological Imaging (ESUI): THE IMAGING OF
THE PROSTATE AND OF THE PENIS, October 2003, Trieste. [6] Bertaccini A., Franceschelli
A., Granchi S., Breschi L., Biagi E., Di Loro F. , Ponchietti R. , Nesi G., D’Errico A., Masotti
L. , Martorana G., ”Nuovi ”markers” ultrasonici per la diagnosi del tumore della prostata ”Arch
Ital Urol Androl. 2003 Sep; 75(3 suppl 2): Atti del XIII Congresso Societ Italiana di Urologia
Oncologica, Novembre 2003, Ancona [7] Bertaccini, A. Franceschelli, S. Granchi, L. Breschi, E.
Biagi, F. Di Loro, R. Ponchietti, G. Nesi, A. D’Errico, L. Masotti, and G. Martorana, ”Nuovi
”markers” ultrasonici per la diagnosi del tumore alla prostata,” in Archivio italiano di urologia e
andrologia: XIII Congresso Nazionale Societ Italiana Urologia Oncologica, vol. 75, no. 3, suppl.
2, Sept. 2003, pp.48-49. [8] Bruno G, Bertaccini A, Granchi S, Breschi L , Biagi E, Di Loro P,
Ponchietti R, Masotti L and Martorana G. ” Tipizzazione ecografica del tessuto prostatico mediante
analisi spettrale: sperimentazione ”in vitro” nel tumore della prostata” Atti del 76 Congresso
Nazionale SIU, Giugno 2003, FIRENZE [9] E. Biagi, L. Breschi, S. Granchi, and L. Masotti,
”RULES, radiofrequency ultrasonic local estimator for tissue differentiation,” presented at The 9th
National Conference on Sensors and Microsystems (AISEM), Ferrara, Italy, Feb. 8- 11, 2004. [10]
L. Masotti, E. Biagi, S. Granchi, L. Breschi, E. Magrini and F. Di Lorenzo, ”Clinical test of RULES
(RULES: Radiofrequency Ultrasonic Local EstimatorS) ,” in Proc. of 2004 IEEE International
Ultrasonics Symposium, to be published. [11] A. Acquafresca, E. Biagi, L. Breschi, F. Di Lorenzo,
S. Granchi, L. Masotti, and E. Magrini, ”Metodica di indagine per diagnostica ad ultrasuoni:
RULES (Radiofrequency Ultrasonic Local EStimators)” presented at Riunione annuale del Gruppo
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Elettronica, Courmayer (Ao), Italy, June 2004 [12] E. Biagi, L. Breschi, S. Granchi, and L. Masotti,
”RULES, radiofrequency ultrasonic local estimator for tissue differentiation,” presented at The 9th
National Conference on Sensors and Microsystems (AISEM), Ferrara, Italy, Feb. 8-11, 2004. [13]
Roberto Ponchietti, Giuseppe Martorana, Filippo Di Loro, Alessandro Bertaccini, Gabriella Nesi,
Walter Franco Grigioni, Simona Granchi, Luca Breschi, Elena Biagi, Leonardo Masotti, ”A novel
spectral ultrasonic differentiation method for marking regions of interest in biological tissue: in vitro
results for prostate”, Archivio Italiano di Urologia e Andrologia 2004; vol.76, 4. [14] L. Masotti, E.
Biagi S. Granchi F. Ceccarelli, A. Luddi, E. Magrini and F. Di Lorenzo, ”Clinical test of RULES
(RULES: Radiofrequency Ultrasonic Local EStimator),” presented at 10th annual conference of the
AISEM, Firenze, Italy, Feb. 15-17, 2005. [15] L. Masotti, ”Biological tissue differentiation based on
ultrasonic radio frequency echo signal,” presented at 10th annual conference of the AISEM, Firenze,
Italy, Feb. 15-17, 2005 [16] L. Masotti, E. Biagi, S. Granchi, D. Bini, F. Ceccarelli, A. Luddi, and
E. Magrini, ”Clinical experimentation of FEMMINA and RULES for prostate and breast tumor
detection,” presented at 28th International Symposium Acoustical Imaging, San Diego, California,
March 20-23, 2005.
HARDWARE AND SOFTWARE ECHOGRAPHIC PLATFORM FOR REAL TIME
PROCESSING OF THE RADIOFREQUENCY SIGNAL
L. Masotti, E. Biagi, A. Acquafresca, L. Breschi, M. Calzolai, F. Di Lorenzo,P. Gambacciani
A. Giombetti, S. Granchi, M. Scabia, G. Torricelli, B. Zanotto
FEMMINA, Fast Echographic Multi-parameters Multi-Image Novel Apparatus, is a hardwaresoftware platform dedicated to real-time signal and image processing, able to acquire sequences
of radio frequency echographic frames. The platform integrates a hardware section for real time
processing with a Personal Computer (PC) architecture. A strong hardware and software integration make it possible to estimate different ultrasonic parameters in a single processing step
(Multi-parameters) The system architecture is modular, expandable and has been designed for being used with manifold and new ultrasonic investigation techniques. It is fully programmable and,
for the various applications, it can be reconfigured on-line, depending on ultrasonic parameters
to be evaluated each time. Modularity and expandability, concerning both the hardware and the
software section, make it possible to replace or add further digital boards dedicated to real time
processing, or further software modules aimed to different investigation techniques. These two features, together with platform programmability, allow extremely easy implementation and testing of
new signal processing algorithms. This new and powerful echographic equipment was employed for
preliminary clinical experimentation and encouraging and strong innovative results were produced.
At the moment, the research is oriented to produce local power spectrum images of biological tissue
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to be related with the medium internal organization to improve clinical diagnosis. In particular,
a FEMMINA hardware module, capable to perform Wavelet analysis of echographic frames, has
been implemented. In addition, a board able to connect the system to commercial echographs has
been developed, based on the adoption of an optical link for data communication.
[1] A. Acquafresca, E. Biagi, R. Facchini, H. Fonfara, C. Guenther, M. H. Hoss, R. M. Lemor,
L. Masotti, S. Mazzanti, A. Ricci, M. Scabia, P. K. Weber, and H. J. Welsch, ”A new combined
open research platform for ultrasound radio frequency signal processing,” in Proc. of 2003 IEEE
International Ultrasonics Symposium, pp.33-37 [2] E. Biagi, L. Masotti and M. Scabia, ”RF data
acquisition systems”, Workshop in SPIE’s International Symposium, Medical Imaging 2004 Febr.04.
[3] L. Masotti, E. Biagi, S. Granchi, D. Bini, F. Ceccarelli, A. Luddi, and E. Magrini, ”Clinical
experimentation of FEMMINA and RULES for prostate and breast tumor detection,” presented
at 28th International Symposium Acoustical Imaging, San Diego, California, March 20-23, 2005
bib4 L. Masotti, E. Biagi, M. Scabia, A.Acquafresca, R.Facchini, A.Ricci,D.Bini,”Femmina realtime Radio-Frequency echo signal equipment for testing novel investigation methods” accepted for
publication in Trans. IEEE Ultrason. Ferroelect. Freq. Contr.
ICARUS: IMAGING PULSE COMPRESSION ALGORITHM THROUGH
REMAPPING OF ULTRASOUND
E. Biagi, L. Masotti, M. Scabia, L.Pampaloni
In the past years several mutual influences took place between acoustical and radar fields of
study in the last decades: this is mainly due to the great similarities that exist between them,
despite the different kind of waves involved. Such influences are, for example, the change of variables
present in the so-called ”?-k migration” algorithm for focusing Synthetic Aperture Radar images
that has been derived from geophysics or the use of phased array probes in ultrasound imaging
systems that has followed the development of such arrays in radar applications. Moreover, many
techniques have been proposed which use Synthetic Aperture approach for focusing ultrasound
images; and, analogously to radar application, the use of coded signals and pulse compression has
been studied also in ultrasound imaging. In this research we tackle the problem of applying to
echographic imaging those Synthetic Aperture Focusing Techniques (SAFT) commonly used in the
field of Synthetic Aperture Radars (SAR). The aim is to improve echographic image resolution by
using chirp transmit signals, and by performing pulse compression in both dimensions (depth and
lateral).
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[1] E. Biagi, L. Masotti, M. Scabia, I. Rossi and N. Dreoni, ”ICARUS. Metodo di focalizzazione
di un’immagine ecografica e relativo sistema ecografico”. Italian Patent n FI2002A000228. [2] E.
Biagi, L. Masotti, M. Scabia, I. Rossi, and N. Dreoni, ”Ultrasound image focusing method and
relative ultrasound system,” Italian Patent n FI2002A000228, U.S. Patent, Application Number
10/718333, date of filing: Nov. 20, 2003. [3] E. Biagi, L. Masotti, I. Rossi, M. Scabia, ”Synthetic
Aperture Technique For Echographic Focusing Based On Pulse Compression”, IEEE Ultrasonic
Symposium Proc., Sept. 2004, Pages 1425-1428.
ULTRASONIC VECTOR DOPPLER
E. Biagi, L. Masotti, M. Scabia, G Torricelli, A. Pastorelli
The limitation of traditional Doppler techniques lies in the fact that they are capable to measure only the velocity component parallel to the ultrasonic beam axis. Vector Doppler overcomes
this limitation by performing several one dimensional Doppler measurements along independent
directions, thus reconstructing the velocity vector entirely.
MICROWAVE SYSTEM ANALYSIS BY MEANS OF ACCURATE SUBSYSISTEM
BEHAVIOURAL MODELING
A. Cidronali, I. Magrini, R. Fagotti, C. Accillaro, G. Loglio, G. Manes
An efficient and reliable transmitter design for broadband wireless access, spatial and defense
specific applications, and in prospective for the so-called ultra-wideband radio technology, involves
many trades to meet overall system requirements. These come from the adopted digital modulation
schemes, power levels and from the regulatory requirements. The objective is to develop the knowledge on the above topics, an understanding of their impact on the optimum design of the power and
amplifier, to provide tools for an efficient system level simulation Methods - System-level analysis
techniques like, e.g. the Volterra series analysis and the method of the envelope simulation, are investigated. In particular, the complex-baseband formulation is adopted to take account for memory
effects in the transmitter architecture. In such a way the nonlinear effects in microwave building
blocks composing a transmitter can be characterized and then used in macro-simulation, in conjunction with behavioural models. Complex Envelope Driven Behavioural Models represents an even
higher level of abstraction and pose new difficulties in evaluating and comparing behavioural models
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(especially the ones required to show memory effects, and for which a theoretical framework is still
lacking). Such an activity integrates researchers from the EDA simulation areas, electron device
modelling, system level designers but also metrology specialists. And, it is believed to contribute
to establish good-practice rules on behavioural model development, and, therefore, on improving
the quality and benefits of the available nonlinear RF EDA tools. The system-level simulation
strategy is based on two main paths, the first is the so-called ’in house’ simulation techniques based
on visual language programming tools for the technical computing (M atlab − Simulink), while
the second considers a commercial EDA (Agilent-ADS) to define a complete end-to-end system for
the co-simulation of mixed signal sub-systems. Several innovative techniques are being considered
at the ’in house’ level, the most relevant are the multi-envelope multi-carrier and the embedding
of the PA in a complete non-ideal system also comprising the channel characterization. Reverse
Modeling - The two simulation environments are viable vehicles for the assessment of system sensitivities to impairments and the sub-systems models’ key parameters, moreover they allows the
definition of ad-hoc scenario (namely the IEEE 802.11a WLAN transmitter) for the progressive
growth of subsystem behavioural models and PA specifications. The most significant effects to be
investigated are: the AM − P M distortion, the spectral re-growth in multicarrier system, the IMP
generation, the ACPR, the error vector magnitude and thermal issues. All in the case of multitone
and statistical spectrum analysis. Additionally are considered, the degradation of the signal single
sideband noise-to-carrier ratio due to the added noise of the amplifier as well as the introduction
of phase noise that is of dramatic importance for multi-phase modulation schemes, in particular
for the WLAN technology. The focus of the joint research program of activities is on the effects
of the PA in the information processing and the transmitting flow for the above applications. The
approach considers the PA embedded in a complete non-ideal system, i.e. a system where analog and digital sub-systems interact, introducing their corrupting effects during the transmission
process. This allows system designers to study tradeoffs between analog and digital subsystems,
distributing properly specifications and constraints avoiding severe and conservative specifications
for the PA. This opens the door to efficient simulation techniques of mixed-signal architectures
with detailed behavioral models for the different building blocks. Building blocks modeling - The
accuracy and efficiency of system-level analyses are conditioned by the availability of accurate and
numerically efficient models for the system/circuit components. The models available for the description of non-linear dynamic circuits (e.g., amplifiers, mixers, oscillators, etc.) are usually not
sufficiently accurate in dealing with non-linear memory effects. In the case of VCO circuits, most
of behavioral models describe the non-linear static frequency/voltage characteristic but usually
considering a linear dynamic. A new class of behavioral model for nonlinear circuits based on a
black-box modelling approach is required for frequency synthesisers. A research activity in the
field of system-analysis-oriented modelling consists in applying a Non-linear Discrete Convolution
approach to develop a time- domain oriented behavioural model. In the case of mixer and frequency
converter a frequency-domain description of the linerarised behaviour is required to describe the
system linearity and the intermodulation generation. Is investigated a technique able to describe
the conversion matrix and the higher order intermodulation referred to multitone stimuli, starting
by large-signal vectorial data. The recent issued multiband transmitter architectures are composed
of a reference PLL that creates the frequency reference necessary to create the reference sequence,
a QPSK modulator that generates the b-b signal that controls the transmitter driver to lunch the
modulated signal at the antenna. In terms of PLL characteristic are required frequency agility
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from 3.35GHz to 10.35GHz step 250MHz and phase noise in the range of -130dBc/Hz at 3MHz.
The QPSK modulator is generally based on wideband double balanced mixer with linearity figures
around 25dBm. [1] A. Cidronali , C. Accillaro, M. Myslinski, D. Schreurs, G. Manes, ”A StateSpace Modeling Approach for Dynamic Nonlinear Microwave System Based on Large Signal Time
Domain Measurements”, International Microwave Symposium, Long Beach, (CA), USA, June 1217, 2005 [2] A. Cidronali G. Loglio J. Jargon, G. Manes ”A behavioral model for reducing the
complexity of mixer analysis and design A generalized definition of Power Gain Taking Harmonic
Content into Account”, accepted for publication on International Journal of RF and Microwave
Computer-Aided [3] A. Cidronali, C. Accillaro, M. Camprini, G. Loglio, I. Magrini, M. Usai, G.
Manes, ” Modelli comportamentali di sottosistemi non lineari a microonde identificati mediante
caratterizzazione a grandi segnali nel dominio del tempo”, Elem05, Orvieto 12-16 Aprile 2005
MICROWAVE DEVICE AND CIRCUITS CHARACTERIZATION BY USING
VECTORIAL LARGE-SIGNAL MEASUREMENTS
A. Cidronali, I. Magrini, C. Accillaro, G. Loglio, G. Manes
Nonlinear vector network analyzers (NVNA) were recently introduced to significantly improve
nonlinear microwave measurements. NVNA can accurately measure the amplitude and phase of a
limited number of spectral components of both the complex incident and scattered voltage wave
variables. Consequently, a number of research activities have grown out in recent years, including calibration issues, optimization of measurement set-ups and instrumentation, improvement of
measurement procedures, the introduction of new and extended signal and measurement concepts
(e.g., large-signal S-parameters), and the determination and measurement of figures of merit. A
second dynamic area includes the direct extraction of measurement-based equivalent-circuit and
behavioral modeling for devices and circuits, both in the frequency and time domain. In this area
the methods span from a brute force approach based on optimization parameters of equivalent
circuit models on the measured nonlinear dynamics to the introduction of appropriate nonlinear
state-space functions. Another research topic is design methods. Here the focus is on new circuits and systems design and analysis methods triggered towards the correct implementation of
the non-linear application-specific behavioral models. Specifically the description and simulation
techniques are considered in a more ’integral’ approach towards a behavioural description of the
circuits and systems as opposed to a strictly ’analytic’ or even physics-based descriptions used
in device modelling and circuit design. This approach leads to the development of appropriate
analysis methods that can convert the guidelines on non-linear circuit design into a precise design
methodology. In particular this will lead to the introduction of new methods to incorporate more
non-linear information at the system analysis level as well as new methods to incorporate in to
analysis and measurement-based frequency- and time-domain non-linear behavioral models of device and circuits. The purpose of this research is to extract a behavioral description of a microwave
FIRENZE
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device, based on large-signal vectorial measurements and its application to the design of mixer.
Specifically, we extend a conventional linear design method to a nonlinear circuit in the hopes of
achieving an optimum design, and in turn a more efficient system. The approach allows us to reduce the requirement of complex nonlinear device models and large-signal analysis by determining
the conversion matrix. The results of effectively describe how to apply such a matrix to mixer
design. In the field of the microwave devices and circuits modeling the research activity deals with
the identification of equivalent circuit models for strongly nonlinear devices by taking advantage
of the Vectorial Large-Signal Measurements. Among the various solutions available in literature,
behavioral modeling and compact modeling are the most developed approaches due to their characteristics of effectiveness and easiness of implementation in a conventional CAD environment. In
a behavioral model the description is generally provided in terms of state functions, which are commonly determined processing small-signal and DC measurements. Recently new techniques based
on vectorial large-signal measurements have been proposed to identify and validate such class of
models. These models, in order to provide a meaningful interpolative capability, must be identified
in a broad range of possible device functional states and usually their predictive capability is matter
of concerns. Compact model approaches are based on the definition of an equivalent circuit. They
represent a valid solution when the device physics is sufficiently simple or sufficiently understood to
allow its translation in terms of controlled charge and current sources. In this case the identification process does not follow an established protocol, anyway, once the compact model parameters
are successfully extracted, the model validity range can be extended to a wide range of functional
states. This research is aimed to demonstrate how the additional information deriving from VLS
measurements can be used in the field of equivalent circuit model identification for strongly nonlinear devices. A device able to exhibit a very peculiar characteristic, the Resonant Interband
Tunneling Diode, has been chosen as a case of study. The identification procedure is presented
along with several experimental results in order to provide the potentialities of the technique. In
particular, the comparison between simulated and measured data for different power levels and
frequencies from the set adopted during the identification confirms the extrapolation capability of
the approach.
[1] J. Jargon, K.C. Gupta, A. Cidronali, D. DeGroot, ”A generalized definition of Power Gain
Taking Harmonic Content into Account”, International Journal of RF and Microwave ComputerAided Engineering, Vol. 13 April 2003, pp.357-369. [2] A Cidronali, ”A system level approach to
the design of mixers based on vectorial nonlinear network analysis” workshop at the 2004 IEEE
International Microwave Sym., Fort Worth, Texas, USA 2th-5th June, 2004 [3] A. Cidronali, G.
Loglio, I. Magrini, J. Jargon, K.A. Remley, I. Magrini, D.DeGroot, D. Schreurs, K.C. Gupta, G.
Manes, ”RF and IF mixer optimum matching impedances extracted by large-signal vectorial measurements” European Gallium Arsenide and related III-V Compunds Application Symposium GaAs
2003, Munich, 6-10 October 2003, pp. 61-64. [4] A. Cidronali, K. C. Gupta, J. A. Jargon, D. C.
DeGroot, G. Manes, ’A. Extraction of Conversion Matrices for P-HEMTs based on Vectorial Large
Signal Measurements” IEEE International Microwave Sym., Philadephia, USA 3rd-8thJune,2003.
[5 ] M. Camprini, A. Cidronali, C. Accillaro, I. Magrini, G. Loglio, G. Collodi, J. Jargon, G.
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FIRENZE
Manes: ”Identification of a Strongly Nonlinear Device Compact Model based on Vectorial Large
Signal Measurements”, European Microwave Week 2004 Symposium Proceedings Page(s) 239-242,
October 2004. [6] C. Accillaro, A. Cidronali, F. Zani, G. Loglio, M. Usai, G. Collodi, M. Camprini,
I. Magrini, G. Manes: ”Thermal Memory Effects on the Linearity of a GaAs PHEMT”, European
Microwave Week 2004 Symposium Proceedings Page(s) 115-118, October 2004. [7] G. Loglio, A.
Cidronali, C. Accillaro, M. Usai, I. Magrini, M. Camprini, G. Collodi, G. Manes: ”On the Experimental Calculation of the Conversion Matrix for Sub-harmonic Mixer”, European Microwave Week
2004 Symposium Proceedings Page(s) 131-134, October 2004
HIGH-SPEED DIGITAL SIGNAL PROCESSING
P. Tortoli, F. Guidi, S.Ricci, E. Boni, L.Bassi, A.Dallai, P.Fidanzati, G.Bambi, T.Morganti
The Microelectronic Systems Design (MSD) laboratory at the University of Florence is traditionally involved in the design and implementation of high-speed digital signal processing (DSP) architectures. For this activity, the MSD lab takes part in a group of European laboratories selected by
Texas Instruments for the development of DSP-based leading research activities (”Elite” Program).
Major efforts have been dedicated to the development of innovative ultrasound (US) -based electronic systems for the diagnosis of cardiovascular diseases. In particular, a programmable real-time
DSP system has been implemented and demonstrated capable of contributing to vector Doppler and
arterial mechanics studies through the simultaneous use of two independent US transmit-receive
(TX-RX) units. Significant research contributions have also been brought in the fields of hemodynamics, micro-emboli detection and non-invasive measurement of hematocrit. Within the frame of
the UMEDS project, funded by the EU, and in collaboration with Bracco Research, Geneve, an
original experimental set-up has allowed to discover new properties of US contrast agents, which
can help to correctly interpret the results of clinical investigations based on their use. The MSD
lab currently coordinates a Research Project of National Interest (PRIN), funded in 2005 on the
topic ”Development of a Novel Dual-Beam Ultrasound Technique for Comprehensive Vascular Investigation”. Scientific collaborations with Yale University, University of Leicester, University of
Rotterdam, Geneve, Polish Academy of Science, Universit Claude Bernard Lyon 1, Universit di
Pisa, have led to the joint publication of many of the papers listed below.
[1] P.Palanchon, P.Tortoli, A.Bouakaz, N. deJong, ”Optical Observations of Acoustical Radiation
Force Effects on Individual Air Bubbles”, IEEE Trans. Ultrason., Ferroelect., Freq. Contr. , vol.52,
n.1, pp.104-110, 2005. [2] R. Krams, G. Bambi, F. Guidi, F. Helderman, A.F.W. van der Steen
and P.Tortoli, ”Effect of Vessel Curvature on Doppler Derived Velocity Profiles and Fluid Flow”,
Ultrasound in Medicine and Biology, Vol. 31, No. 5, pp. 663-671, 2005. [3] Morganti T, Ricci S,
Vittone F, Palombo C, Tortoli P., ”Clinical Validation of Common Carotid Artery Wall Distension
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139
Assessment Based on Multigate Doppler Processing”, Ultrasound in Medicine and Biology, Vol. 31,
No. 7, pp. 937-945, 2005. [4] P.Tortoli, M. Corsi, E. Boni, M. Arditi, P. Frinking, ”Different Effects
of Microbubble Destruction and Translation in Doppler Measurements”, IEEE Trans. Ultrason.,
Ferroelect., Freq. Contr. vol. 52, no. 7, pp.1183-1188, 2005. [5] P. Fidanzati, T. Morganti, P.
Tortoli (2005). Real time software processing and audio reproduction of directional Doppler signals,
Ultrasound in Medicine and Biology, Vol. 31, No. 12, pp. 1735-1741, 2005. [6] W.Secomski, A.
Nowicki, F. Guidi, P. Tortoli and P.A. Lewin, Non-invasive measurement of blood hematocrit in
artery, Bulletin of Polish Academy of Sciences, Technical Sciences, Vol 53, No. 3, 2005, pp 245-250.
[7] S. Ricci, E. Boni, F. Guidi, T. Morganti and P. Tortoli, A Programmable Real-Time System
for Development and Test of New Ultrasound Investigation Methods, accepted for publication in
IEEE Trans. Ultrason., Ferroelect., Freq. Contr. [8] L. Fan, E. Boni, P. Tortoli and D.H. Evans,
Multi-Gate Transcranial Doppler Ultrasound System with Real-Time Embolic Signal Identification
and Archival, accepted for publication in IEEE Trans. Ultrason., Ferroelect., Freq. Contr. [9]
S. Balocco, O. Basset, G.Courbebaisse, P. Delachartre, P. Tortoli, C. Cachard, 3D dynamical
ultrasonic model of pulsating wall vessels, accepted for publication in Ultrasonics International,
2006. [10] P. Tortoli, G. Bambi, S. Ricci, Accurate Doppler Angle Estimation for Vector Flow
Measurements, accepted for publication in IEEE Trans. Ultrason., Ferroelect., Freq. Contr. [11]
G. Urban, S. Ricci, F. Guidi, G. Bambi, P. Tortoli and M. J. Paidas, Real-time human fetal aorta
velocity profile using global acquisition and signal processing (GASP), accepted for publication in
Ultrasound Obstet Gynecol. [12] G. Bambi, P.Fidanzati, T. Morganti, S. Ricci and P. Tortoli,
Real-Time Digital Processing of Doppler Ultrasound Signal , invited paper, Proceedings of the
Int. Conf on Acoustics Speech and Signal processing (ICASSP 05), pp.V/977-980, 2005. [13] F.
Guidi, H.J. Vos, F. Nicchi, E. Boni and P. Tortoli, Acoustical Imaging of Individual Microbubbles,
accepted for publication in Acoustical Imaging, vol.28, Michael Andre Ed. [14 ] H.J. Vos, F.
Guidi, E. Boni and P. Tortoli, Acoustical investigation of freely moving single microbubbles, 2005
IEEE Ultrasonics Symposium Proceed., pp.755-758, Rotterdam, 19-22 September 2005. [15 ] P.
Tortoli, G. Bambi, S. Ricci, A novel dual beam approach for removing Doppler angle ambiguity,
2005 IEEE Ultrasonics Symposium Proceed., pp.150-153, Rotterdam, 19-22 September 2005. [16]
W. Secomski, A. Nowicki, R. Olszewski, J. Adamus, P. Fidanzati, P. Tortoli, Doppler Multigate
Measurements of Ultrasonic Scattering, Attenuation and Hematocrit of Blood in the Human Artery,
2005 IEEE Ultrasonics Symposium Proceed., pp.154-157, Rotterdam, 19-22 September 2005. [17]
J. Smigrodzki, K. KaluSy?ski, G.Bambi, S.Ricci, P.Tortoli, Simulated Microemboli Detection Using
Doppler Profiler PW2000, CDROM of Proceed. of the The 3rd European Medical and Biological
Engineering Conference (EMBEC’05), November 20 - 25, 2005, Prague, Czech Republic. [18]
W. Secomski, A. Nowicki and P. Tortoli, Ultrasonic Doppler Measurement of the Attenuation,
Scattering and Blood Hematocrit in the Human Artery, Proceed of the Advanced Course and
Workshop on Blood Flow (BF 2005) - (pp.427-437) - Warsaw, 2005. [19 ] P. Fidanzati, T. Morganti,
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FIRENZE
L. Bassi and Piero Tortoli, Experimental Blood Flow Investigations in Large Human Arteries,
Proceed of the Advanced Course and Workshop on Blood Flow BF 2005 - (pp.299-307) - Warsaw,
2005.
CONTINUOUS WAVE SYNTHETIC APERTURE RADAR FOR CIVIL
APPLICATIONS: LANDSLIDE MONITORING, ARCHITECTURAL
STRUCTURES TESTING, GROUND AND MASONRY PENETRATION
C.Atzeni, M. Pieraccini, G.Luzi, M.Fratini, D. Mecatti, L. Noferini, G. Macaluso, F. Parrini.
This research activity is concerned with the application of novel continuous -wave step-frequency
synthetic aperture radar techniques to a number of civil applications.
1) Remote monitoring of land movements (landslide, subsidence, volcanoes..). Ground based
SAR interferometry is a spin-off recently derived from space technology. SAR technique has been
widely used in Earth remote sensing from space-borne radars , providing high resolution images in
spite of the high satellite altitude and of the small antenna size. Every picture element (pixel) of
the radar image contains information on the phase of the reflected signal. If a part of the irradiated
scenario undergoes a displacement, the map of displacements can be retrieved by comparing two
images acquired at different times. By comparing the phase of subsequent observations it is possible
to detect small surface displacement (due for example to an earthquake or to a landslip), or continuous motion relatively slow (as for a glacier). Ground-based interferometric Synthetic Aperture
Radars, entirely developed by the research unit, have been tested in the last year with impressive
results in a number of sites: East side of Rosa Mount, Tessina (Belluno), Perarolo (Belluno), Citrin
(Aosta Valley). All these landslides endanger built areas, so their monitoring has a great impact
on people safety.
2) Dynamical testing of large architectural structures (dams, bridges , towers,..) . Monitoring
of vibrations and transient displacements of civil engineering constructions, such as buildings,
bridges and towers, is of paramount importance for early identification of structural problems and
to enable remedial actions to be taken. Dynamical monitoring is currently implemented by contact
sensors. In a number of situations, however, placing of contact sensors may be difficult, costly
or not possible. In such cases, a radar technique able to scan the structure from a safe distance
can be the ideal solution. The unit has designed and realized an interferometric Ku-band radar
based on Direct Digital Synthesis (DDS) , able to acquire radar images at a repetition rate up to
50 Hz, thus allowing the natural or forced vibrations of civil engineering structures to be followed.
The radar dynamical imaging capability has been demonstrated by monitoring the vibrations of
a 200 meters-length steel bridge (Ponte all’Indiano, Firenze) and a highway viaduct in Cadore,
Belluno, forced by vehicular traffic. The system was able to detect both the transient movements
and the modal shapes of the bridge, providing impressive movies of the structures oscillations under
different vehicular loads. The same radar, installed at 200 metres distance from the Giotto’s tower
of the Florence cathedral , was able to detect the vibrations of the tower caused by its own bells
FIRENZE
141
ringing with 0.1 mm accuracy, and to measure the resonance frequency of the Tower of the Palazzo
della Signoria in Florence.
3) Ground and masonry penetrating radar. Current penetrating radar systems, mainly developed for underground inspection, operate with bandwidth smaller than about 1 GHz. Their
resolution is therefore correspondingly low, and it results generally not adequate for intrawall inspection required in civil engineering and historical buildings survey. The unit has developed
very large bandwidth (up to 6 GHz) penetrating radar based on a novel technique referred to as
continuous-wave step-frequency( CW SF ). The major application was the inspection of the internal
structure of walls. This instrument has been employed on the walls of the Salone dei Cinquecento
in Palazzo Vecchio in Florence in order to discover intrawall cavities that could still contain the
remains of the famous fresco by Leonardo Da Vinci ’La battaglia di Anghiari’.
These researches have been sponsored by Ministry of Research (PRIN 2002 and 2003), by
European Community (GALAHAD Project: Specific Targeted Research Proposal of EU Sixth
Framework Programme), and by a number of specific contracts with companies. Industrial partners
of this research activity are CESI - ISMES of Bergamo, and IDS SpA of Pisa.
[1] NOFERINI L., PIERACCINI M., MECATTI D., LUZI G., ATZENI C. (2005). Permanent scatterers analysis for atmospheric correction in Ground Based SAR Interferometry. IEEE TRANSACTIONS ON GEOSCIENCE AND REMOTE SENSING. in press. [2] G. LUZI, PIERACCINI
M., D. MECATTI, L. NOFERINI, G. GUIDI, F. MOIA, C. ATZENI (2004). Ground-Based Radar
Interferometry for Landslides Monitoring: Atmospheric and Instrumental Decorrelation Sources
on Experimental Data. IEEE TRANSACTIONS ON GEOSCIENCE AND REMOTE SENSING.
vol. 42 pp. 2454-2466 [3] PIERACCINI M., CASAGLI N., LUZI G., TARCHI D., MECATTI D.,
NOFERINI L., ATZENI C. (2003). Landslide monitoring by ground-based radar interferometry: a
field test in Valdarno (Italy). INTERNATIONAL JOURNAL OF REMOTE SENSING. vol. 24 pp.
1385-1391 [4] TARCHI D., CASAGLI N., FANTI R., LEVA D., LUZI G., PASUTO A., PIERACCINI M., SILVANO S. (2003). Landslide monitoring by using ground-based SAR interferometry:
an example of application to the Tessina landslide in Italy. ENGINEERING GEOLOGY. vol. 68
pp. 15 - 30 ISSN: 0013-7952 [5] PIERACCINI M., LUZI G., ATZENI C. (2001). Terrain mapping and monitoring by ground-based interferometric radar techniques. IEEE TRANSACTIONS
ON GEOSCIENCE AND REMOTE SENSING. vol. 10 pp. 2176-2181 [6] PIERACCINI M., D.
MECATTI, G. LUZI, M. SERACINI, G. PINELLI AND C. ATZENI (2005). Non-contact intrawall penetrating radar for Heritage survey: the search of the ”Battle of Anghiari” by Leonardo
da Vinci. NDT and E INTERNATIONAL. vol. 38 pp. 151-157 ISSN: 0963-8695 [7] PIERACCINI M., M. FRATINI, F. PARRINI, G. PINELLI, AND C. ATZENI (2005). Dynamic Survey
of Architectural Heritage by High-Speed Microwave Interferometry. IEEE GEOSCIENCE AND
REMOTE SENSING LETTERS. vol. 2 pp. 28-30 [8] PIERACCINI M. (2005). Discontinuity
in masonry. In GONGKANG FU Inspection and Monitoring Techniques for Bridges and Civil
Structures, in press. (UNITED KINGDOM). [9] PIERACCINI M., G. LUZI, D. MECATTI, M.
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FRATINI, L. NOFERINI, L. CARISSIMI, G. FRANCHIONI, C. ATZENI (2004). Remote sensing of building structural displacements using a microwave interferometer with imaging capability.
NDT and E INTERNATIONAL. vol. 37 pp. 545-550 [10] PIERACCINI M., LUZI G, NOFERINI
L, MECATTI D, ATZENI C (2004). Joint Time Frequency Analysis of Layered Masonry Structures using Penetrating Radar. IEEE TRANSACTIONS ON GEOSCIENCE AND REMOTE
SENSING. vol. 42 ISSN: 0196-2892 [11] PIERACCINI M. (2004). Monitoring of structures. In
G.BARTOLI, F.RICCIARDELLI, V.SEPE WINDERFUL Wind and INfrastructure: Dominating
Eolian Risk Utilities and Lifelines (pp. 187-196). FIRENZE: Firenze University Press (ITALY).
[12] PIERACCINI M., M. FRATINI, F. PARRINI, G. MACALUSO C. ATZENI (2004). Highspeed CW step-frequency coherent radar for dynamic monitoring of civil engineering structures.
ELECTRONICS LETTERS. vol. 40 pp. 907-908 [13] PIERACCINI M., LUZI G., MECATTI D.,
GUSELLA V., ATZENI C. (2003). Microwave Techniques for Measurement of Large Structure
Vibration. MICROWAVE AND OPTICAL TECHNOLOGY LETTERS. vol. 37 pp. 216-218 [14]
PIERACCINI M., LUZI G., MECATTI D., NOFERINI L., ATZENI C (2003). A microwave radar
technique for dynamic testing of large structures. IEEE TRANSACTIONS ON MICROWAVE
THEORY AND TECHNIQUES. vol. 51 pp. 1603-1609 ISSN: 0018-9480
GENOVA
143
GENOVA
Dipartimento di Ingegneria Biofisica ed Elettronica
Research topics
1) DIGITAL ENTERTAINMENT AND EDUCATION
F. Bellotti, R. Berta, A. De Gloria, E. Ferretti, M. Margarone, L. Primavera
Collaborations: TelecomItaliaLab, ORT, Giunti Multimedia, Tudor, CERTH, CIDA, DATASIEL,
Palazzo Ducale
Other sources of funding: EC - progetto ”Chi:Kho”, EC - progetto ”ELU”, DATASIEL
2) CAR MULTIMEDIA AND INFORMATION MANAGEMENT
F. Bellotti, A. De Gloria, R. Lauletta
Collaborations: Bosch, Centro Ricerche Fiat, Volvo, Jaguar, BAST, TNO, INRETS, FHG,
Cofiroute, TWT, TeleAtlas, NavTeq
Other sources of funding: EC - progetto ”EDEL”, EC - progetto ”Safespot”, EC - progetto ”AIDE”
3) HUMAN-COMPUTER INTERACTION AND UBIQUITOUS COMPUTING
F. Bellotti, R. Berta, A. De Gloria, E. Ferretti, R. Lauletta, M. Margarone, L. Primavera
Collaborations: TelecomItaliaLab, DATASIEL
Other sources of funding: EC - progetto ”Technolangue”, DATASIEL
4) SMART ADAPTIVE SYSTEMS ON SILICON
M. Gravati, M.Valle
Collaborations: ATMEL, ELSAG-Bailey, Università di Parigi Sud, Università dell’Aquila,
Dèpartement d’èlectricitè -Universitè Catholique de Louvain (Belgium), ST Microelectronics
Other sources of funding: Fondi di Ateneo, Programma Nazionale di Ricerca per la Microelettronica
e Bioelettronica (MURST), Tema 5: ”Sistemi neuronali nell’automazione di servizi e di impianti”,
MIVEX: Programma finanziato dalla legge 82/46 (MURST) 1998 - 2001, Laboratorio congiunto
ATMEL - DIBE
5) DESIGN OF INTEGRATED CIRCUITS FOR BIOELECTRONICS SYSTEMS
E. Bottino, M. Valle
Collaborations: ATMEL, Dèpartement d’èlectricitè - Universitè Catholique de Louvain (Belgium),
Accent Spa, Cofin MIUR 2003
Other sources of funding: Laboratorio congiunto ATMEL - DIBE
144
GENOVA
6) BEHAVIOURAL MODELS OF MIXED-MODE CIRCUITS
A. Dei, W. Prodanov, M. Valle
Collaborations: ATMEL, Dèpartement d’èlectricitè - Universitè Catholique de Louvain (Belgium),
Accent Spa, AMI Semiconductor
Other sources of funding: Laboratorio congiunto ATMEL - DIBE
7) SYSTEMS FOR MACHINE VISION
G. M. Bisio, S.P. Sabatini, F. Solari
Collaborations: Universita di Cagliari
Other sources of funding: UE - progetto ”Ecovision”
8) ELECTRONIC SYSTEMS FOR INTELLIGENT MULTIMEDIA PROCESSING
AND SOFT COMPUTING
D.Anguita, P.Gastaldo, S.Ridella, F.Rivieccio, R.Zunino
9) SMART ELECTRONIC SYSTEMS FOR NONLINEAR MODELLING AND DATA
ANALYSIS
D.Anguita, S.Ridella, D.Sterpi
Collaborations: Università di Trento, Universitá di Bologna, Università di Roma ”La Sapienza”,
NiSIS: EC-CA Nature-inspired Smart Information Systems
Other sources of funding: Ferrari Gestione Sportiva
10) DISTRIBUTED MEASUREMENT SYSTEMS
D. Anguita, A.Bagnasco, G.Parodi, A. Poggi, A.M.Scapolla
11) E-LEARNING FOR ELECTRONICS
A. Bagnasco, G. Donzellini, G. Parodi, D. Ponta, A.M. Scapolla
12) ALGORITHMS AND TOOLS FOR SYSTEM SPECIFICATION AND SYNTHESIS
F. Curatelli, L. Mangeruca, O. Mayora-Ibarra
Collaborations: PARADES, ITESM (MX)
Other sources of funding: Ateneo
13) MULTIMEDIA SYSTEMS FOR IMPAIRED USERS
F. Curatelli, C. Martinengo, O. Mayora-Ibarra
Collaborations: DIMA, ITESM (MX)
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145
14) AUTOMATIC REMOTE SURVEILLANCE OF ENVIRONMENT
C. Regazzoni, G.Parodi, M.Raggio, G. Bailo, A. Cabitto
Other sources of funding: Elsag
15) MICRO ARCHITECTURE MODELING FOR MEDIA PROCESSING AND EMBEDDED SYSTEM FOR MOBILE APPLICATION
G.Parodi, M.Raggio, I.Barbieri, M.Bariani, R. Stagnaro
Collaborations: ST Microelectronis
16) ARCHITECTURE MODELING OF HAND HELD SYSTEM FOR SPEECH APPLICATIONS
G.Parodi, M.Raggio,G.Ballarino,G. Bailo, A. Cabitto
Collaborations: ST Microelectronis
17) DSP CONTROLLED MATRIX CONVERTER FOR HIGH POWER APPLICATIONS
G.Parodi, M.Raggio, I. Barbieri, P. Lambruschini, R. Stagnaro
Collaborations: RGM SpA
18) LOW PHASE NOISE VCO’S IN CMOS TECHNOLOGY
S. Gagliolo, G. Pruzzo, D.D. Caviglia
19) NANOTECHNOLOGY: CARBON NANOTUBES FOR ELECTRONICS
E. Di Zitti, M.T. Parodi, D. Ricci, A. Ansaldo, M. Dipasquale, T.Y. Kim, S. Cincotti
Collaborations: Dipartimento di Elettronica, Informatica e Sistemistica - Università di Bologna,
Max-Planck-Institut fr Festkrperforschung
20) NANOELECTRONIC DEVICES BASED ON NANOPARTICLES
E. Di Zitti, M.T. Parodi, D. Ricci, S. Carrara, A. Ansaldo, M. Dipasquale, T.Y. Kim, S. Cincotti
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GENOVA
DIGITAL ENTERTAINMENT AND EDUCATION
F. Bellotti, R. Berta, A. De Gloria, E. Ferretti, M. Margarone, L. Primavera
The scientific community has been discovering the potential of games as powerful mediators
for knowledge acquisition. Games stimulate the players personal initiative, curiosity and mental
processing capabilities. This is the theoretical motivation for the edutainment (i.e. people educate
themselves in a pleasant way through entertainment). Production of computer games has become
a very complex task, which requires huge funding and a multidisciplinary team. In the ChiKho
project, co-funded by the EU Cultura 2000 programme, we have designed and developed an international web-distributed game to promote reciprocal knowledge of local cultures of school-students
(and general public, as well) from several countries across Europe. The ChiKho games and other
educational thematic games we are developing (e.g. one for side-teaching of road education) use
cutting-the-edge multimedia tools and techniques including 3D reconstructions, animations, support for multiculturality, and interactive narratives, distributed computing - to provide users with
educational tools where the learning phase is well embedded in an appealing, compelling and entertaining experience. In the ELU project, co-funded by the EU IST programme and started at the
end of 2005, the ELIOS Lab will design and develop educational games for interactive Digital TV
(iDTV). The games will be used for learning basic ICT, in a life-long learning perspective, and in the
curriculum of statistics for students of Master in Business Administration. The project will involve
design and implementation of the games (both client-side on the Set Top Box, and server-side at
the broadcasters), of the development environment and of the test settings in Lithuania and Czech
Republic. Concerning Virtual Heritage, we deal with issues such as modelling of architecture, 3D
laser scanner acquisition, point clouds reduction, image segmentation, video production, interactive
exploration of virtual environments. We have implemented a number of VR applications for the
cultural and artistic heritage. Samples include photorealistic 3D historical movies (Strada Nuova,
Palazzo Ducale, Renaissance villas in Genoa).
[1] F. Bellotti, A. De Gloria and E. Ferretti Discovering the European Heritage Through the
ChiKho Educational Web Game INTETAIN 2005, Madonna di Campiglio, November 2005
[2] F. Bellotti, A. De Gloria and E. Ferretti ChiKho: An Educational Web Game For The European
Heritage AICA 2005, Udine, Ottobre 2005
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CAR MULTIMEDIA AND INFORMATION MANAGEMENT
F. Bellotti, A. De Gloria, R. Lauletta
In the EDEL (Enhanced Driving in Poor Visibility Conditions) IST project we have developed
a second generation night vision system based on Near Infrared illuminators and sensors. The
system provides semantic information in order to effectively draw the drivers attention towards the
actual danger source. In this context, we have developed a pedestrian recognition module based
on a Support Vector Machine (SVM) and a statistical model, which features recognition rates
comparable to the state of the art in daylight conditions. The system has been deployed in the FIAT
Multipla prototype. In the Safespot IST integrated project, the ELIOS Lab is studying accident
dynamic and statistics in order to specify, design and develop a safety-supporting cooperative
application based on vehicle-to-infrastructure communication. The AIDE IST integrated project
aims at designing an integrated Human-Computer Interaction concept for the driver. In this project
we have designed the ICA (Information and Communication Assistant) module, a rule-based expert
system which manages and schedules the communications from the vehicle and the external world
in order not to distract nor overload the driver. We have also designed the software classes for the
LCD configurable dashboard that will provide information to the driver, and an authoring tool to
support graphical designers to develop such dashboards. The ELIOS Lab will develop the ICA for
the Seat and FIAT prototype cars and the configurable dashboard for the FIAT prototype.
[1] F. Bellotti, A. De Gloria, R. Montanari, N. Dosio and D. Morreale COMUNICAR: designing
a multimedia, context-aware human-machine interface for cars Cognition, Technology and Work,
Vol. 7 No. 1, pp. 36-45, March 2005
[2] L. Andreone, F. Bellotti, A. De Gloria and R. Lauletta SVM-Based Pedestrian Recognition on
Near-InfraRed images Int.l symposium on Image and Signal Processing and Analysis, ISPA 2005,
Zagreb, September 2005
[3] L. Andreone, P. Antonello, F. Bellotti, D. Grimm, M. Mariani, M. Wueller, and J. Heerlein
Development of new generation of driving support system for night vision enhancement the EDEL
project Intelligent Transportation Systems, ITS 2005, Hannover, June 2005
[4] L. Andreone, A. Amditis, E. De Regibus, D. Morreale, and F. Bellotti Beyond contextawareness: driver-vehicle-environment adaptivity. From the Comunicar project to the Aide concept
16th IFAC World Congress, Prague, Jul. 2005
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HUMAN-COMPUTER INTERACTION AND UBIQUITOUS COMPUTING
F. Bellotti, R. Berta, A. De Gloria, E. Ferretti, R. Lauletta, M. Margarone, L. Primavera
Human-Computer Interaction (HCI) is a key-factor to achieve a full exploitation of the potential
of the computers. In the field of Ubiquitous Computing, we have implemented the Tourist Digital
Assistant (TDA) model, a multimedia tour guide for cellular phones and palmtop computers. In
order to enhance the HCI development process in a user-centered perspective, we designed and
developed the Mobile Applications Development Environment (MADE) toolkit, which supports
efficient development of multimedia applications optimized for advanced cellular phones and palmtop computers. Achievements in 2005 involve the development of RFID-location modules, through
which we have implemented tour-guides for the disabled, in particular the blind, and, in the context of the EU-funded Technolangue project, we have developed a GIS tool for field worker. In
Technolangue we have developed web-based interactive maps and tools aimed at integrating the
technical languages of urban and environmental planning and of transport systems with georeferenced data in order to support decisions for participatory and sustainable development. The maps
are usable through desktop computers and through handheld devices (tablet PCs and palmtop
computers) as well, with specific functionalities for field workers. In the field of entertainment, we
are currently studying and developing Artificial Intelligence algorithms for various computer-game
aspects, such as: strategy decision and implementation, uncertainty reasoning, player-behaviour
prediction and adaptation, flocking and simple swarm algorithms, action coordination.
[1] F. Bellotti, R. Berta, and P. Robertson AIDE and nomadic devices 16th IFAC World Congress,
Prague, Jul. 2005
[2] F. Bellotti, R. Berta, A. De Gloria, M. Margarone B4B (Bricks for Biz): a Platform to
support General Users in Developing Cultural Tourism Applications eChallenges e-2005, Ljubljana,
Slovenia, 19 October 2005 - 21 October 2005
[3] R. Berta and A. De Gloria Condivisione e fruizione dell’informazione geografica attraverso il
Web e sul campo AICA 2005, Udine, Italy, October 2005
SMART ADAPTIVE SYSTEMS ON SILICON
M. Gravati, M.Valle
Adaptive systems (i.e. Neural Networks, NNs) constitute a very powerful computational model
owing to their modelling and complex-problem solving capabilities. NNs can be successfully used
when a direct algorithmic solution for a given problem or application does not exist, but desired
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outputs for a set of examples are available. The examples are used to train the NN to solve the
specific problem (e.g. handwritten character recognition, unknown system identification, industrial
quality control analysis, optimization problems, novelty detection, etc.). Analog VLSI implementation of NNs has its own rationale because of the extremely low power consumption and reduced
size. The advantages of on-chip learning implementations are not evident when the problem solution requires small networks (i.e. with a small number of computational elements) and the training
set consists of few examples. Analog on-chip learning networks ought to be pursued when: a) large
networks (e.g. with thousands of computational elements) and large training sets (e.g. thousands of
examples) are considered; b) we need to implement adaptive neural systems, i.e. systems that are
continuously taught while being used. Moreover, the inherent feedback scheme provided by learning has many beneficial effects: reduced sensitivity to parameter variations, improved robustness to
unavoidable disturbances, etc. These characteristics can successfully cope with the pitfalls of the
analog hardware implementation technology. We addressed scalability and modularity both at the
system as well as at the circuit level. In the former case, we accomplished it by adopting perturbation learning algorithms, which are more prone to scalable architectures. In the latter case, we
adopted current-mode circuits. The current mode approach increases the dynamic range of signals
and lowers significantly power consumption, if MOS devices are biased in the weak inversion region.
To increase the robustness of computation with respect to noise and analog circuit non-idealities,
we adopted a differential and balanced current mode signalling approach and proposed the on-chip
learning implementation. In this perspective, one should observe that the on-chip leaning scheme
can successfully cope with the non-idealities and errors of the analog circuit implementation as the
automatic on-chip tuning does with analog integrated filters. The feedback scheme is effective also
because it exploits the speed of analog circuits. Following the above considerations, we proposed
novel neural primitive circuits whose operation is based on the translinear approach: the circuits
are biased in the weak inversion region of operation and achieve very high power efficiency.
We designed a novel analog circuit 4-quadrant multiplier in the CMOS 0.35 micron AMS technology and considering a (low) power supply voltage of 2.5 V (i.e. negative power supply voltage
VSS = -1.25 V and positive power supply voltage VDD = + 1.25 V). A test chip has been designed
and manufactured and the experimental results confirm the circuit behaviour: the performance of
the circuit compare favourably with those of the open literature.
[1] M.Gravati, M.Valle, Modelling mismatch effects in CMOS translinear loops and current mode
multipliers, Proc European Conference on Circuit Theory and Design (ECCTD’05), Cork (Ireland),Aug 29 - Sept 1, 2005, Vol. III, pp.373-376, (ISBN 0-7803-9066-0) [2] Gravati, M., Valle,
M., Ferri, G., Guerrini, N., Reyes, L., A novel current-mode very low power analog CMOS four
quadrant multiplier, Solid-State Circuits Conference, 2005, ESSCIRC 2005, Proceedings of the 31st
European, 12-16 Sept. 2005 Page(s):495 - 498
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DESIGN OF INTEGRATED CIRCUITS FOR BIOELECTRONICS SYSTEMS
E. Bottino, M. Valle
The recent progress in both neurobiology and microelectronics suggests the creation of new,
powerful tools to investigate the basic mechanisms of brain functionality. In particular, a lot of
efforts are spent by scientific community to define new frameworks devoted to the analysis of invitro cultured neurons. One possible approach is recording their spiking activity to monitor the
coordinated cellular behaviour and get insights about neural plasticity. The goal of our research
activity is the design and implementation of a fully integrated bio-abio interface to record neural
spiking activity. Due to the nature of neurons action-potentials, when considering the design of an
integrated microelectronics-based recording system, a number of problems arise. First, one would
desire to have a high number of recording sites (i.e. several hundreds): this poses constraints
on silicon area and power consumption. In this regard, our aim is to integrate (through onchip post-processing techniques) hundreds of bio-compatible micro-sensors together with CMOS
standard-process low-power (i.e. some tenths of microW per channel) conditioning electronics. Each
recording channel is provided with sampling electronics to insure synchronous recording so that,
for example, cross-correlation between signals coming from different sites can be performed. Extracellular potentials are in the range of [50 - 150] microV , so a comparison in terms of noise- efficiency
was carried out among different architectures and very low-noise pre-amplification electronics (i.e.
less than 6:5 microV rms) was designed. As spikes measurements are made with respect to the
voltage of a reference electrode, we opted for an AC-coupled differential-input preamplifier provided
with band-pass filtering capability. To achieve this, we implemented large time-constant (up to
seconds) integrated components in the preamp feedback path. Thus, we got rid also of random slowdrifting DC-offsets and common mode signals. A recording interface architecture has been designed
and its main component stages as well as its features were defined. The interface was tailored on
the application specifications and we preferred a simple, power- saving small design instead of a
complex, very low-noise, heavy-conditioning one. In this regard our system performances appear
to be better than previously reported implementations. At the moment, a test chip will be sent to
fabrication.
[1] E. Bottino, M. Valle, Integrated low noise preamplifier for biologic-electronics interfaces, Proc
European Conference on Circuit Theory and Design (ECCTD’05), Cork (Ireland), Aug 29 - Sept 1,
2005 Vol. I, PP 103-106 (ISBN 0-7803-9066-0) [2] E. Bottino, S. Martinoia, M.Valle, Integrated low
noise power interface for neural bio-potentials recording and conditioning, Proc. Microtechnologies
for the new millennium 2005, May 9-11, 2005, PP. 193-203 (ISBN: 0-8194-5834-1).
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BEHAVIOURAL MODELS OF MIXED-MODE CIRCUITS
A. Dei, W. Prodanov, M. Valle
The development of CMOS Deep-Sub-Micro technologies have brought new challenges for analog designers. The ever growing complexity of the so called Systems-on-Chip requires a drastic
change in design methodologies. Electronic Design Automation is a key factor for fast and efficient
development of complex Mixed-Signal systems. Nevertheless, the techniques and tools that are
available today for design of analog and mixed-signal integrated circuits are lagging considerably
behind the ones for the digital domain. Behavioral models play an important role in modern circuit
design. They act as executable specifications in top-down system design and as abstract description
of functional blocks needed for a reuse-oriented design style. The trade-offs between traditional
approaches using conventional circuit simulators and those based on behavioral modeling have been
reported in in the literature. Sampled data systems are a good example where behavioral models
can be applied in a efficient way. We focussed our reserach activity on the behavioural models of
Sample and Hold circuits. A SH circuit suffers from two major problems which are: a) charge injection and b) switch nonlinear on-resistance (RON). Different approaches for SH behavioral modeling
can be found in the literature. However, only charge injection effect is considered. We developed a
behavioral model of the SH building block focused on the non-linear on-resistance. The proposed
model is intended as support to evaluate any kind of systems that make use of sampled SH’s if used
together with charge injection estimation models. It is well known that RON and charge injection
effects have different requirements for switches dimensions in a SH.
[1] W.Prodanov, M.Valle, A behavioral model for the non-linear on-resistance in sample-and-hold
analog switches, Proc European Conference on Circuit Theory and Design (ECCTD’05), Cork
(Ireland),Aug 29 - Sept 1, 2005, Vol. I, pp.111-114, (ISBN 0-7803-9066-0)
SYSTEM FOR ACTIVATING OBJECT MANIPULATIONS IN VIRTUAL AND
REAL ENVIRONMENTS BASED ON THE VISUAL ANALYSIS OF THE
TEMPORAL EVOLUTION OF HAND MOVEMENTS
G. M. Bisio, S.P. Sabatini, F. Solari
This research aims to implement a perceptual human-machine interface based on visual appearence of hand movements: gestures are defined as the temporal evolution of 3D poses of the
user’s hand. The static poses considered are: open/close hand, partially open, palm position and
orientation; the dynamic poses considered are: translations and rotations, grasping/dropping. This
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interface could be used in various application domains (e.g., virtual mouse and joystick for manipulation). The innovative aspects of the proposed system concern both the algorithmic solutions and
the implementations issues (VLSI architectures for dedicated computation). The algorithmic solutions rely upon stereo and motion information considered in their ”full” spatio-temporal dimension.
Feature processing for gesture recognition directly exploits disparity and motion maps, in order to
achieve a more reliable recognition of hand poses and movements. The high computational loads,
required in order to follow the evolution of visual features in the real time dictated by the natural
expressiveness of gestures, can be supported by specific algorithmic solutions that lends themselves
to an efficient mapping in VLSI modules for analog and digital computation.
[1] G. Gastaldi, A. Pareschi, S. P. Sabatini, F. Solari,and G. M. Bisio A Man-Machine Communication System Based on the Visual Analysis of Dynamic Gestures IEEE Int. Conf. on Image
Processing, ICIP 05, Genoa, September 2005.
ELECTRONIC SYSTEMS FOR INTELLIGENT MULTIMEDIA PROCESSING
AND SOFT COMPUTING
D.Anguita, P.Gastaldo, S.Ridella, F.Rivieccio, R.Zunino
This research aims to develop efficient electronic systems that exploit advanced nonlinear
paradigms for data processing, in the area of high-performance industrial applications and multimedia.
The research addressed a crucial problem in the design of soft-computing electronic systems,
in particular when adopting effective models such as Support Vector Machines, which may involve
delicate and complex optimization issues in real applications. The research explored nonconventional approaches to the SVM training problem, in particular by analyzing from a both theoretical
and practical perspective the use of Quantum Computing paradigms, and the implementaiton of
existing Quantum Optimization algorithms.
A classical soft-computing paradigm adopted involves the application of Feedforward neural
networks; it continues an ongoing research activity that has been lasting for several years, and that
aims to model the user-perceived quality of pictures when these are presented on commercial TV
displays and monitors. Current investigation pursues an efficient porting of existing algorithms on
high-performance electronic architectures based on low-cost DSPs.
The electronic implementation of the theoretical model is supported by specific analogue design
methids, which lead to the development of an efficient design procedure for Soft-Max nonlinear
data mapping in VLSI CMOS technology.
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[1] Gastaldo P, Zunino R, Heynderickx I, Vicario E ”Objective quality assessment of displayed
images by using neural networks” Signal Processing: Image Communication, 2005, vol.20, pp.643661
[2] Gastaldo P, Zunino R ”Neural networks for the no-reference assessment of perceived quality”
SPIE Journal on Electronic Imaging, Jul-Sep 2005, vol.14, No.3, pp. 033004/1-11
[3] Gastaldo P. Zunino R, Muijs R, Heynderickx I ”Building neural systems for no-reference quality
assessment” 1st Int. Workshop Quality Metrics and Video Processing, Scottsdale USA, 2005
[4] Gastaldo P, Parodi G, Zunino R DSP-Based Neural Systems for the Perceptual Assessment of
Visual Quality Int.Joint Conf. Neural Networks, IJCNN2005, Montreal, pp. 663-668
[5] Piombo D, Zunino R ”Analog Soft-Max circuit with dynamic gain control” IEEE Workshop PhD Research in Microelectronics PRIME 2005, Lausanne
[6] Piombo D, Zunino R ”Analog Current-Mode Design for Soft-Max Computation” Int.Joint Conf.
Neural Networks, IJCNN2005, Montreal, pp. 669-674
SMART ELECTRONIC SYSTEMS FOR NONLINEAR MODELLING AND DATA
ANALYSIS
D.Anguita, S.Ridella, F.Rivieccio, D.Sterpi
Intelligent systems can perform nonlinear tasks effectively and without an analytical model of
the observed phenomenon.
The intelligence is based on the ability to learn new tasks without resorting to a-priori models.
One of the most challenging targets in this field is finding new solutions for their implementation
in electronic form, ranging from VLSI devices to embedded systems.
Developing on the Vapnik’s Statistical Learning Theory we are proposing newer and more
promising models and implementations that show remarkable properties in term of generalisation
ability and superior performance if compared to more traditional intelligent systems (e.g. Artificial
Neural Networks: Multi Layer Perceptrons and Radial Basis Function Networks).
[1] D. Anguita, G. Bozza, The Effects of Quantization on Support Vector Machines with Gaussian
Kernel, Proc. of the IEEE Int. Joint Conf. on Neural Networks, IJCNN 2005, Montreal, Canada
Aug. 2005
[2] D. Anguita, S. Ridella, F. Rivieccio, K-Fold Generalization Capability Assessment for Support
Vector Classifiers, Proc. of the IEEE Int. Joint Conf. on Neural Networks, IJCNN 2005, Montreal,
Canada Aug. 2005
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[3] D. Anguita, A. Boni, S. Ridella, F. Rivieccio, D. Sterpi, Theoretical and Practical Model
Selection Methods for Support Vector Classifiers, in L. Wang (Ed.), Support Vector Machines:
Theory and Applications, Springer 2005
DISTRIBUTED MEASUREMENT SYSTEMS
D. Anguita, A.Bagnasco, G.Parodi, A. Poggi, A.M.Scapolla
This research activity aims to study the issues related to the interconnection of distributed and
collaborative systems. In particular, we are interested in the characterization of reference models,
architecture and abstraction mechanisms for the interoperability of instrumentation, procedures,
interfaces and applications in distributed systems for collaborative tele-measurement. The research
results are applied to the development of innovative solutions for supervision, control and diagnostic
of distributed industrial systems. The research addresses different scenarios: - Embedded Systems
Networks, where Internet-based architectures and technologies are applied to small devices. Cooperating objects in distributed embedded systems to handle the high degree of device heterogeneity
and the limited computational resources. - GRID of instrumentation, where the Grid middleware
allows integrating acquisition, storage and analysis of data, and yields efficient solutions for process
characterization, calibration of instruments, and real-time data analysis.
[1] Bagnasco A., Poggi A., Scapolla A.M., ”Computational GRIDs and Online Laboratories”, 1st
International ELeGI Conference on Advanced Technology for Enhanced Learning, Vico Equense,
Italy, March 14 16, 2005.
[2] Anguita D., Poggi A., Rivieccio F., Scapolla A.M., ”Data mining tools: from web to Grid
architectures”, European Grid Conference, Amsterdam, The Netherlands, February 14 -16, 2005.
[3] Bagnasco A., Scapolla A.M., Chirico M., ”A New and Open Model to Share Laboratories on
the Internet”, IEEE Transactions on Instrumentation and Measurement, Vol. 54, No. 3, June 2005
[4] A. Bagnasco, A. Poggi, G. Parodi, A. M. Scapolla, Exposing Measurement Instruments as Grid
Services, 2005 Tyrrhenian International Workshop on ¿ Digital Communications, Sorrento, Italy,
July 4-6, 2005
[5] A. Bagnasco, D. Cipolla, D. Occhipinti, A. Preziosi, A.M. Scapolla, Application of web services
to heterogeneous networks of small devices, WSEAS Transactions on Information Science and
Application, Issue 5, Volume 3, May 2006, ISSN 1790-0832
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E-LEARNING FOR ELECTRONICS
A. Bagnasco, G. Donzellini, G. Parodi, D. Ponta, A.M. Scapolla
The research activity is application oriented and is focused on four main topics: 1) Networkbased Project Learning (NBPL). Innovative integration of traditional PBL and network technology.
We contributed to the design, development, test and dissemination of NBPL models and tools,
focusing on the field of engineering education. The tools provide management and control of project
learning, and services for communication and collaboration between distant students. The extensive
validation has proved the system’s effectiveness and contributed to its dissemination. 2) Electronic
Simulation of Digital Devices. DEEDS (Digital Electronics Education and Design Suite), is a
set of three simulation tools for Digital Electronics, covering: - Combinational and Sequential logic
networks - Finite State Machine design - Micro-computer interfacing and programming Tools can be
combined together to simulate hybrid systems. They provide full support for lectures and laboratory
practice to a course on Digital Design, introductory level. 3) Metadata and Learning Object
Repositories. Learning Objects are nowadays based on standard Metadata (LOM). We work on
the customization of LOM, the development of repositories and knowledge content interoperability.
4) Remote Laboratories on the Web. Remote access via Internet to geographically distributed
real laboratories allows sharing instruments and experiments among different institutions. The
model we developed is modular, scalable and multi-user. Its feasibility and effectiveness have been
validated by ISILab (Internet Shared Instrumentation Laboratory), a system that lets electronic
engineering students to practice with remote instruments.
[1] A. Bagnasco, A.M. Scapolla, ”A Grid of Remote Laboratory for Teaching Electronics”, in
Towards the Learning Grid, Advances in Human Learning Services, Volume 127 of Frontiers in Artificial Intelligence and Applications, Edited by: P. Ritrovato, C. Allison, S.A. Cerri, T. Dimitrakos,
M. Gaeta and S. Salerno, November 2005, 252 pp., ISBN: 1-58603-534-7
[2] A.Bagnasco, G. Parodi, D. Ponta, A. M. Scapolla, A Modular and Extensible Remote Electronic
Laboratory, International Journal of Online Engineering (iJOE), Vol. 1, No. 1 (2005), ISSN: 18612121
[3] A.Bagnasco, D. Ponta, A. M. Scapolla, Remote experiments in electronics: pedagogical issues,
REV05, International Symposium on Remote Engineering and Virtual Instrumentation, Brasov,
Romania, 29-30 June 2005
[4] Andrea Bagnasco, Giancarlo Parodi, Domenico Ponta, Anna Marina Scapolla, A remote laboratory for electronics: technical and pedagogical issues, First International Conference on Interactive
Mobile and Computer Aided Learning, IMCL2006, Princess Sumaya University for Technology
Amman, Jordan, 19-21 April 2006
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ALGORITHMS AND TOOLS FOR SYSTEM SPECIFICATION AND SYNTHESIS
F. Curatelli, L. Mangeruca, O. Mayora-Ibarra
The research on algorithms and tools for system synthesis has concerned activities in the fields
of high-level Hw/Sw synthesis of VLSI systems, speech recognition for multimedia applications,
and study and applications of associative memories.
In the field of CAD tools for VLSI, particular attention is devoted to the extention of automatic
design to System Level. At this level, the system to be realize is specified giving its algorithmicbehavioral description; following a partitioning operation, such description is partitioned into well
different sub-parts to be implemented in hardware and software ways (Hw/Sw Codesign). The
research on this field concerns the study and development of CAD tools for the high-level synthesis
of VLSI systems, starting from an algorithmic input description (expressed in VHDL) of the system
to be synthesized. In order to suitably address the high-level synthesis problem, we have:
1) provided the specification and implementation of a powerful and flexible internal form of
representation to be used in synthesis,
2) studied the requirements related to the use of VHDL as input specification language.
In the field of speech recognition we have done a research concerning the study and implementation of speech recognition functions for multimedia applications. To this aim, during the research
it has been developped a system prototipe for speech recogniction (SPEAR) starting from speech
files in different formats (wav, raw, compressed wav).
The program was tested with good results for the recogniction of digits with noise or without
noise (the noise can be optionally added directly by the program starting from the test files). The
training set is constituited by a subset of the APASCI database, made available by IRST Labs of
Trento. The program is realized in C++ language on a computer working with Linux operating
system, and has a flexible graphical interface able to simplify the operations of option selection,
wave display, results display and comparison. Moreover, a prototype tool has been written and
simulated in VHDL as a high-level system specification suitable for Hw/Sw system of an embedded
version of the tool, suitable for multimedia applications.
In the same time we have studied suitable vector quantization techniques for the optimization of
the number of acoustic parameters used for training the associative memory and for the reduction
of the number of training vectors actually used during the recognition phase.
For the implementation we have used associative memories and a more efficient decoding technique has been introduced for holographic associative memories for pattern recognition, the Closest
Holographic Neighbour (CHN). The CHN method improves the low-time and low-memory consumption of the original method without loosing accuracy in the response. For doing this, data
is first transformed to the complex number domain, and then an error function is defined to give
the phase difference in the complex plane between each trained and test stimulus. The minimum
difference obtained among the whole training set and the test vector would lead to the best pattern
match and therefore, to the CHN vector. A comparison with other paradigms such as MLP-BPP,
BAM (Bidirectional Associative Memory) and the classical HAM method has been mainly done
for pattern recognition and data forecasting.
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[1] F. Curatelli, L. Mangeruca, ”A Method for Computing the Number of Iterations in Data
Dependent Loops”, Real-Time Systems, Vol. 32, N. 1-2, February 2006, pp. 73-104 (ISSN : 09226443).
MULTIMEDIA SYSTEMS FOR IMPAIRED USERS
F. Curatelli, C. Martinengo, O. Mayora-Ibarra
The research on multimedia systems for impaired users has concerned activities in the following
fields:
1) intelligent systems for optimizing human-computer interaction (HCI) by non-expert users,
motor-impaired users, and users affected by specific learning disability (such as dyslexia);
2) intelligent systems for special education of impaired students, in particular: software programs for aiding the impaired student in training and executing mathematics, linguistic and technical operations
Concerning the HCI field, we have addressed the problem of improving typing efficiency of nonexpert users in desktop applications. In particular, we have studied and implemented a method
that is suitable to achieve small KSPC values, i.e., the number of keystrokes per character, defined
as the mean number of key selections needed to input a character. This has been obtained by
allowing the user to input more characters with a single key selection.
To this aim we have studied a powerful pseudo-syllabic paradigm, which is appliable to both real
and virtual keyboards and makes it possible to improve the efficiency of text-entry. By adopting a
novel orthogonal framework, keyboards are defined as 2-D regular arrays of keys. Non-expert and
motor-impaired users can fast and intuitively input any possible combination of pseudo-syllables,
which are text entry units with simpler consonant-vowel phonemic structure. Moreover, it is possible to input single characters in the typical letter-by-letter way. In particular, the proposed
orthogonal scheme provides an efficient way to reach the correct x,y positions of a key without the
need of a complete visual search of the keyboard. This has made it possible to obtain better choice
reaction times than with standard qwerty keyboards.
This novel text entry paradigm can be directly and easily applied to the graphemic structure
of whichever alphabetical language with transparent orthography (i.e., with highly regular correspondence between orthography and phonetics). As most languages have this characteristic, the
orthogonal paradigm is suitable to implement specific orthogonal keyboards for a high percentage
of world languages. The implementation of the orthogonal keyboard for Italian and Spanish has
shown a significant improvement in alphanumeric text entry performance.
Concerning the special education field, we have focused our research on students who are affected
by childish cerebral paralysis, which yields severe motor and visual-spatial coordination problems.
We have started with a careful analysis of the problems encountered by these children in learning
Mathematics during the first years of school. These problems can be classified under the generic
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term of dyscalculia, which concerns one or more impairments of the ability to perceive the meaning
of numbers, measures, geometry and operations, and to solve mathematical problems.
Then, we have studied and developed two software tools for arithmetic learning. The aim of the
first tool (CoLT) is to help children in acquiring the meaning of the basic arithmetic operations;
this is done through the application of practical examples based on the virtual manipulation of
coins. Instead, the second tool (ArTIC) allows the motor-impaired children to independently and
easily execute the four arithmetic operations; this is possible because each single operation step is
graphically detailed on the screen and can be activated by using few keys of the computer keyboard.
[1] C. Martinengo, F. Curatelli, ”Sull’ Insegnamento della Matematica ad Alunni con Handicap Motorio nel Primo Ciclo delle Elementari”, Atti Convegno Nazionale sull’Insegnamento della
Matematica, Bari, 19-21 febbraio, 2004, Ghisetti e Corvi ed., pp. 85-87 (ISBN : 88-538-0270-7).
[2] F. Curatelli, C. Martinengo, O. Mayora-Ibarra, ”Improving Text Entry Performance for
Spanish-Speaking Non-Expert and Impaired Users”, Second Latin American Conference on HumanComputer Interaction, CLIHC 2005, Cuernavaca, Mex, October 23-26, 2005, New York, ACM
Digital Library.
[3] F. Curatelli, C. Martinengo, ”Tecniche per Aumentare la Velocita’ di Scrittura di Utenti
Disabili”, Atti Convegno HandyTED 2005 , Genova, 23-25 Novembre, 2005, pp. 78-83.
[4] F. Curatelli, C. Martinengo, ”A Powerful Pseudo-Syllabic Text Entry Paradigm”, International
Journal of Human-Computer Studies, Vol. 64, N. 5, May 2006, pp. 475-488 (ISSN : 1071-5819).
AUTOMATIC REMOTE SURVEILLANCE OF ENVIRONMENT
C.Regazzoni, G.Parodi, M.Raggio, G.Bailo, A.Cabitto, A.Pellegrino
The first objective of the project was the development of an automatic surveillance system
for outdoor environment. The system has a distributed architecture where a server can store a
large database of video stream both acquired from camera or any source (i.e. from digital and
analog media) Sequences are acquired and indexed through meta-data which describe the scene at
high abstraction layer and allow the user to retrieve video and data stream starting from a user
friendly query. Video stream stored into the database are realtime compressed using H.263 video
compression algorithm supporting space and temporal scalability. The surveillance system can also
generate alarms while acquiring data (realtime) for events like crossing virtual barrier, acceding
of a user specified amount of people over a user specified area, suspicious behave, car or object
abandoned in specified areas. The user interface allows simple composition of query for consulting
the data base and using the system as a all. Midterm research address development of innovative
module for multisensorial extension of the system with distributed intelligence of the system having
autonomous capability of selecting most informative scene and retrieval.
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[1] M. Raggio, G. Bailo, F. Sguanci, Paivi Ijas, ”Adaptive Background Evaluation for Foreground
Detection in video surveillance applications” VLBV05 conf. - 15-16 September 2005, Costa Rei Sardinia, Italy.
[2]
Gianluca Bailo, Ivano Barbieri, Stefano Cevasco, Marco Raggio Health Parameters and Video
Live Transmission with Data Storage on Database, in Emergency Telemedicine IEEE BROADMED:
1st ”Telemedicine over broadband and wireless networks” - October 3, 2005, MA, USA.
MICRO ARCHITECTURE MODELING FOR MEDIA PROCESSING AND
EMBEDDED SYSTEM FOR MOBILE APPLICATION
G.Parodi, M.Raggio,I.Barbieri, M. Bariani
The Micro architecture modeling for Media processing and Embedded System for Mobile Application (M2DYA) research activities address study and set up of a set of development tools for the
design and the simulation of embedded system and multimedia processor architecture, supporting
advanced multimedia application such as image, video and audio coding and their transmission on
mobile (Low Power) environment. A vertical approach is followed, including multimedia applications study, optimized description of the algorithms in high level programming language, system
layer and interfaces. Attention focuses on simulation tools for the core processor of the architecture
where Media Processor having superscalar or VLIW architecture will be addressed. A number of
Activities and Tasks are scheduled in order to select, study, implement/optimize application and
tools. Furthermore, the research aims at set closer high level programming language, requirement
identification and specification to system design, improving interface for the application developers. Previous and ongoing research project on real time implementation of standard video coding
applications and multimedia system (Implemented on both DSP and general-purpose processor),
study on simple Multimedia processor architecture and hw-sw co design methodology for ASDSP.
From the applications point of view, a relevant background is the European SCALAR (ACTS)
project where standard ITU-T multimedia systems (audio, video and data) were implemented. A
scalable approach is followed into the development of the research project, increasing confidence
on project results as, previously studied applications are addressed, software implementation for
the target applications are available, free/share software implementation for some simulation tools
is also available, anyway, the HP-ST development tools for the LX architecture have been recently
installed in ESGN laboratories. As these tools represent the state of the art, they will be used.
In particular, the research investigates various aspects related to the development of embedded systems supporting multimedia applications. Focusing on the main processor of the system,
three key elements are addressed: the high-level code development for the software implementation
of the applications, the compiler for the target processor architecture and the simulation of the
architecture itself.
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Code optimization and porting on a given platform/system is part of the development of any
embedded system; it is therefore included into main items of interest of the research. Identification
of general programming rules (at least for a specific class of application) would highly increase
reusability of the code and reduce implementation costs. DSP processors, having superscalar or
VLIW architecture are addressed; re-targeting, scheduling techniques and programming model investigated. The model of the Target processor incorporates a GNU-based software development
environment, to allow software developers to set a Target architecture and run applications described in C code. Key concepts are: to allow estimation of performance, detailed modeling of
instruction function, and accelerated modeling of software on hardware, before building any hardware. Further key aspect of the research are on architecture and system solution suitable for media
processing on mobile system with hard constraints on power consumption.
Test implementation of video coding algorithms (e.g. ITU-T H.263 and H26L), speech coding
(e.g. G.723), speech reconiction and extension to set up H.323/4 and UMTS system architecture are
carried on to verify the methodology. (H.32x is one of the main living multimedia standardization
effort, which support a variety of applications ranging from mobile multimedia terminals to settop boxes). Subsets of MPEG4 reference software (w2205) are also of interest for profiling and
testing. The TMSC6x VLIW-DSP processor meets requirements from a variety of multimedia
application and it was a reference point in the previous research. New architectures are appearing
on the market which are of great interest for our evaluation and study of new architecture suitable
in specific application (e.g. mobile system). Long-term study address simulation of core with
higher number (i.e. not only 32 bits ’container’), approach to parallelism not only based on sub
word parallelism, homogeneous and not homogeneous core interfacing, for distribute processing,
embedded Linux Operating System (with enhancement for real time application).
[1] Gianluca Bailo, Fabio Sguanci, Paivi Ijas, Marco Raggio Adaptive Background Evaluation
for Foreground Detection with Gaussian Distribution, a Fast Approach DMS’2005 - The Eleventh
International Conference on Distributed Multimedia Systems. Banff, Canada, September 5 - 7,
2005.
[2] Gianluca Bailo, Ivano Barbieri, Massimo Bariani, Marco Raggio. Search window estimation algorithm for fast and efficient h.264 video coding with variable size block configuration EUSIPCO2005 Antalya,Turkey, 4-8/9/2005.
[3] I. Barbieri, M. Bariani, A. Cabitto, M. Raggio, A Simulation and Exploration Technology
for Multimedia-Application-Driven Architectures. The Journal of VLSI Signal Processing Systems
(JVSPS) Publisher: Springer Science+Business Media B.V. special issue on Media and Communication, Volume 41, Number 2. ISSN: 0922-5773 (Paper) 1573-109X (Online). DOI: 10.1007/s11265005-6647-2. September 2005, Pages: 153 168.
[4] Gianluca Bailo, Ivano Barbieri, Stefano Cevasco, Andrea Chiappori, Marco Raggio Telemedicine
technology support in Emergency Handling: a case study. WSEAS Transactions on Information
Science and Applications. Issue 12, Volume 2, December 2005. ISSN 1790-0832.
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ARCHITECTURE MODELING OF HAND HELD SYSTEM FOR SPEECH
APPLICATIONS
G.Parodi, M.Raggio, I.Barbieri, M.Bariani, R. Stagnaro
The research investigate various aspects related to the development of embedded systems supporting the voice/speech side of multimedia applications. Code optimization and porting on a
given platform/system is part of the development of any embedded system; it is therefore included
into main items of interest of the research. Moreover in modern voice channel systems, continuous
speech recognition is mandatory task to accomplish the requirements of an overall system supporting a natural language. The complexity of the application, being very computationally expensive,
may require dual or multicore core hardware architecture. This possibility implies the investigation of innovative system design methodologies (i.e. systemC) dealing with hardware software
partitioning, dynamic load balancing of the code, task assignment to core and multiprocessor simulation. Moreover a platform for a voice channel of a human machine interface system should also
be able to support a speech synthesis application. A scalable approach is followed into activities
development, increasing confidence on project results: we started from available tools, partly ST
proprietary and developed from us in previous projects. Those were used firstly for the ASR system
porting on an ST210 single core platform, in order to deeply evaluate and test the performance
of this specific VLIW processor on this application family. We also address simulation of a dual
(multi) core architecture for a continuous speech recognition system and proposal of an architecture
for speech recognition and synthesis. This last item involved commercial codesign tools, defining
possible hardware accelerator part, arising a pure software implementation. The research takes
into account real HW implementation issues, peripherals, interfaces in order to be albe to able to
host embedded software, required for tests, demonstrations and development of new application
oriented ASR and TTS systems.
[1] Gianluca Bailo, Massimo Bariani, Paivi Ijas, Marco Raggio. Background Estimation with
Gaussian Distribution for Image Segmentation, a fast approach. IMS 2005 - IEEE International
Workshop on Measurement Systems for Homeland Security, Contraband Detection and Personal
Safety, Orlando, FL, USA, 29-30 March 2005. ISBN 0-7803-9121-7
[2] Gianluca Bailo, Ivano Barbieri, Stefano Cevasco, Andrea Chiappori, Marco Raggio A
Telemedicine Application Project in Emergency Handling. Proceedings of the 5th WSEAS Int.
Conf. on applied informatics and communications, Malta, September 15-17, 2005 (pp16-19), ISBN:
960-8457-35-1.
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DSP CONTROLLED MATRIX CONVERTER FOR HIGH POWER
APPLICATIONS
G.Parodi, M.Raggio, I. Barbieri, P. Lambruschini, R. Stagnaro
The research investigate study and development of innovative algorithms, implemented on DSP
processors, for matrix converter control, in high power applications, Matrix converter makes use of
a power stage based on bidirectional three-phase converter. The control algorithm used to drive
matrix switches determine the function provided by the system. Main functions addressed are:
constant voltage power supply, battery charger, inverter, phase converter, for power within 5 and
20 KW.
LOW PHASE NOISE VCO’S IN CMOS TECHNOLOGY
S. Gagliolo, G. Pruzzo, D.D. Caviglia
The ever growing demand for Wireless systems with higher spectral efficiencies, lower power
consumptions and even lower costs, pushes for an intense activity in the field of integrated RF
circuits. One of the main blocks in RF integrated architectures is the frequency synthesizer, usually
based on a Voltage Controlled Oscillator (VCO) and its associated analog and digital circuitries.
The need for the highest level of performances from today’s Wireless applications, often requires a
VCO’s phase noise figure better than -95 dBc/Hz at 100 KHz from the carrier. Due to the good
phase noise basic performances and ease of implementation in the CMOS process, LC oscillators
with differential and cross-coupled topology are among the more frequently used circuital primitives.
Purpose of this research activity is to investigate the various noise sources of such circuits, and to
propose solutions in order to obtain good performances both on the spectral purity side and the
power consuption side.
[1]
Sergio Gagliolo, Giacomo Pruzzo, and Daniele D. Caviglia ”Phase noise performances of a
cross-coupled CMOS VCO with resistor tail biasing”, Proceedings of the 18th annual symposium
on Integrated circuits and system design Florianolpolis, Brazil, Pages: 149 - 153, 2005, ISBN:159593-174-0
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NANOTECHNOLOGY: CARBON NANOTUBES FOR ELECTRONICS
E. Di Zitti, M.T. Parodi, D. Ricci, A. Ansaldo, M. Dipasquale, K. Tae Young, S. Cincotti
The primary objective of this research project consists in exploiting carbon nanotubes in integrated nanoelectronics keeping in sight the double aim of producing novel devices with predefined
properties and to develop processes compatible with industrial applications. The fabrication of
carbon nanotube field-effect transistors (CNFETs) has been first addressed.
A system for SWNT’s manufacturing has been set up starting with nanotubes obtained by laser
ablation method. TEM investigations were led on home made single carbon nanotube solution and
on commercially available nanotubes for comparison sake; the obtained results proved the success
of the production and the purification method adopted.
Proper microfabricated test patterns have been designed to deposit in a controlled way single
wall nanotube ropes between different couples of source and drain electrodes, providing a common
back gate for current modulation. The placement of nanotubes has been guided by using ac
dielectrophoresis. The nanotubes have been characterized by micro-Raman spectroscopy, SEM and
AFM imaging. A good electrical connection between the metallic contacts and nanotube ropes was
obtained, enabling the measurement of typical p-type current-voltage characteristics of CNFETs.
[1] A. Ansaldo, D. Ricci, F. Gatti, E. Di Zitti, S. Cincotti, Investigating Schottky Barrier Effects in
Carbon nanotube Field Effect Transistors, Proc. XIX Int, Winterschool/Euroconference on Electronic Properties of Novel Materials, Kirchberg, Tirol, Austria, 12-19 March 2005, AIP Conference
Proceedings vol. 786, pp. 570-573 (2005).
[2] S. Carrara, D. Ricci, E. Di Zitti, S. Cincotti, Electronic properties of field-effect transistors
based on carbon nanotubes, Matter, Materials and Devices Meeting, Genova. June 22-25 C140, p.
94. Pubblicazione in formato elettronico CD-ROM (2005).
NANOELECTRONIC DEVICES BASED ON NANOPARTICLES
E. Di Zitti, M.T. Parodi, D. Ricci, S. Carrara, A. Ansaldo, M. Dipasquale, K. Tae Young, S. Carrara, S. Cincotti
The bottom-up approach within multidisciplinary nanotechnology fabrication methods is opening the possibility of devising completely new structures and materials to employ in nanoelectronics.
In particular, the possibility to synthesise metallic or semiconductor nanocrystals stabilized by using
organic molecules, namely nanoparticles, provides new materials for applications in quantum dot
or charge entrapment based devices. In this framework the aim of this research is the design of nanoelectronic devices working at room temperature that make use of nanometer-size semiconductor
or metallic crystals as charge-storage elements. The key topics addressed are:
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• Development of a device architecture of a Single-Electron Transistor (SET) where the quantum mechanical effect of the Coulomb blockade is obtained by means of a molecular nanocrystal (gold nanoparticle) between two nanocontacts.
• Design of a memory based on molecular nanocrystal arrays.
Both systems are based on the synthesis of nanometer sized gold particles embedded within
an organic dielectric medium. Self-assembly methods are utilized to obtain an ultrathin mixed
film deposited between electrodes. The film would lie onto a substrate in such a way that organic
molecules constituting the medium behave as an insulating barrier between adjacent conductive
particles or between a particle and the substrate in the case it is conductive; in this system an
electron may jump by tunnel effect either from one particle to another one or to the substrate.
The key issue of addressing such low dimensional structures by nanoelectrodes is tackled through
the fabrication of electrode pairs separated by nanometer size gaps by electrochemical erosion. A
method for the reproducible production of such nanocontacts has been developed and a patent
request has been deposited.
[1] F.Sbrana, M.T.Parodi, D. Ricci, E. Di Zitti, SPM investigation of thiolated gold nanoparticles
patterns deposited on different self-assembled substrates, in Scanning probe Microscopy: Characterization, Nanofabrication, and Device Application of Functional Materials, P.M. Vilarinho et al,
(Eds), Kluwer Academic Publishers, The Netherlands, pp. 457-466 (2005).
[2] S. Carrara, M.T. Parodi, M. Di Pasquale, T.Y. Kim, D. Ricci, E. Di Zitti, S. Cincotti, Hybrid
silicon-organic nanoparticle memory devices, Matter, Materials and Devices Meeting, Genova. June
22-25 NMM [11], p. 9. Pubblicazione in formato elettronico CD-ROM (2005).
[3] A. Ansaldo, M. Ventrella, D. Ricci, F. Gatti, E. Di Zitti, S. Cincotti, Electrochemical fabrication
of nanocontacts for single electron transistors and highly sensitive biosensors, Matter, Materials and
Devices Meeting, Genova. June 22-25 C142, p. 95. Pubblicazione in formato elettronico CD-ROM
(2005).
[4] S. Carrara, D. Ricci, M. Tormen, M. Altissimo, M. Romanato, F. Di Fabrizio, E. Di Zitti,
S. Cincotti, Nanocontacts for single electron transistors and highly sensitive biosensors by X-ray
lithography, Matter, Materials and Devices Meeting, Genova. June 22-25 C148, p. 100. Pubblicazione in formato elettronico CD-ROM (2005).
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INGEGNERIA ELETTRICA
Research topics
1) LOW VOLTAGE LOW POWER ANALOG INTEGRATED CIRCUIT DESIGN
G.FERRI, N.GUERRINI, V.STORNELLI, A. DE MARCELLIS, F.MANCINI, S.RICCI,
F.FELICIANGELI
Collaborations: UNIV.TOR VERGATA, UNIV. LA SAPIENZA, UNIV.FIRENZE, UNIV.GENOVA
2) CURRENT-MODE ANALOG CIRCUIT DESIGN
G.FERRI, N.GUERRINI, M.DIQUAL, V.STORNELLI, A. DE MARCELLIS, F.MANCINI,
S.RICCI, F.FELICIANGELI
Collaborations: UNIV.TOR VERGATA, UNIV. LA SAPIENZA, UNIV.FIRENZE, UNIV.GENOVA,
UNIV.CATANIA
3) INTEGRATED CIRCUITS FOR SENSOR APPLICATIONS
G.FERRI, N.GUERRINI, V.STORNELLI, A. DE MARCELLIS, S. DEL RE, F.MANCINI,
S.RICCI, F.FELICIANGELI
Collaborations: UNIV.TOR VERGATA, UNIV.LECCE, UNIV.PAVIA
4) TRANSMISSION LINE AND INTEGRATED INTERCONNECTION MODELLING
G.FERRI, F.ANTONINI
Collaborations: UNIV. LA SAPIENZA
5) MICROWAVE AND MILLIMETRE-WAVE NONLINEAR DEVICES AND CIRCUITS
G.LEUZZI, F.DI PAOLO, F.FELICIANGELI, F.MANCINI, S.RICCI,
G.ORENGO, A.SERINO, A.CIDRONALI, D.SCHREURS
Collaborations: UNIV. TOR VERGATA, UNIV. FIRENZE, UNIV. LEUVEN, THALES
Other sources of funding: MURST 60%, ASI
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LOW VOLTAGE LOW POWER ANALOG INTEGRATED CIRCUIT DESIGN
G.FERRI, N.GUERRINI, V.STORNELLI, A. DE MARCELLIS, F.MANCINI, S.RICCI, F.FELICIANGELI
The design of analog circuits with low power consumption is gaining more and more importance
in modern communication and multimedia equipment. This is due to the increasing integration
capability of the VLSI technology and the diffusion of the battery-operated systems for computer
and telecommunication products, which requires the reduction of the device weight and size and the
increasing of their operative life. Research in analog circuit design is going in the direction of low
voltage low power structures working in battery-operated portable equipment, communications,
sensors, hearing heads and towards smaller devices with lower threshold and breakdown voltages
with a consequent reduction of the power consumption. In this area, a novel fully differential buffer
topology for low-voltage low-power applications has been implemented [1].
[1] - G.Ferri, N.Guerrini, M.Sperini: Novel low-voltage low-power fully differential buffer- SPIEMicrotechnologies for the new Millennium, 2005, Sevilla (Spain), 9-11 May 2005.
CURRENT-MODE ANALOG CIRCUIT DESIGN
G.FERRI, N.GUERRINI, N. DIQUAL, V.STORNELLI, A. DE MARCELLIS, F.MANCINI, S.RICCI, F.FELICIANGELI
The current-mode approach is characterized by signals as typically processed in the current
domain. Current-mode circuits have some recognized advantages : firstly, they do not require
a high voltage gain, so high performance amplifiers are not needed. Then, they do not need
high precision passive components, so they can be designed almost entirely with transistors. This
makes the current-mode circuits compatible with typical digital processes. Finally, they have high
performance in terms of speed, bandwidth and accuracy. In this sense, a novel current-mode
very low-power analog CMOS four quadrant multiplier for neural network applications has been
designed and fabricated, in collaboration with University of Genova [1]. The second generation
current conveyor (CCII) is the basic current-mode block; in fact, it can be implemented in analog
circuit design using a like-OA approach ; it also represents an effective alternative to the same OA
for the analog designers, also for low-voltage low-power applications. Through this element it has
been possible to simulate the behavior of passive components such as high-valued capacitances and
inductors, the latter developed for mechanical oscillation control [2]. A novel CCII-based singleended to differential converter has been also developed [3]. Finally, the current-mode approach has
been considered and applied in sensor interface. In particular, a quasi-ideal CCII has been designed
and utilized with success in a resistive sensor interface [4].
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[1] - M.Gravati, M.Valle, G.Ferri, N.Guerrini, L.Reyes: A novel current-mode very low power
analog CMOS four quadrant multiplier, ESSCIRC, Grenoble, Sept. 2005.
[2] - G.Ferri, N.Guerrini: CCII-based inductance simulators for mechanical oscillation controlSPIE-Microtechnologies for the new Millennium, 2005, Sevilla (Spain), 9-11 May 2005.
[3] - F. Centurelli, M. Diqual, G. Ferri, N. Guerrini, G. Scotti, A.Trifiletti, A novel dual-output
CCII-based single-ended to differential converter - Analog Integrated Circuits and Signal Processing, vol.43, n.1, April 2005, pp.87-90.
[4] - G.Ferri, V.Stornelli, M. Fragnoli: An integrated improved CCII topology for resistive sensor
application, Analog Integrated Circuits and Signal Processing, accepted for publication.
INTEGRATED CIRCUITS FOR SENSOR APPLICATIONS
G.FERRI, N.GUERRINI, V.STORNELLI, A. DE MARCELLIS, S. DEL RE, F.MANCINI, S.RICCI, F.FELICIANGELI
Integrated circuit technology has recently pushed towards the fabrication of devices and systems
operating at low supply voltages with reduced consumption. Low voltage low power structures can
be used in sensors and microsystems and mixed A/D electronics are becoming more and more
important of sensors, especially in the direction of combining standard IC processes, the sensing
elements and the processing electronics on one chip to realize smart sensors. In this sense, CMOS
has been proved to be the main sensor technology, because it matches the reduction of costs and
the simplicity of designing low voltage low power interfaces. In this area an interesting activity
on sensor interface is related to a PRIN project concerning the development of a temperature
control system for integrated resistive gas sensor arrays [1-5]. Moreover, we have developed, in
collaboration with the University of Brescia, a novel interface for wide-range resistive variations
which has been validated using WO3-based gas sensors [6]. Finally, a novel sigma-delta thermal
modulation has been utilized in hot wire anemometers [7]. This last research is in collaboration
with University of Tor Vergata.
[1] - G.Ferri, V. Stornelli: A High Precision Temperature Control System for CMOS Integrated
Wide Range Resistive Gas Sensors, Analog Integrated Circuits and Signal Processing, accepted for
publication.
[2] - G.Ferri, N.Guerrini: A temperature control system for integrated resistive gas sensor arrays
- SPIE-Microtechnologies for the new Millennium, 2005, Sevilla (Spain), 9-11 May 2005. [3] G.Ferri, N. Guerrini, V. Stornelli, C.Catalani: A Novel CMOS temperature control system for
resistive gas sensor arrays, ECCTD 2005, Cork, August 2005.
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[4] - G.Ferri, N.Guerrini: A novel temperature integrated control system for resistive gas sensorsAISEM (Associazione Italiana Sensori e Microsistemi) Conference - Florence, Febr. 2005, published in the proceedings of the conference : G.Ferri, C.Catalani, N.Guerrini, V.Stornelli: A novel
temperature integrated control system for resistive gas sensors.
[5] - G.Ferri et al.: High performance blocks for a large dynamic range sensor - a PRIN projectAISEM (Associazione Italiana Sensori e Microsistemi) Conference- Florence, Febr. 2005.
[6] - C.Cantalini, G.Ferri, N.Guerrini, S.Santucci : Integrated CMOS interface for wide-range
resistive gas sensors, Proc. Eurosensors XIX, Barcelona, 11-14 Sept. 2005.
[7] - C.Falconi, E.Zampetti, S. Pantalei, E.Martinelli, C. Di Natale, C.Catalani, G.Ferri, A. DAmico
: Thermal sigma-delta modulation for hot wire anemometers, Annual Meeting Gruppo Elettronica
(GE), G.Naxos, June 2005.
TRANSMISSION LINE AND INTEGRATED INTERCONNECTION
MODELLING
G.FERRI, G.ANTONINI
As signal frequencies enter the GHz range, the interconnect effects such as delay, cross-talk and
ringing become dominant factors. In this range, distributed transmission line models are necessary
and is fundamental the generation of accurate but simple models. Transmission lines and integrated
interconnections have been modeled by a cascade of lumped element equivalent circuits, e.g. half-T
ladder networks, which have been largely analyzed and a new model for electrical characterization
has been also developed. Based on this theory, we have proposed a novel approach to the study of
transmission lines and integrated interconnections based on ladder network representation [1-2].
[1] - Ladder network modelling for closed-form interconnect time delay determination, ECCTD
2005, Cork, August 2005.
[2] - G.Antonini, G.Ferri: A ladder network based model for couplet interconnects delay determination, IEE Proceedings - Science, Measurements and Technology, accepted for publication.
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MICROWAVE AND MILLIMETRE-WAVE NONLINEAR DEVICES AND
CIRCUITS
G.LEUZZI, F.DI PAOLO, F.GIANNINI, G.ORENGO, A.SERINO
A.CIDRONALI, D.SCHREURS
Nonlinear circuits at microwave and millimetre-wave frequencies are widely used in modern
electronics for very many applications, from communications to sensors. However, several issues
are still open in the field of nonlinear modelling and design, that still require investigation. The
activities of this group are mainly concerned with modelling and characterisation of nonlinear
active devices on one hand, and on advanced design methods for nonlinear circuits on the other
hand, with special attention to stability. Both physical modelling and empirical characterisation
of active devices at microwave and millimetre-wave frequencies are performed. For the first issue,
Boltzmann’s transport equations are solved in the semiconductor together with Poisson’s equation
in order to predict the electrical behaviour of the active semiconductor region. The equations
are solved by means of an innovative ’Spectral Balance’ scheme, that allows the direct inclusion of
parameter dispersion within the equations. Results are very promising, indicating a good agreement
with measured data, and reasonable computing time. For the second issue, DC and small-signal
parameters are used for a variant of the standard cold-hot FET extraction technique of non-linear
equivalent-circuit. A technique for the correction of low-frequency dispersive effects in multi-bias
small-signal measurements has been developed. Both neural networks and fuzzy-logic approach
have been used for accurate modelling of the nonlinear device. Together, both approaches (physical
modelling and empirical characterisation) converge in providing a better insight and confidence in
the performances of nonlinear active devices at very high frequencies. On the side of nonlinear
circuit design, advanced design techniques for the determination of the stability of a nonlinear
circuit are developed. An original technique based on the classical Conversion Matrix has been
developed for the design (not only analysis) of stable or intentionally unstable nonlinear circuits
(e.g. frequency dividers); the Conversion Matrix formulation has been also extended to the case
of frequency division by two, not allowed by the classical expression. This Harmonic-balanced
based technique extends the standard linear-circuit stability approach to nonlinear ones, allowing
the design of stable circuits even in strongly nonlinear conditions, or the synthesis of bifurcations
if required. The method is being tested on already demonstrated circuits, and correctly detects
instabilities. Results are very promising, and a comparison with other methods at international
level is planned.
[1] G.Leuzzi, ”Small- and large-signal models and algorithms for nonlinear circuit analysis”, Short
Course on ’Fundamentals of microwave power amplifier design’, Gallium Arsenide Applications
Symposium 2005, Paris, Oct. 2005
[2] F.Di Paolo, G.Leuzzi, ’Bifurcation synthesis through conversion-matrix approach’, Proc. Workshop on’ Practical applications of stability analysis, bifurcation and chaos’, Gallium Arsenide Applications Symposium 2005, Paris, Oct. 2005
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[3] G.Leuzzi, ’Accurate characterisation of frequency-conversion phenomena in nonlinear circuits’,
Proc. Workshop on ’Front-end sampler technology’ (TARGET Tutorial), Gallium Arsenide Applications Symposium 2005, Paris, Oct. 2005
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Ingegneria dell’Innovazione
Research topics
1) ANALOG FILTERS FOR WIRELESS RECONFIGURABLE TERMINALS
S. D’Amico, M. De Matteis, V. Giannini, A. Baschirotto
Collaborations: Univ. of Pavia, Polythechnic of Bari, STMicroelectronics, IMEC-Belgium
Other sources of funding: FIRB-2002
2) SENSORS AND SENSOR INTERFACES
A. Baschirotto, S. Capone, C. Distante, A. Leone, L, My, M. Prato, P. Siciliano
Collaborations: Universita’ di Pavia, Universita’ di Roma2, itc-IRST (Trento)
Other sources of funding: PRIN2003, PRIN2005
3) READ-OUT CHANNELS FOR HIGH-ENERGY PHYSICS EXPERIMENTS
R. Assiro, A. Corvaglia, G. Bray, P. Creti, M. Panareo, C. Pinto
Collaborations: Progetto ARGO e Progetto MEG
4) QUANTUM PHOTONIC DEVICES
M. De Vittorio, T. Stomeo, V. Errico, M.T. Todaro, L.Martiradonna
Collaborations: INFM
Other sources of funding: Agilent Technologies TTC, FIRB
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ANALOG FILTERS FOR WIRELESS RECONFIGURABLE TERMINALS
S. D’Amico, M. De Matteis, V. Giannini, A. Baschirotto
Several solutions for the realization of active filters to be embedded in recently developed telecom transceivers have been developed. A low-power reconfigurable analog baseband block for
UMTS/WLAN transmitters has been designed. The low-power performance is guaranteed by the
innovative architecture that allows to directly connect the output DAC current with the reconstruction analog filter. The DAC and the baseband filter, have been designed in a 0.13m CMOS
technology with a power supply limited to 1.2V. The current consumption, has been optimized for
the selected UMTS or WLAN standard and it equal to 7.9mA and 10mA, respectively. A highly
integrated low-power analog filter in 0.13m CMOS able to be reconfigured in order to be used in
UMTS and WLAN applications has been developed. The 4th order low-pass continuous-time filter
is embedded in the receiver path. The filter is made up by the cascade of two Active Gm-RC
low-pass biquadratic cells. The use of Active Gm-RC cells guarantees low power performance since
they use low fu opamps. Thus, it presents low cost and low power characteristics. In fact, a little
area overhead is required since the filter can share capacitors as well as opamps in both operations
modes. Low-power CMOS continuous-time Gm-C filter structures to be used in Ultra-Wide-Band
receivers have been investigated. The filters present a compact structure, in which only one current
branch for each side of the differential structure is present. In addition the filters exhibit other
characteristics as the absence of parasitic poles and CMFB circuit, which allows reducing power
consumption. A very low power filter for WLAN receivers has been implemented. The filter is
based on a Gm-C biquad cell that exploit a positive feedback in order to synthesize complex poles.
The cell can be intended as a composite source follower. As for the source follower the cell present
an high linearity which improves by decreasing the overdrive. This conclusion, which is in contrast with the behaviour of the conventional Gm-C structures, is the main reason of the low power
consumption.
[1] A. Di Giandomenico, F. Corsi, G. Matarrese, C. Marzocca, A. Baschirotto, S. D’Amico”
Method and apparatus for tuning a filter”, USA patent (issued) - 6,965,275 - 15/11/2005. [2]
A. Baschirotto, S. D’Amico, P. Malcovati ”Low-Voltage, Low-Power Basic Circuits”, a chapter
of the book titled ”Analog Circuit Design, edited by M. Staeyert, A. H.M. van Roermund, J.
H. Huijsing, 2006 Springer, pp. 291-329. [3] S. D’Amico and A. Baschirotto ”Active Gm-RC
Continuous-Time Biquadratic Cells”, Analog Integrated Circuits and Signal Processing, Kluwer
Academic Publishers, November 2005, Vo. 45, No.3 , pp. 1-14. [4] S. D’Amico, V. Giannini and
A. Baschirotto ”A Low-Power Reconfigurable Analog Filter for UMTS/WLAN Receivers”, Analog
Integrated Circuits and Signal Processing, Kluwer Academic Publishers, January 2006, Vo. 46, No.
1, pp.65-72. [5] N. Ghittori, A. Vigna, P. Malcovati, S. D’Amico and A. Baschirotto ”Design tradeoffs for UMTS transmitters baseband blocks”, IEEE ISCAS 2005, Kobe (Japan). [6] N. Ghittori,
A. Vigna, P. Malcovati, S. D’Amico and A. Baschirotto ”A low-distortion 1.2 V DAC+Filter for
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transmitters in wireless applications”, IEEE ISCAS 2005, Kobe (Japan). [7] A. Baschirotto, S.
D’Amico, P. Malcovati ”Low-Voltage, Low-Power Basic Circuits”, AACD 2005, Limerick (Ireland).
[8] N. Ghittori, A. Vigna, P. Malcovati, S. D’Amico, A. Baschirotto ”A low-power, low-voltage
(11mW/8.4mW, 1.2V) DAC+filter for multistandard (WLAN/UMTS) transmitters”, VLSI 2005,
Kyoto (Japan). [9] S. D’Amico, T. Grassi, J. Ryckaert, A. Baschirotto ”A up to 1GHz low-power
continuous-time 3rd-order filter+integrator chain for Wireless Body-Area Network receivers”, IEEE
Prime 2005, Lausanne (Switzerland). [10] S. D’Amico, V. Chironi, A. Baschirotto ”A 0.13m CMOS
VGA for Multistandard Receivers”, IEEE Prime 2005, Lausanne (Switzerland). [11] M. De Matteis,
S. D’Amico, A. Baschirotto ”A 600mV 1.32mW 75dB-DR 4th-order Baseband Analog Filter for
UMTS Receivers”, IEEE Prime 2005, Lausanne (Switzerland). [12] N. Ghittori, A. Vigna, P.
Malcovati, S. D’Amico, A. Baschirotto ”A 1.2V, 30.4dBm OIP3 Reconfigurable DAC System for
Multistandard Terminals”, IEEE Prime 2005, Lausanne (Switzerland). [13] G. Matarrese, C.
Marzocca, S. D’Amico, F. Corsi, A. Baschirotto ”On chip self-tuning of high performance filters
via pseudo-random input test signal”, IEEE IMST 2005, Cannes (France). [14] S. D’Amico,
V. Giannini, A. Baschirotto ”A 4th-order Active-gm-RC low-power reconfigurable analog filter
for UMTS/WLAN receivers”, ESSCIRC 2005, Grenoble (France) [15] N. Ghittori, A. Vigna,
Piero Malcovati, S. D’Amico, A. Baschirotto ”Design of a low- power variable gain amplifier for
reconfigurable wireless receivers” ICECS 2005, Gammarth, Tunisia.
SENSORS AND SENSOR INTERFACES
A. Baschirotto, S. Capone, C. Distante, A. Leone, L, My, M. Prato, P. Siciliano
The activity deals with the development of sensors and sensor interfaces of different kinds.
Founded by a PRIN03 project entitled ”Portable system for ambient gas monitoring with smart
A/D front-end improving sensors resolution and accuracy” miniaturized gas sensor and dedicated
IC interfaces have been developed. Si-micromachined substrates and, on top of them, realization by
means of the sol-gel technique of SnO2 gas sensor array for the detection of carbon monoxide (CO),
nitrogen oxides (NOx), and ozone (O3) with high resolution have been developed. In addition,
for this kind of resistive gas sensors, a high precision wide range electronic front-end has been
designed. A flexible continuous time trans-resistance stage is followed by a switched capacitor
incremental ADC. A smart DSP allows to reconfigure the front-end in order to achieve a resolution
of 0.1Finally, single-axis and dual-axis fluxgate magnetic sensors realized using printed circuit board
(PCB) technology have been developed. The behavior of the fluxgate device was analyzed with
software tools based on the finite element method. The results of the simulations were validated
experimentally on fabricated prototypes. The magnetic sensitivity of proposed planar sensing
element is about 0.46 mV/uT at 10 kHz and 700 mA current excitation. This experience has been
useful to realize a similar device on top of an Integrated circuits [8-10].
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[1] M Grassi, P. Malcovati, A. Baschirotto, ”A high-precision wide-range front-end for resistive
gas sensors arrays”, Sensors and Actuators B: Chemical (special issue for Eurosensors XVIII), B
111-112 (2005) 281-285, Elsevier [2] M. Grassi, P. Malcovati, G. De Iaco, A. Baschirotto, ”An
integrated wide-range resistance-to-time converter with decoupled oscillator”, National Conference
on Sensor and Microsystems (AISEM 2005), Firenze, February, 15-17, 2005 [3] A. Baschirotto, M.
Grassi, P. Malcovati, C. Di Natale, E. Martinelli, G. Ferri, N. Guerrini, L. Francioso, S.Capone,
M. Prato, P. Siciliano, ”High-performance blocks for a large dynamic range gas sensor - A PRIN
Project”, National Conference on Sensor and Microsystems (AISEM 2005), Firenze, February,
15-17, 2005 [4] M. Grassi, P. Malcovati, A. Baschirotto, ”Flexible High-Accuracy Wide-Range
Gas Sensor Interface for Portable Environmental Nosing Purpose”, International Symposium on
Circuits and Systems (ISCAS 05), Kobe, Japan, May 23-26, 2005, pp. 5385-5388 [5] M. Malfatti, M.
Perenzoni, N. Viarani, A. Simoni, L. Lorenzelli, A. Baschirotto, ”A complete front-end system readout and temperature control for resistive gas sensor array”, European Conference on Circuit Theory
and Design (ECCTD2005), University College Cork, Ireland, 29 August - 1 September, 2005, pp.
III/31-III/34 [6] M. Grassi, P. Malcovati, and A. Baschirotto, ”A 0.1[7] P. Malcovati, M. Grassi,
F. Borghetti, V. Ferragina, A. Baschirotto , ”Design and Characterization of a 5-Decade Range
Integrated Resistive Gas Sensor Interface with 13-Bit A/D Converter”, IEEE Sensors 2005, pp. 472475 [8] A. Baschirotto, E. Dallago, P. Malcovati, M. Marchesi, G. Venchi, ”Micro-integrated double
axis planar fluxgate”, National Conference on Sensor and Microsystems (AISEM 2005), Firenze,
February, 15-17, 2005 [9] A. Baschirotto, E. Dallago, P. Malcovati, M. Marchesi, G. Venchi, ”From
a PCB Fluxgate to an integrated micro Fluxgate magnetic sensor”, IEEE Instrumentation and
Measurement Technology Conference (IMTC 2005), Ottawa, May, 17-19, 2005, pp. 1756-1760 [10]
A. Baschirotto, E. Dallago, P. Malcovati, M. Marchesi, G. Venchi, ” Fluxgate magnetic sensor and
front-end circuitry in a micro-integrated system”, EUROSENSOR 2005 - Barcellona (Spain) - Sept.
2005
READ-OUT CHANNELS FOR HIGH-ENERGY PHYSICS EXPERIMENTS
R. Assiro, G. Bray, P. Creti, M. Panareo, C. Pinto
During the year 2005 the group continued the activities previously started. In the ARGO-YBJ
experiment (study of cosmic gamma radiation with energy greater than 100 GeV and detections of
gamma rays bursts at the Yangbajing Cosmic Ray Laboratory of Lhasa, Tibet-China) continued
the installation of the local trigger unities (Local Station) and it will complete at the end of
2006; moreover it was completed the developing of the interface between the Local Station and
the analogical readout frontend. In the MEG experiment (identification of the muon into electron
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plus gamma decay with branching ratio of 10− 14 at PSI accelerator of Zurich-Switzerland) it was
completed the design of the frontend electronics of the liquid Xe calorimeter and it was built a
double eurocard 16 channels card, moreover it was verify the possibility to use high density twisted
flat cable for analogical signals transmission with low crosstalk contribute (¡1Panareo coordinate
the project EEE (Extreme Energy Events) for south east Italy, which plan the constructions of
a network of cosmic ray detectors based on RPC, for large area cosmic shower detection. These
detectors will be located in the high school buildings. In this experiment the group is developing
the time tagging system for this experiment based on GPS technology.
[1] S. Mastroianni et al., (ARGO-YBJ Collaboration), ”The trigger system of the ARGO-YBJ
detector”, IEEE Trans Nucl. Sci, 51 (2004) 1835-1839
[2] R. Assiro et al., (ARGO-YBJ Collaboration), ”Local Station: The data read-out basic unit for
the ARGO-YBJ experiment”, IEEE Trans Nucl. Sci, 51 (2004) 1835-1839
2006
QUANTUM PHOTONIC DEVICES
M. De Vittorio, T. Stomeo, V. Errico, M.T. Todaro, L.Martiradonna
This activity is devoted to the design and fabrication of photonic devices based on quantum
electronic nanostructures (quantum dots, quantum wires and quantum wells) and quantum photonic nanostructures based on photonic crystal technology. The application of quantum dots (QD)
as active material in optical devices has attracted much attention, due to the potential advantages
offered by three-dimensionally confined systems and their discretized electronic density of states.
Fabrication of long wavelength InGaAs/GaAs quantum dot (QD) photonic devices is a promising
way to extend the optical emission range of GaAs-based optoelectronic devices up to 1.3 microns
for application to short-range telecommunications. The use of quantum dots as active medium
in heterostructure lasers, grown by the self-assembling Stranski-Krastanov technique, leads to the
realization of photonic devices with low threshold, high material and differential gain, high characteristic temperature and tenability, operating in the low absorption windows of optical fibers (1310
nm and 1550 nm). Quantum electronic properties of QDs are exploited in this research activity
for the design and fabrication of resonant cavity LEDs (RCLED), vertical cavity surface-emitting
lasers (VCSEL), in-plane lasers and single QD/single photon sources embedding self-organized
In(Ga)As/GaAs quantum dots (QDs) grown by both MBE and MOCVD and emitting at about
1300 nm. Moreover, this research line is also devoted to the design and fabrication of ultra-compact
quantum photonic devices based on two-dimensional photonic crystal (2D-PC) technology. Photonic crystals (PC) are promising systems to tailor the propagation of light and to control the
spontaneous and stimulated emission of light-emitting devices. PC technology will enable applications such as compact filters, sharply bent waveguides or highly efficient light-emitting devices. To
this aim the nanotechnology group at University of Lecce is exploiting the available technologies
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(electron beam lithography, epitaxial and dielectric deposition and deep etching) to the fabrication
of 2D-PC planar devices.
[1] L. Martiradonna, M. De Vittorio, L. Troisi, M. T. Todaro, M. Mazzeo, T. Stomeo, M. Anni,
R. Cingolani and G. Gigli, Fabrication of hybrid organic-inorganic microcavities through imprint
lithography Microelect. Engin., 78-79, 593-597, 2005. [2] M. De Vittorio, M.DeGiorgi, M.T.Todaro,
V.Tasco, L. Martiradonna, A.Passaseo, R.Cingolani, High-efficiency quantum dot microcavity light
emitting device operating ad 1.3 um, Proceedings of 2004 6th International Conference on Transparent Optical Networks (IEEE Cat. No.04EX804), 2004, pt. 1, p 302-5 vol.1. [3] S. Cabrini, E.
Di Fabrizio, A. Carpentiero, L. Businaro, P. Candeloro, C. Andreani, M. De Vittorio, T. Stomeo,
Focused Ion Beam Lithography for two dimensional array for photonic applications,Microelect.
Engin., v.78-79, p.11-15, 2005 [4] T. Stomeo, G. Visimberga, M. T. Todaro, A. Passaseo, R.
Cingolani, M. De Vittorio, S. Cabrini, A. Carpentiero and E. Di Fabrizio, Rapid prototyping of
two dimensional photonic crystal devices by a dual beam focused ion beam system, Microelect.
Engin., v.78-79, p.417, 2005. [5] M. De Vittorio, M.T. Todaro, M. Mazzeo, L. Martiradonna, T.
Stomeo, M. Anni, R. Cingolani, and G. Gigli, Imprint Lithography as a Tool for the Fabrication
of Organic-Inorganic Vertical Microcavities, 2004 4th IEEE Conference on Nanotechnology (IEEE
Cat. No.04TH8757), 2004, p 207-9. [6] T. Stomeo, R. Cingolani, M. De Vittorio, A. D’Orazio, D. de
Ceglia and V. Marrocco, Silica glass bend waveguides assisted by two-dimensional Photonic Crystals, Optical and Quantum Electronics, v37, p.229, 2005. [7] M.T.Todaro, V.Tasco, M.De Giorgi,
L.Martiradonna, G.Rain, M.De Vittorio, A.Passaseo and R.Cingolani, High-efficiency 1.3 um InGaAs/GaAs quantum-dot microcavity light-emitting diodes grown by metalorganic chemical vapor
deposition, Appl. Phys. Lett., Vol. 86, 151118, 2005 [8] T.Stomeo, R.Bergamo, L.Martiradonna,
R.Cingolani, M.De Vittorio, A.D’Orazio, V.Marrocco, Fabrication of high efficiency compact 90
bend waveguide by using a dielectric 2D-PC structure, Proc. of SPIE, Vol. 5840, 118, 2005. [9]
L.Martiradonna, L.Carbone, M.De Giorgi, T.Stomeo, M.T. Todaro, M.Anni, L.Manna, G.Gigli,
R.Cingolani, M.De Vittorio, Tailoring the emission spectrum of colloidal nanocrystals by means of
lithographically-imprinted hybrid vertical microcavities, Proc. of SPIE, Vol. 5840, 168, 2005. [10]
V.Tasco, M.De Vittorio et al., Improved performances of 1.3 um InGaAs QD structures grown at
high temperature by MOCVD, Microelectronics Journal, 36, n.3-6, p.180-2, 2005.
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MESSINA
Dipartimento di Fisica della Materia e Tecnologie Fisiche Avanzate
Research topics
1) TEMPERATURE-DEPENDENT CHARACTERIZATION OF MICROWAVE
LOW-NOISE TRANSISTORS AND CIRCUITS
A. Caddemi, N. Donato
Collaborations: Istituto di Radioastronomia CNR-INAF (Noto,Italy), Università di Roma Tor
Vergata, Università di Palermo, Infineon Technologies (Monaco, DE), Ericsson Lab Italy (Vimodrone,Italy), Selex Communications (Catania, Italy)
Other sources of funding: CNR,Selex Communications SpA
2) CIRCUIT MODEL EXTRACTION TECHNIQUES FOR SMALL-SIGNAL MICROWAVE TRANSISTORS
A. Caddemi, N. Donato, G. Crupi, F. Catalfamo
Collaborations: University of Nis (Nis, Yugoslavia), Dipartimento di Matematica - Università di
Messina
Other sources of funding: Selex Communications SpA
3) ELECTRICAL CHARACTERIZATION AND MODELING OF THIN-FILM SENSORS
Collaborations: Dipartimento di Chimica Industriale e Ingegneria dei Materiali– Università di
Messina, Centro Interdipartimentale di Ricerca “E. Piaggio” – Università di Pisa
Other sources of funding: CNR
4) CIRCUITS AND SYSTEMS FOR ADVANCED INTEGRATED CIRCUITS
C. Ciofi, M. Castano, G. Scandurra, R. Merlino
Collaborations: Dipartimento di Ingegneria dell’Informazione – University of Pisa, ST Microelectronics
Other sources of funding: ST Microelectronics
5) LOW NOISE INSTRUMENTATION
C. Ciofi, G. Scandurra, G. Giusi, G. Cannatà
Collaborations: Dipartimento di Ingegneria dell’Informazione – University of Pisa, Dipartimento di
Elettronica, Informatica e Sistemistica – University of Calabria, Paul Scherrer Institut – Switzerland
Other sources of funding:
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TEMPERATURE-DEPENDENT CHARACTERIZATION OF MICROWAVE
LOW-NOISE TRANSISTORS AND CIRCUITS
The sensitivity of the performance of microwave low-noise devices and circuits vs. temperature
is a crucial point both for reliability studies and for the analysis of noise and electron transport
properties in sub-micrometric gate devices. We employ a proprietary designed thermal chuck for
on wafer devices tested down to moderately low temperatures. A closed-cycle liquid-He cryogenic
chamber has been realized and optimized in our lab to test packaged devices and circuits down to 20
K. By means of these systems, we have performed extensive analysis of DC and microwave properties
of several high electron mobility devices (HEMT). Soft breakdown and self-heating phenomena have
been deeply investigated by measuring the I-V characteristics as a function of temperature and the
scattering parameters over a broad range of frequencies. We also have designed and characterized
several types of advanced L-band and X-band planar filters for telecommunications applications
whose performance have been optimized according to industry party’s request.
[1] M. Alvaro, A. Caddemi, G. Crupi, N. Donato, “Temperature and bias investigation of selfheating effect and threshold voltage shift in pHEMT’s”, Microelectronics Journal,Vol. 36, pp.
732-736, 2005.
[2] A. Caddemi, F. Catalfamo, G. Crupi, N. Donato , “Tecniche di caratterizzazione criogenica
per componenti di LNA in applicazioni avanzate alle iperfrequenze”, Atti della XI Giornata di
Studio sull’Ingegneria delle Microonde “Tecnologie Elettroniche ed Elettromagnetiche nello Spazio”,
Orvieto, Apr. 12-16, 2005. (also to appear on Quaderni della Societ Italiana di Elettromagnetismo,
2006)
[3] A. Caddemi, G. Crupi, N. Donato, “On the soft breakdown phenomenon in AlGaAs/InGaAs
HEMT: an experimental study down to cryogenic temperatures”, Solid State Electronics, Vol.49,
N.6, pp. 928-934, 2005. [4] F. Principato, A. Caddemi, G. Ferrante, “Experimental investigation
of the Kink effect and the low frequency noise properties in pseudomorphic HEMT’s”, Solid State
Electronics, Vol.49, N.6, pp. 915-922, 2005. [5] A. Caddemi, G. Crupi, N. Donato, “Impact of the
self generated heat on the scalability of HEMT’s”, Microelectronic Engineering, Vol.82, pp.143-147,
2005.
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CIRCUIT MODEL EXTRACTION TECHNIQUES FOR SMALL-SIGNAL
MICROWAVE TRANSISTORS
A. Caddemi, N. Donato, F. Catalfamo, G. Crupi
The techniques concerning the modelling activity consists of the development and implementation of several equivalent circuit extraction approaches based on:
a) direct extraction by pinched, cold and hot bias measurements on HEMT’s;
b) use of artificial neural networks (ANN) for the simulation of small-signal and noise parameters
c) use of genetic algorithms (GA) for the simulation of noise parameters
The above cited procedures have been tested vs. bias conditions and operating temperature
with very good results. Thus , the behavior of each circuit element as a function of such variables
has been extracted and analyzed to check the consistency of the methods. Cross-comparisons
among the results are also performed on a regular basis. The most recent application concerns an
extensive activity of model extraction for on wafer GaN HEMT’s (0.2 µ m length,100 µ m width
T-shaped gate) made at TELEMIC-ESAT (K.U. Leuven, Belgium) with very good results over
the very broad frequency range from 0.045 up to 50 GHz and at 275 different bias points (0 V
¡ Vd s ¡ 10 V, -10 ¡ Vg s ¡ 2 V). The behaviour of the intrinsic elements extracted has shown to
match quite satisfactorily the theoretical, physical expectations. The determination of the noise
parameters of HEMT’s vs. temperature by different neural network approaches has been extensively
investigated: we focused on extracting either the circuit element and the noise temperature values
to be employed in a computer-aided simulation, and the four noise parameters directly by giving
as ANN inputs the scattering parameters, one frequency value and one noise figure value. The
results obtained have been characterized by very good generalization performance. Use of ANN
techniques has also demonstrated to lead to accurate performance in the simulation of planar passive
microwave components such as via holes, spiral inductors and microstrip filters. More recently, we
have exploited also genetic algorithm techniques to model the noise parameters of HEMT’s vs.
frequency and temperature with preliminary interesting results.
[1] A. Caddemi, F. Catalfamo, N. Donato, “Simulating noise performance of advanced devices
down to cryogenic temperatures”, AIP Conf. Proc. 800, (Fourth International Conference on
Unsolved Problems of Noise - UPoN 2005), pp. 480-485, June 2005.
[2] A. Caddemi, F. Catalfamo, N. Donato, “Cryogenic HEMT Noise Modeling by Artificial Neural
Networks”, Fluctuations and Noise Letters, Vol.5, N.3, pp. L423-L433, 2005.
[3] A. Caddemi, F. Catalfamo, N. Donato, “Artificial Neural Network-based Procedure For Cryogenic Microwave Noise Characterization Of HEMT’s”, Proceedings of the IEEE International Conference on Computational Intelligence for Measurement Systems and Applications - CIMSA 2005,
pp. 285-289, Taormina, July 2005.
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[4] A. Caddemi, G. Crupi, N. Donato, “Microwave characterization and modelling of packaged
HEMT’s by a direct extraction procedure down to 30 K”, IEEE Transaction on Instrumentation
and Measurement, Vol. IM-55, pp. 465-470, Apr. 2006.
ELECTRICAL CHARACTERIZATION AND MODELING OF THIN-FILM
SENSORS
In collaboration with the Interdepartmental Research Center, “E. Piaggio” of the University of
Pisa, a system for a complete characterization of gas sensing materials is developed at the Department of Materials Engineering of the University of Messina. An array of mass flow controllers and
a radially symmetric stainless steel measurement chamber allow us to expose sensors to controlled
gas mixtures at different levels of humidity. The measurement chamber was designed to obtain an
homogeneous flow without significant recirculating zones or stagnant volumes and to guarantee all
sensors to be exposed at any time to the same conditions. A dedicated sensor holder avoids the
need of microbonding procedures, realizing an easy mounting and a stable electrical contact with
the sensor tracks and the platinum resistor embedded into the sensor support. A mainframe Agilent
34970 and a Lock-In amplifier SR830 Stanford Research perform sensor resistance and impedance
measurements. The temperature of each sensor is independently controlled in the range 30 C 500 C by means of two Agilent 3631A power supplies and a PID control loop. After a complete
characterization of the resistance-temperature calibration curves, we can use the platinum resistors
also as temperature sensors. The experimental set-up is fully automated by a dedicated software
developed in Labview 7 environment. Fe2 O3 thin films loaded with a variable Li-, Zn- and Aucontent are prepared and deposited on alumina substrates by a Liquid Phase Deposition (LPD)
process to obtain humidity sensors. A complete electrical characterization is then carried out and
the influence of Li content on the humidity sensing properties is evaluated. In addition, Au-doped
iron oxide thin films grown by LPD on alumina substrates with platinum interdigitated contacts
are prepared to obtain CO sensors since thick films based on coprecipitated powders of Au/Fe
oxide have been reported to have good sensing properties in the detection of CO. Following that,
an analysis of the measured performance and the extraction of an accurate circuit model of the
sensors is performed. Each electrical element of the model is a representation of different parts
of the physical structure of the sensing film. Therefore, the determination of variable-dependent
models (i.e. humidity-, CO-) helps in understanding the sensor performance since it shows the links
between structural and electrical properties. Accurate models have been determined for different
sensor types by a decomposition approach of the tuning procedure and their performance has been
verified as a function of the monitored variable (humidity, CO) with very satisfactory results.
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[1] G. Neri, A. Bonavita, S. Galvagno, N. Donato, A. Caddemi, “Electrical modeling of Fe 2 O3
humidity sensors doped with Li+ , Zn2+ and Au3+ ions”, Sensors and Actuators B, Vol.111-112,
pp. 71-77, 2005.
[2] A. Bonavita, G. Neri, N. Donato, G. Pioggia, D. De Rossi, F. Di Francesco, “Experimental setup for the evalution of gas sensors performance”, Sensors and Microsystem, proceedings of AISEM
2005, World Scientific Publishing (in press).
[3] G. Neri, A. Bonavita, G. Micali, N. Donato, F. A. Deorsola, P. Mossino, I. Amato, B. De
Benedetti, “TGas-sensing properties of SnO2 nanopowders synthesised by gel-combustion”, Proceedings of International Workshop on Advances in Sensors and Interfaces, Bari, Italy, April 2005.
CIRCUITS AND SYSTEMS FOR ADVANCED INTEGRATED CIRCUITS
C. Ciofi, M. Castano, G. Scandurra, R. Merlino
Under this rather broad title, we report a few results that have been obtained into the two
distinct research topics listed below.
Design of RF integrated front-ends
The realization of fully integrated RF front ends represents one of the most important challenges
for the wireless industries, as it would allow a significant cut in the production cost of wireless
devices. Within this research field we have recently exploited the possibility of realizing CMOS
fully integrated high quality inductances based on integrated transformer. By using a novel topology
we have been able to obtain an almost ideal inductance at 2.4 GHz while using a 0.35 µm standard
CMOS technology. Moreover, the circuit allow a significant degree of adjustability that can be
possibly used for compensating process tolerances[1].
Design of asynchronous interconnection systems for STBUS based SoCs
System on Chip (SoC) systems have nowadays reached such a high level of complexity that the
problem of the clock distribution and of the equalization of the delays along the wide interconnection buses has become one of the most important limiting factors for the development of higher
functionalities and performances such as those required for real time image elaboration. As the
classical synchronous approach for data exchange among the IPs present in a SoC becomes more
and more problematic, the possibility of employing asynchronous approaches for data transfer may
become an interesting possible alternative. We have addressed this specific issue in compliance to a
specific request by STMicrolectronics of evaluating the possibility of introducing asynchronous communication channels within the well established STBus interconnect system for SoCs. Our research
has led us to the definition of the asynchronous-decoupler concept and to the design and validation
of a point to point, STBus compliant interconnection bus capable of allowing data transfer in a
delay-insensitive framework between two IPs driven by clock signals uncorrelated to one another. A
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MESSINA
patent application is in progress (US2006041693, publ. date 2006-02-23). We have also developed
a novel architecture for the design of frequency converter blocks to be used in semi-synchronous
and asynchronous contests within SoC interconnection systems. A patent application for this last
result is in progress and it is not published yet.
[1] C. Scandurra, C. Ciofi, D. Zito, “A new topology for transformer based CMOS active inductances”, sl Proceedings of 2005 PHD research in Microelectronics and Electronics, 1,27, 25-28 July
(2005).
LOW NOISE INSTRUMENTATION
C. Ciofi, G. Scandurra, G. Giusi, G. Cannatà
Low frequency noise measurements are among the most sensitive tools for the characterization
of the quality and reliability of electron devices. However, sensible noise measurements can be
easily done only if the background noise of the measurement system is much lower than the noise
generated by the device under test(DUT).
Within this research area we have recently addressed the problem of the realization of ultra
low noise voltage measurement systems and we have developed a novel topology and measurement
procedure that is, in principle, capable of eliminating both the contribution of the equivalent input
voltage noise and of the equivalent input current noise of the employed preamplifiers. The procedure
is rather general and does not require a preliminary characterization of the DUT impedance. A
detailed description of the new method can be found in [1]. We are currently working on the
extension of the new method to the case of current noise measurements.
We have also addressed the issue of the realization of high stability current sources as they are
required in the case of high sensitivity measurements in fundamental nuclear physics experiments.
In collaboration with the Paul Scherrer Institut we have developed a high stability, low noise current
source to be used for experiments on symmetry violation by ultra cold neutrons in highly stable
magnetic fields[2].
[1] F. Crupi, G. Giusi, C. Ciofi, C. Pace, “A novel ultra sensitive method for voltage noise measurements”, Proceedings of Instr. and Meas. Technology Conference, 2, 1190, 16-19 May (2005).
[2] T. Brys, S. Czekaj, M. Daum, P. Fierlinger, D. George, R. Henneck, M. Kasprzak, K. Kirch, M.
Kuniak, G. Kuehne, A. Pichlmaier, A. Siodmok, A. Szelc, L. Tanner, C. Assmann, S. Bechstein, D.
Drung, Th. Schurig, C. Ciofi and B. Neri, “Magnetic field stabilization for magnetically shielded
volumes by external field coils”, Nuclear Instruments and Methods in Physics Rersearch Section
A, 554, 539 (2005).
MILANO (POLITECNICO)
183
Dipartimento di Elettronica e Informazione - Politecnico
Research topics
1) NEW CONCEPTS AND DEVELOPMENTS ON SILICON DETECTORS
A. Castoldi, A.Galimberti, E. Gatti, C. Guazzoni
Collaborations: Brookhaven National Laboratory (NY, USA), Max Planck Institut (Munich),
PNSensor (Munich), Sincrotrone Trieste, University of Siegen (D), University College London (UK)
Other sources of funding: ASI, INFN
2) APPLICATIONS OF SILICON DRIFT DETECTORS IN X-RAY AND GAMMARAY DETECTION
C.Fiorini, A.Gola, C. Guazzoni, A.Longoni
Collaborations: MPI (Munich, Germany), IFCTR-CNR (Milano), TESRE-CNR (Bologna)
3) ELECTRONIC AND OPTOELECTRONIC DEVICES BASED ON ORGANIC
MATERIALS
M. Sampietro, D.Natali, M.Caironi, T.Agostinelli, L.Fumagalli
Collaborations: Glasgow Univ. (England), Technishe Universitat Graz (Austria), Potsdam University (Germany), Universita’ di Cagliari, ISMAC-CNR Milano
Other sources of funding: CNR, MIUR
4) INSTRUMENTATION FOR HIGH-SENSITIVITY MEASUREMENTS ON BIO
AND NANO STRUCTURES
G. Ferrari, M. Sampietro, L.Fumagalli, F.Gozzini, E. Gatti
Collaborations: Universitat de Barcelona (Spagna), Ecole Centrale Lyon (France), CNRS-IFOS
(France), Institut National de la Recherche Scientifique - INRA (France), National Nanotecnology
Lab. INFM-CNR (Lecce)
Other sources of funding: CNR, European Community
5) MICROWAVE-INDUCED TRAPPING ANALYSIS ON MOS TRANSISTORS
G. Ferrari, M. Sampietro, L. Fumagalli
Collaborations: MDM-INFM (Agrate), Universitat de Barcelona (Spagna)
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6) LOW-NOISE VLSI CIRCUITS FOR DETECTORS READOUT
S.Buzzetti, C.Fiorini, C.Guazzoni, A.Longoni, M.Porro
Collaborations: MPI Munich (Germany), Brookhaven Nat. Lab. (USA), TESRE-CNR
Other sources of funding: CNR, ASI, INFN, MIUR
7) SILICON CARBIDE AND GALLIUM ARSENIDE RADIATION DETECTORS
G. Bertuccio, S. Caccia, R. Casiraghi, D. Maiocchi
Collaborations: European Space Agency ESA-ESTEC (NL), Oxford Instruments (Finland), University of Bologna, Firenze, Milano Bicocca, Modena, Perugia, Torino, Selex Integrated Systems
(I)
Other sources of funding: INFN, MIUR
8) LOW-NOISE, LARGE DYNAMIC RANGE, HYBRID/INTEGRATED ELECTRONICS FOR IONISING-RADIATION SENSORS
A. Pullia, G. Bertuccio, S. Riboldi, F. Zocca, S. Caccia, D. Maiocchi, R. Bassini, C. Boiano
Collaborations: Telecontrolli, ASCOM, AMETEK, CAEN
Other sources of funding: INFN
9) INSTRUMENTATION FOR NUCLEAR MEASUREMENTS AND MEDICAL
IMAGING
A. Fazzi, V. Varoli
Collaborations: UE Joint Research Centre (Ispra,I), BNL (NY,USA), UNIBA, UNIPG, UNITS,
INFN LNL e LNS, STMicroelectronics
Other sources of funding: INFN, MIUR Cofin
10) COMPUTER AIDED DYNAMIC ANALYSIS AND DESIGN OF POWER ELECTRONICS SYSTEMS
P. Maranesi, M. Riva, F. Belloni
Collaborations: University of South Carolina, Politecnico di Milano
11) INTEGRATED RESONANT SWITCHING DC/DC CONVERTERS FOR DISTRIBUTED POWER SUPPLY
Collaborations: Universitá degli Studi di Padova, Universitá degli Studi di Cassino, Universitá degli
Studi di Parma
Other sources of funding: COFIN2004
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12) DESIGN OF ANALOG INTEGRATED CIRCUITS FOR COMMUNICATIONS
A. L. Lacaita, C. Samori, S. Levantino, A. Bonfanti, L. Romanò, L. Panseri, A. Tedesco
Other sources of funding: FIRB, COFIN, STMicroelectronics, Ericsson Lab Italy
Collaborations: STMicroelectronics (Catania, Pavia), Ericsson Lab Italy (Vimodrone)
13) CHARACTERIZATION AND MODELING OF SEMICONDUCTOR DEVICES
A. L. Lacaita, A. S. Spinelli, D. Ielmini, C. Monzio Compagnoni, R. Gusmeroli, A. Redaelli, D.
Mantegazza
Collaborations: STMicroelectronics (Agrate, Catania, Crolles-FR), Ovonyx Inc. (Rochester HillsUSA)
14) DIGITAL CONTROL ARCHITECTURES FOR LOW-VOLTAGE, HIGHCURRENT DC/DC CONVERTERS
S. Saggini, G. Garcea, M. Ghioni, A. Geraci
Collaborations: STMicroelectronics, Castelletto
Other sources of funding: STMicroelectronics
15) LARGE-AREA AVALANCHE DIODES FOR PICOSECOND TIME-CORRELATED
PHOTON COUNTING
S. Cova, I. Rech, M. Ghioni, A. Gulinatti
Collaborations: CNR-IMM LAMEL, Bologna, Italy
Other sources of funding: FIRB 2001 - Prot. RBNE01SLRJ
16) HIGH-RATE PHOTON COUNTING AND PICOSECOND TIMING WITH
SILICON-SPAD
S. Cova, I. Rech, A. Gulinatti, M. Ghioni, F. Zappa, I. Labanca
Collaborations: CNR-IMM LAMEL, Bologna, Italy; School of Engineering and Physical Sciences,
Heriot-Watt University, Edinburgh, UK; MicroPhotonDevices, Bolzano, Italy
Other sources of funding: FIRB 2001 - Prot. RBNE01SLRJ
17) SINGLE-PHOTON IMAGING AT 20,000 FRAMES/S
F. Zappa, S. Tisa, A. Gulinatti, S. Cova
Collaborations: Universitá di PISA, Dipartimento di ingegneria dell’informazione, Pisa, Italy; INAF
- Osservatorio Astrofisico di CATANIA, Catania, Italy; ESO European Southern Observatory,
Garching , Germany; MICROGATE S.R.L., Bolzano, Italy;CNR-IMM LAMEL, Bologna, Italy
Other sources of funding: COFIN 03
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18) PHOTON-COUNTING CHIP FOR AVALANCHE DETECTORS
F. Zappa, S. Tisa, A. Gulinatti, A. Gallivanoni, I. Labanca, S. Cova
19) NON-INVASIVE OPTICAL TESTING OF INTEGRATED CIRCUITS
A. Tosi, F. Zappa
Collaborations: IBM T.J. Watson Research Center, Yorktown Heights, NY, USA
Other sources of funding: COFIN 03
20) DESIGN AND CHARACTERIZATION OF INGAAS/INP SINGLE-PHOTON
AVALANCHE DIODE FOR NEAR-INFRARED WAVELENGTHS.
A. Tosi, S. Cova, F. Zappa, M. Ghioni
Collaborations: Princeton Lightwave Inc., Princeton, NJ, USA;Heriot-Watt University, Edinburgh,
UK., SECOQC
21) ADAPTIVE DIGITAL PROCESSING OF PULSES
G. Ripamonti, A. Geraci, R.Abbiati
Collaborations: Sinartis, Galileo Avionica
Other sources of funding: Sinartis, INFN
22) AUTOMATIC TECHNIQUES OF OPTIMAL FILTERS SYNTHESIS
E. Gatti, G. Ripamonti, A. Geraci, R. Abbiati
Other sources of funding: INFN
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NEW CONCEPTS AND DEVELOPMENTS ON SILICON DETECTORS
A.Castoldi, A.Galimberti, E.Gatti, C.Guazzoni
The research activities of the group are devoted to the study, the design and the characterization of new semiconductor detectors (X and gamma rays or high-energy particles) featuring
state-of-the-art performances in terms of position, energy and time sensitivity.
Progress is made in the development of the Controlled-Drift Detector (CDD), a photon counting
X-ray imager featuring excellent energy and time resolution proposed by this group in 1997, whose
basic feature is the transport of the charge packets stored in each pixel to the output electrode by
means of a uniform drift field. The drift time of the charge packet identifies the pixel of incidence.
Operated either in integrate-readout mode or in free-running the CDD is inherently faster than the
Charge-Coupled Device, based on the clocked transfer of the rows of pixels towards the readout
section. The frame frequency in the CDD is ultimately limited by the electron drift time which is
typically of about 3 − 5µs for 1 cm-long device. This also allows to minimize the integration time
and obtain room-temperature energy resolution close to the one obtainable with a Charge-Coupled
Device only at cryogenic temperatures. The research activity in 2005 was devoted to the application of a medium area detector (0.36 square cm - 180µm pixel size) in Diffraction Enhanced Breast
Imaging (DEBI) measurements. Diffraction imaging is a very promising technique for improving the
specificity of a mammographic exam. Both transmission and diffraction images of a custom-built
test phantom and of different meat samples were acquired and the detail-to-background contrast
was measured. An improvement of contrast from 12% (transmission image) to 32% (diffraction
image) has been obtained.
Moreover we carried out detailed studies for the use of the CDD as scatter detector for a Compton
telescope for γ-ray imaging. The back-side has been segmented and instrumented to pick up the
signal induced by the e-h pairs generated by the interaction thus providing the fast coincidence
signal between the recoil electron signal and the scattered γ-ray signal. Several measurements have
been carried out to study the shape of the induced signals and the achievable time resolution.
Experimental tests with annihilation photons of a 22 N a source in a time coincidence setup showed
best time resolution of 6 ns FWHM. These results confirm that Silicon Drift Detectors with fast
pick-up on the back electrodes and with optimized design as scatter detector allows developing a
Compton telescope with Doppler limited performance for medical imaging. This is of particular
interest in the field of small-animal SPECT for in-vivo study of radiofarmaceuticals distribution.
During 2005 we carried out the preliminary experimental characterization of the novel large area
prototype (about 3cm2 active area and 120µm pixel size) designed on purpose. Very promising
results have been obtained.
[1] A.H.Walenta, A.B.Brill, A.Castoldi, T.Conka Nurdan, C.Guazzoni, K.Hartmann, A. Longoni,
K.Nurdan, L.W.J.Strüder, ”Vertex Detection in a Stack of Silicon Drift Detectors for High Resolution Gamma-ray Imaging”, IEEE Trans. Nucl. Sci., Vol. 52, No. 5, October 2005, pp. 1434-1438,
IEEE, Piscataway (USA), Digital Object Identifier 10.1109/TNS.2005.858270.
188
[2] A. Castoldi, C. Guazzoni, A. Galimberti, S. Pani, G. Royle, and L. Strüder, ”Performance Evaluation of a Controlled Drift Detector for Diffraction Enhanced Breast Imaging”, Nuclear Science
Symposium Conference Record, 2005 IEEE, 23-29 Ottobre 2005, San Juan, Puerto Rico.
[3] S. Pani, G. Royle, R. Speller, A. Castoldi, A. Galimberti, C. Guazzoni, ”Use of a novel
Controlled Drift Detector for Diffraction Enhanced Breast Imaging”, Proceedings of The Seventh
International Conference on Position Sensitive Detectors, 12-16 Settembre, Liverpool (UK).
APPLICATIONS OF SILICON DRIFT DETECTORS IN X-RAY AND
GAMMA-RAY DETECTION
C. Fiorini,C. Guazzoni, A. Longoni, A. Gola, R. Alberti, T. Klatka, M. Zanchi
Gamma-ray detectors for imaging and spectroscopy based on Silicon Drift Detector (SDD) arrays coupled to CsI(Tl) scintillators are under development for different applications in nuclear
medicine like radioassisted oncology and small animal imaging. When used as photodetector for
the scintillation light the SDD allows to reach better energy and position resolutions in gamma
detection with respect to system based on conventional PMTs or PIN diodes. Sub-millimeter position resolutions have been achieved with SDD-based Anger Cameras based on CsI(Tl) crystals.
State-of-the art gamma-ray energy resolution has been achieved with a SDD coupled to a LaBr3
scintillator. Silicon Drift Detector with on-chip electronics have been also successfully employed
in different applications in X-ray spectroscopy, like X-ray fluorescence (XRF) analysis. The main
advantage of the SDD-based spectrometer is to operate with good energy resolution (in the order
of 130 eV FWHM at 6keV at a temperature of about -10◦ C) without a liquid nitrogen cryostat.
A prototype of XRF spectrometer based on a new ring-shaped multi-element SDDs detector with
X-ray optics has been developed for fast elemental mappings. Custom front-end circuits have been
designed to be used for high-rate X-ray spectroscopy applications.
We have designed and tested an FPGA-based data acquisition system to be coupled to the developed XRF spectrometer based on the multi-element SDD. The system features a 14 bit ADC able
to convert signals from four different analogue channels at a maximum rate of 1Mcps per channel.
Several boards can be easily operated in parallel thus allowing to increase the number of input
channels. The pulses peak amplitudes are sampled and stored in a memory inside the FPGA in a
histogram form suitable for spectral analysis.
[1] C. Fiorini, F. Perotti, ”A small prototype of Anger Camera with sub-millimeter position
resolution”, Review of Scientific Instruments, vol. 76, 044303, pp 1-8, 2005
[2] C. Fiorini, M. Bellini, A. Gola, A. Longoni, F. Perotti, P. Lechner, H. Soltau, L. Strüder, ”A
Monolithic Array of 77 Silicon Drift Detectors for X-ray Spectroscopy and Gamma-ray Imaging
189
Applications”, IEEE Transactions on Nuclear Science, Volume 52, Issue 4, Page(s):1165 1170, Aug.
2005
[3] A. Longoni, C. Fiorini, C. Guazzoni, S. Buzzetti, M. Bellini, L. Strüder, P. Lechner, A.
Bjeoumikhov, J. Kemmer, ”A novel high-resolution XRF spectrometer for elemental mapping based
on a monolithic array of silicon drift detectors and on a polycapillary x-ray lens”, X-RAY SPECTROMETRY 34 (5): 439-445 SEP-OCT 2005
[4] C. Fiorini, R. Accorsi, G. Lucignani, ”Single Pinhole and Coded Aperture Collimation Systems
for High-Resolution Gamma-Ray Imaging in Nuclear Medicine: a Comparative Study”, 2005 IEEE
Nuclear Science Symposium and Medical Imaging Conference, 23-29 October 2005, Puerto Rico,
Conference Record, 2005
[5] C. Fiorini, A. Gola, M. Zanchi, A. Longoni, P. Lechner, H. Soltau, L. Strüder, ”Gamma-ray
Spectroscopy with LaBr3:Ce Scintillator Readout by a Silicon Drift Detector”, 2005 IEEE Nuclear
Science Symposium and Medical Imaging Conference, 23-29 October 2005, Puerto Rico, Conference
Record, 2005
[6] M. Marisaldi, C. Labanti, H. Soltau, C. Fiorini, A. Longoni, F. Perotti, ”X and gamma-ray
detection with a silicon drift detector coupled to a CsI(Tl) scintillator operated with pulse shape
discrimination technique”, IEEE Transactions on Nuclear Science, Volume 52, Issue 5, Part 3,
Page(s): 1842 1848, Oct. 2005
[7] A. Longoni, C. Fiorini, C. Guazzoni, R. Alberti, T. Klatka, S. Buzzetti, L. Strüder, P. Lechner,
”Ultra-Fast XRF Spectrometer based on a Novel High-Performance Ring-Shaped Semiconductor
Drift Detector”, 2005 IEEE Nuclear Science Symposium and Medical Imaging Conference, 23-29
October 2005, Puerto Rico, Conference Record, 2005
[8] S. Buzzetti, M. Capou, C. Guazzoni, A. Longoni, R. Mariani, S. Moser, ”High-speed FPGAbased pulse-height analyzer for high resolution X-ray spectroscopy”, IEEE Trans. Nucl. Sci.,
Vol. 52, No. 4, August 2005, pp. 854-860, IEEE, Piscataway (USA), Digital Object Identifier
10.1109/TNS.2005.852699
ELECTRONIC AND OPTOELECTRONIC DEVICES BASED ON ORGANIC
MATERIALS
M. Sampietro, D. Natali, M. Caironi, T. Agostinelli, L. Fumagalli
This reasearch aims to study the physical properties of organic semiconductors and to produce innovative electronic and optoelectronic devices. In particular the research has focused on
the realisation and test of photodetectors sensitive to the visible and near infrared spectrum and
on the realisation of organic field effect transistors. Photodetectors have been produced with planar metal-semiconductor-metal topology on quartz substrates and using dithiolene complexes or
P3HT or MDMO-PPV-PCBM as organic material. Bit rate higher than 4 Mbit/s in the visible,
190
250kbit/s at 960nm and 80kbit/s at 1450nm have been achieved for the first time in the international
panorama. The metal semiconductor interface physics, the enhancement of exciton dissociation by
the external electric field and the charge transport properties of the organic material have all been
investigated in detail. The influence on degradation of the temperature, atmosphere, humidity
grade, electrical stress, UV irradiation, have been investigated in order to derive technological
informations useful for the production. Concerning organic transistors, the research focused on
polymers (polyalchilthiophene) and oligomers with special attention to the influence of the molecular order on the carrier mobily. In particular, structure-property relationship in evaporated films
of fluorenone derivatives have been investagated in detail together with the anisotropy effects on
the mobility in Langmuir-Blodgett deposited Poly (3-methoxypentyl-tiophene) based Thin Film
Transistors.
[1] W. Porzio, S. Destri, U. Giovanella, M. Pasini, T. Motta, D. Natali, M. Sampietro, M. Campione, ”Fluorenone-thiophene derivative for organic field effect transistors: a combined structural,
morphological and electrical study”, Thin Solid Films, Vol. 492, 212-220 (2005)
[2] D.Natali, M.Sampietro, L.Franco, A.Bolognesi and C. Botta, ”Mobility anisotropy in LangmuirBlodgett deposited Poly (3-methoxypentyl-tiophene) based Thin Film Transistors”, Thin Solid
Films, Vol. 472, 238-241 (2005)
[3] M.Caironi, D.Natali, M. Sampietro, M.Ward, A.Meacham, F.A.Devillanova, M.Arca, C.Denotti,
L.Pala, ”Near infrared detection by means of coordination complexes”, Syntetic Metals, Vol.153,
273-276 (2005)
[4] T. Agostinelli, M. Arca, M. Caironi, F. A. Devillanova, V. Ferrero, D. Natali and M.Sampietro,
”Visible and infrared light pulse detection with organic semiconductors” Proc. of the XXVIIIth
general Assembly of International Union Radio Science (URSI), New Delhi, India, October 23-29,
2005, D04.3(01351)
INSTRUMENTATION FOR HIGH-SENSITIVITY MEASUREMENTS ON BIO
AND NANO STRUCTURES
G. Ferrari, M. Sampietro, L.Fumagalli, F.Gozzini, E. Gatti
The research aims to the development of original instrumentation for electrical measurements
on biological matter and on nanostructured devices. In particular we have realized a novel transimpedance amplifier based on the series of an integrator and a differentiator stage, having an additional feedback loop to discharge the standing current from the device under test so to maintain
signal amplification over a large bandwidth (MHz range) while ensuring an unlimited measuring
time opportunity. The improvement of sensitivity with respect to traditional instruments makes
191
these realization perfectly suited to measure ultra low signals in semiconductor devices and biological samples. We are using the new amplifier in the measurement of electrical signals (current,
capacitance and noise) directly produced in a protein and on the tracking of these electrical quantities with time as the protein interacts with external molecules. The focus is on olfactory receptors
and the possibility to use them as single protein nanobiosensors.
[1] G. Ferrari and M. Sampietro, ”Novel transimpedance amplifier for noise measurements on bioelectronic devices” Proc. of 18th Int. Conf. on Noise in Physical Systems and 1/f FluctuationsICNF 2005, Sept. 19-23, 2005, Salamanca, Spain, p. 653-656
[2] Gomila, G., Errachid, A., Bessueille, F., Ruiz, O., Pajot, E., Minic, J., Gorojankina, T., Salesse,
R., Villanueva, G., Bausells, J., Pennetta, C., Alfinito, E., della Sala, F., Akimov, V., Reggiani, L.,
Hou, Y., Jaffrezic, N., Ferrari, G., Fumagalli, L., Sampietro, M., Samitier, J., ”Development of an
artificial nose integrating NEMS and biological olfactory receptors” 2005 Spanish Conf. on Electron
Devices, 2-4 Feb. 2005 Page(s):529 - 532 Digital Object Identifier 10.1109/SCED.2005.1504506
[3] L. Fumagalli, I. Casuso, G. Ferrari, G. Gomila, M. Sampietro, J. Samitier, ”Nanoscale electronic
noise measurements” Proc. of 18th Int. Conf. on Noise in Physical Systems and 1/f FluctuationsICNF 2005, September 19-23, 2005, Salamanca, Spain, p. 575-8
[4] C. Pennetta, V. Akimov, E. Alfinito, L. Reggiani, G. Gomila, G.Ferrari, L. Fumagalli and M.
Sampietro, ”Modelization of Thermal Fluctuations in G Protein-Coupled Receptors” Proceedings
of 18th International Conference on Noise in Physical Systems and 1/f Fluctuations- ICNF 2005,
September 19-23, 2005, Salamanca, Spain, p. 611
MICROWAVE-INDUCED TRAPPING ANALYSIS ON MOS TRANSISTORS
G. Ferrari, M. Sampietro, L.Fumagalli
We are involved in the characterization of spin-dependent processes at the Si/SiO 2 interface
of a MOSFET by random telegraph signal (RTS). As the RTS is related to a single trap, spindependent phenomena in the capture and emission, if observed, will allow single-spin detection,
an intriguing objective for condensed matter physicists with potential for application in quantum
information processing and spintronics. The group has worked on the experimental set-up to
evidence a stationary current in such devices operated under microwave radiation. The stationary
current is examined as a function of the microwave power and of the operating voltage of the
MOSFET. To this aim, a microwave detector featuring full compatibility with standard CMOS
process has been designed, based on the channel resistance non-linearity of a MOSFET operating
in ohmic regime. The detecting sensitivity can be tuned to below mW power by properly setting
the bias voltage of the gate and of the drain of the transistor. Experiments with 180 nm gate
length transistor have confirmed detecting operation up to 34 GHz. The absence of additional
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technological steps required for the detector fabrication with respect to a standard CMOS process
opens the realm of RF monitoring in products at virtually no cost. At present we may conclude
that, in operating a MOSFET under microwaves, one has to pay attention to the generation of
spurious stationary currents that may alter the likelihood to observe spin-dependent phenomena
in the random telegraph signal observed in a MOSFET.
[1] G. Ferrari, L. Fumagalli, M. Sampietro, E. Prati, M. Fanciulli, ”CMOS fully compatible microwave detector based on MOSFET operating in resistive regime”, IEEE Microwave and Wireless
Components Letters, Vol.15, n.7, 445-447 (2005)
[2] G. Ferrari, L. Fumagalli, M. Sampietro, E. Prati, M. Fanciulli, ”dc modulation in field effect
transistors operating under microwave irradiation for quantum read out”, J. Appl. Phys. 98,
044505-1/-4 (2005)
[3] E. Prati, G. Ferrari, M. Sampietro, P.Fantini, M. Fanciulli, ” Microwave Induced Effects on the
Random Telegraph Signal in a MOSFET” Proceedings of 18th International Conference on Noise
in Physical Systems and 1/f Fluctuations- ICNF 2005, September 19-23, 2005, Salamanca, Spain,
p. 171-174
[4] E. Prati, M. Fanciulli, G. Ferrari, M. Sampietro, ”High magnetic field dependence of capture/emission fluctuations of a single defect in silicon MOSFETs” Proc. of 18th International
Conference on Noise in Physical Systems and 1/f Fluctuations- ICNF 2005, September 19-23, 2005,
Salamanca, Spain, p. 221-224
[5] P. Fantini and G. Ferrari, ”Low Frequency Noise sensitivity to technology induced mechanical
stress in MOSFETs” Proceedings of 18th International Conference on Noise in Physical Systems
and 1/f Fluctuations- ICNF 2005, September 19-23, 2005, Salamanca, Spain, p. 191-194
[6] M.Fanciulli, E.Prati, G.Ferrari and M.Sampietro, ”Random Telegraph Signal in n-MOSFETs:
a way toward Single Spin Resonance Detection” AIP Conference Proc., Vol.800, Issue 1, pp.125-130
(2005) from Conf. UpoN 2005, Gallipoli (Italy) on 6-10 June 2005
LOW-NOISE VLSI CIRCUITS FOR DETECTORS READOUT
S.Buzzetti, C.Fiorini, C.Guazzoni, A.Longoni, M.Porro
In the year 2005 the activity of the research group has focused on different items in the design
of low-noise VLSI circuits for detectors readout:
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• We have designed and tested current-mode spectroscopy amplifiers in 0.8 µm BiCMOS technology to fullfil the requirements of high resolution X-ray spectroscopy that often requires long
time constants (1-10 µs) to optimise the achievable energy resolution. Different topologies
operating in current-mode have been exploited, that allows to obtain with a single shaping cell
filters virtually of any order without the use of operational amplifiers. The circuit is based on
a feedback topology realized with current mirrors that allows to obtain a high order complexconjugated poles filter. Time constants in the µs range are easily realizable. The measured
non linearity is well below 0.2% and the achieved energy resolution is fully comparable to the
one achieved with a commercial Gaussian shaping amplifier with the same time constant and
poles constellation (159eV F W HM at the Mn Kα line with a 5mm2 Peltier cooled Silicon
Drift Detector). Moreover a four channel version has been designed and preliminary tests
have been carried out.
• We have proposed a new readout circuit for X-ray spectroscopy and gamma-ray imaging based
on RC time constants of few us for the design of semi-gaussian shaping amplifiers in nuclear
electronics. The RC cell is based on the de-magnification of the current flowing in a resistor R
by means of the use of current mirrors. We have designed and produced in the 0.35µm CMOS
technology a new preamplifier-shaper circuit to be used for high-stability spectroscopy in
nuclear physics experiments using multi-elements silicon drift detectors. A new configuration
for high-rate charge preamplifiers for X-ray spectroscopy has been proposed. A new timevariant shaping amplifier for astrophysics missions on satellites is also under development.
[1] S. Buzzetti, C. Guazzoni, A. Longoni, ”Multi-channel current-mode spectroscopy amplifier in BiCMOS technology with selectable shaping time”, IEEE Trans. Nucl. Sci., Vol. 52,
No. 5, October 2005, pp. 1617-1623, IEEE, Piscataway (USA), Digital Object Identifier
10.1109/TNS.2005.856721.
[2] S.Buzzetti, C.Guazzoni, ”A novel compact topology for high resolution spectroscopy amplifiers
in BiCMOS technology”, IEEE Trans. Nucl. Sci., Vol. 52, No. 5, October 2005, pp. 1611-1616,
IEEE, Piscataway (USA), Digital Object Identifier 10.1109/TNS.2005.856726
[3] C. Fiorini, M. Porro, ”DRAGO Chip: a Low-Noise CMOS Preamplifier-Shaper for Silicon
Detectors with Integrated Front-End JFET”, IEEE Transactions on Nuclear Science, Volume 52,
Issue 5, Part 3, Oct. 2005 Page(s):1647 1653
[4] C. Fiorini, ”A Charge Sensitive Preamplifier for High Peak Stability in Spectroscopic Measurements at High Counting Rates”, IEEE Transactions on Nuclear Science, Volume 52, Issue 5, Part
3, Oct. 2005 Page(s):1603 1610
[5] C. Fiorini, T. Frizzi, ”A Baseline Holder for CMOS Readout Circuits with Feedback Extension to
the Charge Preamplifier”, 2005 IEEE Nuclear Science Symposium and Medical Imaging Conference,
23-29 October 2005, Puerto Rico, Conference Record, 2005
194
[6] C. Fiorini, M. Porro, T. Frizzi, ”A 8-channels Low-Noise CMOS Readout Circuit for Silicon
Detectors With on-Chip Front-end JFET”, 2005 IEEE Nuclear Science Symposium and Medical
Imaging Conference, 23-29 October 2005, Puerto Rico, Conference Record, 2005
[7] C. Fiorini, T. Frizzi, A. Longoni, M. Porro, ”A CMOS Readout Circuit for Silicon Drift
Detectors with on-chip JFET and Feedback Capacitor”, 2005 IEEE Nuclear Science Symposium
and Medical Imaging Conference, 23-29 October 2005, Puerto Rico, Conference Record, 2005
SILICON CARBIDE AND GALLIUM ARSENIDE RADIATION DETECTORS
G. Bertuccio, S. Caccia, R. Casiraghi, D. Maiocchi
Compound semiconductors such as GaAs, CdTe, CdZnTe, SiC due to their wide bandgap and
mean atomic number allow to overcome some intrinsic limits of silicon and germanium X and
gamma ray detectors, employed in scientific, industrial and medical applications.
In particular our research activity has been concentrated on Silicon Carbide, whose physicalchemical and electrical properties are optimal to for realising low-noise, room and high temperature radiation detectors, with the potentiality to operate also in harsh environments. A detailed
study of SiC detectors has been carried out and some prototype devices have been manufactured
in collaboration with Selex Integrated Systems. A inter-disciplinary collaboration between several
Italian Universities and Selex has brought to the realisation and a detailed experimental study
of SiC detectors, which have been successfully tested in a wide temperature range, from 27 ◦ C to
100◦ C, so overcoming the operating temperature limit of traditional semiconductor detectors.
[1] G. Bertuccio, ”Prospect for Energy Resolving X-Ray Imaging with Compound Semiconductor
Pixel Detectors”, Nuclear Instruments and Methods in Physics Research A 546 (2005) 232-241
[2] G. Bertuccio, S. Binetti, S. Caccia, R. Casiraghi, A. Castaldini, A. Cavallini, C. Lanzieri, A. Le
Donne, F. Nava, S. Pizzini, L. Rigutti, G. Verzellesi, E. Vittone, ”Silicon Carbide for Alpha, Beta,
Ion and Soft X-Ray High Performance Detectors” Proc. of the 5th European Conference on Silicon
Carbide and Related Materials (ECSCRM2004), Aug. 31-Sept. 4, Bologna (Italy), Materials
Science Forum, Vol. 483-485, 2005, ISSN 0255-5476 Trans Tech Publications Ltd, Brandrain 6,
CH-8707 Uetikon-Zuerich,Switzerland.
[3] A. Lo Giudice, P.Olivero, F. Fizzotti, C.Manfredotti, E.Vittone, S. Bianco, G.Bertuccio,
R.Casiraghi, and M.Jaksic, ”Study of ion induced damage in 4H-SiC”, Proc. of the 5th European Conf. on Silicon Carbide and Related Materials (ECSCRM2004), Aug. 31-Sept., 4 2004,
Bologna (Italy), Materials Science Forum, Vol. 483-485, (2005) p. 389, ISSN 0255-5476 Trans Tech
Publications Ltd, Brandrain 6, CH-8707 Uetikon-Zuerich,Switzerland.
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LOW-NOISE, LARGE DYNAMIC RANGE, HYBRID/INTEGRATED
ELECTRONICS FOR IONISING-RADIATION SENSORS
A. Pullia, G. Bertuccio, S. Riboldi, F. Zocca, S. Caccia, D. Maiocchi, R. Bassini, C. Boiano
This research concerns the design and development of innovative front-end electronics for
position-sensitive spectrometers of ionising radiations (X, gamma, alpha rays). Applications include
bio-medical imaging, X-ray imaging in spatial missions, gamma-ray tracking in nuclear physics experiments, contaminant analysis, environmental safeguard, etc. The circuitry used in these systems
includes typically a low-noise fast preamplifier, a shaper amplifier and a digital processor used for
optimal-filtering implementation and for the final classification of the events.
A smart device has been developed, which swiftly resets the preamplifier when a large signal puts
it in saturation, yielding a significant reduction of the system dead time and an extended dynamic
range. The amplitude of the large signal is estimated from the width of the reset transient by
means of a time-over-threshold measurement, which yields a one-order-of-magnitude extension of
the useful signal dynamic range.
An original integrated baseline restorer for silicon pixel detectors has been designed and developed,
which stabilizes the dc component of the output signal of the preamplifier/shaper amplifier chain.
It features an area occupancy of 90x100 µm2 and a power consumption of 90µW for 3.3V power
supply.
A new circuit structure has been developed to optimize the ADC range of digitized preamplifiers
of ionizing radiations. It is based on a sliding-scale architecture controlled digitally through a
negative control-loop. Such a structure adds a proper analog level to the preamplifier output, so
as to maintain the signal within the ADC dynamic range, even when substantial signal walks (up
to ten times the ADC input range) caused by events pileup, low-frequency disturbances, etc., occur.
[1] A. Pullia, F. Zocca, ”A low-noise preamplifier for gamma-ray sensors with add-on device for
large-signal management”, Nucl. Instr. and Meth. Sect. A, vol. 545, no. 3, pp. 784-92 2005
[2] A. Pullia, D. Maiocchi, G. Bertuccio, S. Caccia, ”A compact VLSI dc restorer for multi-channel
X-gamma ray detectors”, IEEE Trans. Nucl. Sci., 2005, vol. 52, no. 5, pp. 1643-6, October 2005
[3] F. Zocca, A. Pullia, C. Boiano, R. Bassini, ”A mixed continuous-pulsed reset technique for
digitised preamplifiers of radiation signals”, 2005 IEEE Nucl. Sci. Symp. Conference Record, San
Juan, Puerto Rico, USA 23-29 Oct. 2005
[4] A. Pullia, F. Zocca, C. Cattadori, ”Single transistor option for high-resolution gamma-ray
spectroscopy in hostile environments”, 2005 IEEE Nucl. Sci. Symp. Conference Record, San Juan,
Puerto Rico, USA 23-29 Oct. 2005
[5] A. Pullia, F. Zocca, G. Pascovici, C. Boiano, R. Bassini, ”A fast low-noise preamplifier with
92 dB input range for bulky HPGe gamma-ray sensors”, 2005 IEEE Nucl. Sci. Symp. Conference
Record, San Juan, Puerto Rico, USA 23-29 Oct. 2005
196
[6] D. Maiocchi, S. Riboldi, A. Pullia, ”A method for the optimisation of front-end electronics
for ionising radiation spectrometers”, 2005 IEEE Nucl. Sci. Symp. Conference Record, San Juan,
Puerto Rico, USA 23-29 Oct. 2005
INSTRUMENTATION FOR NUCLEAR MEASUREMENTS AND MEDICAL
IMAGING
A. Fazzi, V. Varoli
The research activity is aimed to the development of silicon detectors and front-end electronics
for nuclear measurements (neutron spectrometry, personal dosimetry and microdosimetry) and
medical imaging (functional molecular imaging). It consists of detector and circuit design and
characterisation, prototyping and beam tests at the INFN Legnaro Labs. The discrimination
between proton and secondary electrons with silicon PIN diodes through the coincidence technique
has been improved. First microdosimetric spectra have been measured and compared with classical
Tissue Equivalent Proportional Counters.
[1] M. Caresana, V. Varoli, A. Fazzi ”Feasibility study of a personal dosimeter based upon silicon
diodes used in remote controlling” Radiat Prot Dosimetry (2005), Vol. 114, pp. 469-474, Oxford
University Press (2005)
[2] S. Agosteo, P.G. Fallica, A. Fazzi, A. Pola, G. Valvo, P. Zotto ”A feasibility study of a solidstate microdosimeter” Applied Radiation and Isotopes, Volume 63, Issues 5-6, November-December
2005, pp. 529-535
[3] S. Agosteo, G. D’Angelo, A. Fazzi, A. Foglio Para, A. Pola, L. Ventura, P. Zotto ”Performance
of a Neutron Spectrometer Based on a PIN Diode” Radiat Prot Dosimetry (2005), Vol. 116, N.1-4,
pp. 180-184, Oxford University Press (2005)
[4] N. Cirulli, G.U. Pignatel, G.F. Dalla Betta, M. Boscardin, C. Piemonte, N. Zorzi, A.Fazzi
”Development of silicon pixel detectors for radio-isotopic molecular imaging” Proc. MEET Conference (Microelectronics, Electronics, and Electronic Technologies) Opatija, Croatia, May 30 June
3, 2005, pp 65-67, ISBN: 953-233-011-9
[5] L. Stebel, S. Carrato, G. Cautero, N. Cirulli, G. Pignatel, C. Marzocca, A. Tauro, A. Dragone,
F. Corsi, G.-F. Dalla Betta, A. Fazzi, V. Varoli, F. Cusanno, F. Garibaldi, N. Zorzi ”A modular
prototype detector for scintimammography imaging” Proc. 2005 IEEE Nucl.Sci.Sympo., Puerto
Rico(USA) 23-29 Oct. 2005, pp.3027-3031, ISBN: 0-7803-9222-1
[6] A. Fazzi, S. Agosteo, A. Foglio Para, A. Pola, V. Varoli ”Improvement of the Low Energy Limit
of a Silicon-Based Neutron Spectrometer” Proc. 2005 IEEE Nucl.Sci.Sympo., Puerto Rico(USA)
23-29 Oct. 2005, pp.1173-1177, ISBN: 0-7803-9222-1
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COMPUTER AIDED DYNAMIC ANALYSIS AND DESIGN OF POWER
ELECTRONICS SYSTEMS
The dynamic analysis of power electronic systems, even those constituted by tens or hundreds of
power circuits connected in series, parallel or cascade, is made possible by an original software tool
which uses PSPICE and MATLAB as ancillary software packages. Such tool, named FREDOMSIM
has been developed in the electronic laboratory of University of Milano and is currently improved
to serve emerging exigences for the design optimization of Power Processors. Starting from the
computer aided analysis of each power cell with the feedback loops open, the designer is assisted in
assigning inner feedback, feedforward compensations and external feedback. On the base of small
signal state space discrete time models, the interconnections of all the subsystems can be done and
the overall characterization reached in the z-transform domain. Most recent interests are addressed
to distrbuted power supply systems.
[1] F. BELLONI, P. MARANESI, M. RIVA, Ion Thruster High Voltage Drive, Highlights in Physics
2005, congresso del dipartimento di fisica dell’Universitá degli Studi di Milano, 2005
[2] F. BELLONI, P. MARANESI, M. RIVA, Modeling the LIFT DC-DC Converter in the State
Space Discrete Time, 11th European Conference on Power Electronics and Applications, EPE2005,
Dresden, Germania, 10-15 Settembre 2005
[3] F. BELLONI, P. MARANESI, M. RIVA, HV Driver for Ion Thrusters, 11th European Conference on Power Electronics and Applications, EPE2005, Dresden, Germania, 10-15 Settembre
2005
[4] F. BELLONI, P. MARANESI, M. RIVA, A New Application of Power Electronics: the Ion
Thruster HV Drive, Holon Academic Journal, Journal of Science and Engineering Series B: Applied
Sciences and Engineering, 2005, printed publication ISSN 1565-4990, electronic publication ISSN
1565-5008
INTEGRATED RESONANT SWITCHING DC/DC CONVERTERS FOR
DISTRIBUTED POWER SUPPLY
The reduction of the supply voltage for integrated circuits down to 0.7V (65nm technology) and
corresponding current increment sets a new trend in power distribution. The research program aim
is that of proposing and developing a power distribution configuration well suited to satisfy the
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emerging requests of power conditioning for high performance servers in the Telecom, Networking
and Computers areas.
DESIGN OF ANALOG INTEGRATED CIRCUITS FOR COMMUNICATIONS
A. L. Lacaita, C. Samori, S. Levantino, A. Bonfanti, L. Romanò, L. Panseri, A. Tedesco
New communication standards characterized by wider bandwidths and higher operating frequencies are pushing radio-frequency front-ends towards more stringent requirements.
The generation of low-noise local oscillation and the availability of accurate quadrature phases
is mandatory in any high-performance fully-integrated radio. A divider based on an injectionlocking ring oscillator has been demonstrated in 0.13 µm CMOS frequency. This topology achieves
larger input frequency range and better phase accuracy with respect to injection-locking oscillators,
because of the smoother slope of the loop gain phase-frequency plot. As it has been experimentally
verified, this divider operates between 11 and 15 GHz, while dissipating 3 mA from a 1.2 V power
supply. However, this measured frequency range was limited by the available signal source. Postlayout simulations have shown that the circuit is able to divide an input signal spanning from 7 to
19 GHz.
A multi-band Wireless-LAN frequency synthesizer in 0.25 µm CMOS has been designed and
tested in collaboration with STMicroelectronics, Catania. This circuit while using fractional division and allowing for 500 kHz resolution introduces a new technique for fractional spur averaging.
The spur suppression has been experimentally demonstrated to be as as high as 35 dB. This synthesizer covers the 2.4 and 5 GHz ISM bands and meets the specification of the IEEE 802.11a/b/g
Wireless LAN standard, between 5 and 6 GHz operation frequency.
An analysis of phase noise and phase accuracy in coupled multiphase LC oscillators developed
and it has been object of an invited paper at the MTT Symposium. The analysis has demonstrated
that ring-coupled multiphase oscillators produce N outputs equally shifted by π/N and worst noisepower trade-off with respect to a stand-alone oscillator. The reasons for this worsening are: The
oscillation frequency shifts with respect to the tank resonance and only a fraction of the bias current
compensates the tank losses. Another result of this analysis is that the most common realization
of quadrature oscillators employing N = 2 stages is not optimal from the noise point of view. Four
oscillators (N = 4) still provide quadrature outputs but also better noise performance.
Better trade-off between noise and phase accuracy has been found in an innovative quadrature
oscillator topology based on second-harmonic coupling. This topology has been analyzed and
experimentally demonstrated in 0.25µm CMOS, and it has been object of an US patent.
199
[1] A. Bonfanti, A. Tedesco C. Samori, A. L. Lacaita, “A 15-GHz Broad-band /2 Frequency Divider
in 0.13 − µm CMOS for Quadrature Generation”, IEEE Microwave and Wireless Components
Letters, vol. 15, n. 11, pp. 724-726, November 2005, Dig.Ob.Id.10.1109/LMWC.2005.858997.
[2] S. Levantino, A. Bonfanti, C. Samori, A. L. Lacaita, “Differentially-Tuned VCO with Reduced
Tuning Sensitivity and Flicker Noise Up-Conversion”, Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers, Hingham (MA, USA) Volume 42, Issue 1, pp. 21-29, January
2005. ISSN:0925-1030
[3] A. Tedesco, A. Bonfanti, L. Panseri, , A.L. Lacaita, “A 11 − 15GHz CMOS /2 Frequency
Divider For Broad-Band I/Q Generation” 2005 PhD Research in Microelectronics and Electronics
(PRIME), vol. 1, pp. 117-120, Lausanne (Switzerland), July 25-28, 2005. Digital Object Identifier
10.1109/RME.2005.1543018.
[4] S. Pellerano, S. Levantino, C. Samori, A. L. Lacaita, “A Dual-Band Frequency Synthesizer for
802.11a/b/g with Fractional-Spur Averaging Technique” Digest of 2005 IEEE International SolidState Circuits Conference (ISSCC), vol. 1, pp. 104-578, San Francisco, Feb. 6-10, 2005. Digital
Object Identifier 10.1109/ISSCC.2005.1493890.
[5] C. Samori, “Phase Noise and Phase Accuracy in Multiphase LC Oscillators”, 2005 IEEE MTT-S
International Microwave Symposium Digest, pp. 879-882, June 12-17, 2005.
[6] S. Gierkink, V. Boccuzzi, R. C. Frye, S. Levantino, “Quadrature voltage controlled oscillator utilizing common-mode inductive coupling,” US Patent, no. 6,911,870, June 28, 2005,
http://www.uspto.gov/patft/index.html
CHARACTERIZATION AND MODELING OF SEMICONDUCTOR DEVICES
A. L. Lacaita, A. S. Spinelli, D. Ielmini, C. Monzio Compagnoni
R. Gusmeroli, A. Redaelli,D. Mantegazza
Reliability of floating gate non volatile memories is strongly limited by stress induced leakage
current flowing in anomalous cells in the memory array. While the reduction of stress-induced
defects has been proven difficult only based on modification of the process technology, the understanding of the SILC dynamics and defect properties may provide additional insight for control and
monitoring of the leakage process [1]. A new experimental technique for characterizing trapping
and detrapping time constants in the tunnel oxide layer of Flash memories [2]. The new technique
may be used for refinement of the currently available numerical models for reliability prediction in
Flash memories at the array level.
Nanocrystal (NC) memories can be considered a practical evolution of the floating-gate memory
concept, allowing improved scaling margins thanks to charge storage in spatially isolated silicon
NCs, acting as distributed storage nodes. Distributed charge storage allows in fact a virtual cell
200
immunity to SILC, thus offering the possibility for a significant reduction of the tunnel oxide thickness which represents the main constraint to scaling the Flash cell. In order to investigate the
feasibility of a NC memory technology for non-volatile applications, our work has been focused on
the understanding of the NC charging dynamics during tunneling program/erase (P/E) [3]. The
conceived model has been used to investigate possible optimizations of the NC cell structure, with
the aim of improving the small threshold voltage window (VT ) resulting from tunneling P/E [4].
Moreover, our research activity has been focused on the comprehension of channel conduction in
presence of randomly distributed charged NCs. To this aim, we have developed a 3Dimensional
(3D) Monte Carlo simulation tool for NC cells and we have studied the impact of edge and percolative conduction on cell VT [5]. This tool has been used to define scaling projections for the NC
memory technology, including both program and SILC constraints [6]. The statistical spread of V T
after program due to NC number and position fluctuation and the increasing impact of SILC for
very small cell areas due to lateral tunneling of the stored charge, have been indicated as serious
constraints for NC memory scaling to deca-nanometer dimensions. Finally, we have tried to compare NC memories with nitride cells, also implementing the distributed storage concept, in terms
of drain turn-on immunity, drain disturb and two-bits operation [7].
Phase change memory (PCM) is an emerging technology for non volatile memories, which is
rapidly gaining credibility among the semiconductor industry thanks to its intrinsic scalability
and demonstrated reliability [8,9]. The research activity in the field of PCM has concentrated on
three different directions: the switching and programming performance of the memory [10-13], the
accurate analysis of statistical reliability [14] and the development of numerical models [15] for
optimizing the technology [16]. The phenomenon of electronic switching has been characterized in
detail to assess the role of the parasitic capacitance of the cell on the set operation. Capacitive
charging soon after switching can cause a significant current to flow in the cell, causing a parasitic
reset able to prepare the chalcogenide material in an electronically excited, amorphous state. The
parasitic reset can explain the non filament type set state previously observed in the programming
characteristics of analytical cells, as well as anomalous bumps in the programming characteristics.
The transition to the OFF state, namely the recovery, has been studied referring to both the
threshold voltage and resistance transient evolution after programming. A recovery dynamics of
around 30 ns has been evidenced, pointing out possible limitations for fast program verify loop
in future generation devices. The data retention was addressed with the purpose of developing
physically-based extrapolation procedure in time, temperature and array statistics. The statistical
properties of data loss were quantitatively interpreted based on material properties such as the
nucleation rate, the growth velocity and the crystallization thermodynamics. A numerical model
was conceived to draw scaling and reliability projections for PCMs. Finally, numerical models
for switching and programming process in PCMs were developed and successfully applied to the
optimization of the microtrench technology of PCMs.
[1] D. Ielmini, A. S. Spinelli, A. L. Lacaita “Recent developments on flash memory reliability,”
Microelectronic Engeenering 80, 321-328 (2005)
[2] D. Ielmini, A. S. Spinelli, A. L. Lacaita, L. Chiavarone and A. Visconti, “A new charge-trapping
technique to extract SILC-trap time constants in SiO2 ,” Tech. Dig. of 2005 International Electron
201
Device Meeting, Washington DC, December 5-7, 2005, 551-554 ISBN 0-7803-9268-X
[3] C. Monzio Compagnoni, D. Ielmini, A.S. Spinelli and A. L. Lacaita, “Modeling of tunneling
P/E for nanocrystal memories,” IEEE Trans. Electron Devices 52, 569-576 (2005). ISSN 0018-9383
[4] C. Monzio Compagnoni, D. Ielmini, A.S. Spinelli and A. L. Lacaita, “Optimization of threshold
voltage window under tunneling program/erase in nanocrystal memories,” IEEE Trans. Electron
Devices 52, 2473-2480 (2005). ISSN 0018-9383
[5] R. Gusmeroli, A. S. Spinelli, C. Monzio Compagnoni, D. Ielmini, and A. L. Lacaita, “Edge
and percolation effects on VT window in nanocrystal memories,” Microelectronic Engineering 80,
186-189 (2005). ISSN 0167-9317.
[6] R. Gusmeroli, A. S. Spinelli, C. Monzio Compagnoni, D. Ielmini, F. Morelli, and A. L. Lacaita,
“Program and SILC constraints on NC memories scaling: a Monte Carlo approach,” Tech. Dig. of
2005 Int. Electron Device Meeting, Washington DC, Dec. 5-7, 2005, 1061-1064 ISBN 0-7803-9268-X
[7] C. Monzio Compagnoni, D. Ielmini, A.S. Spinelli, A. L. Lacaita and R. Sotgiu, “Reliability
assessment of discrete-trap memories for NOR applications,” Proc. of 2005 Int. Reliability Physics
Sinposium, San Jos, CA, April 17-21, 2005, 240-245. ISBN 0-7803-8803-8.
[8] A.L Lacaita, “Phase change memories: state-of-the-art, challenges and perspectives,” Proc.
of the 6th Int. Conference on Ultimate Integration of Silicon, April 7-8, 2005, 105-108. ISBN
88-900847-0-7
[9] A. L. Lacaita, “Physics and Performance of Phase Change Memories,” Proceedings of 2005
2005 International Conference on Simulation of Semiconductor Processes and Devices - SISPAD,
Tokyo, Sept. 1-3 , 2005, 267-270. IEEE Cat. Num. 05TH8826
[10] D. Ielmini, D. Mantegazza, A. L. Lacaita, A. Pirovano and F. Pellizzer, “Effects of threshold
switching and parasitic capacitance in the programming transient of chalcogenide phase-change
memories,” Proceedings of 2005 Int. Conference on Memory Technology and Design, May 21-24,
2005, 195-198.
[11] D. Ielmini, D. Mantegazza, A. L. Lacaita, A. Pirovano and F. Pellizzer, “Parasitic reset in the
programming transient of PCMs,” IEEE Electron Device Lett., 26, 799-801 (2005). ISSN 0741-3106
[12] D. Ielmini, D. Mantegazza, A. L. Lacaita, A. Pirovano and F. Pellizzer, “Switching and programming dynamics in phase-change memory cells,” Solid State Electronics 49, 1826-1832 (2005).
ISSN 0038-1101
[13] D. Ielmini, A. L. Lacaita, D. Mantegazza, F. Pellizzer and A. Pirovano, “Assessment of
threshold switching dynamics in phase-change chalcogenide memories,” Tech. Dig. of 2005 Int.
Electron Device Meeting, Washington DC, December 5-7, 2005, 897-900 ISBN 0-7803-9268-X
[14] A. Redaelli, D. Ielmini, A. L. Lacaita, F. Pellizzer, A. Pirovano, and R. Bez, “Impact of
crystallization statistics on data retention for phase change memories,” in Tech. Dig. of 2005 Int.
Electron Device Meeting, Washington DC, December 5-7, 2005, 761-764 ISBN 0-7803-9268-X
[15] A. Redaelli, A. L. Lacaita, A. Benvenuti, and A. Pirovano, “Comprehensive numerical model
for phase-change memory simulations,” Proceedings of 2005 International Conference on Simulation
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of Semiconductor Processes and Devices - SISPAD, Tokyo, Sept. 1-3 , 2005, 279-282. IEEE Cat.
Num. 05TH8826
[16] A. Pirovano, F. Pellizzer, A. Redaelli, I. Tortorelli, E. Varesi, F. Ottogalli, M. Tosi, P. Besana,
R. Cecchini, R. Piva, M. Magistretti, M. Scaravaggi, G. Mazzone, P. Petruzza, F. Bedeschi, T.
Marangon, A. Modelli, D. Ielmini, A. L. Lacaita, and R. Bez, “µ-Trench phase-change memory
cell engineering and optimization,” Proceedings of 2005 ESSDERC, Grenoble, France, September
12-16, 2005, 313-316. ISBN 0-7803-9204-3
DIGITAL CONTROL ARCHITECTURES FOR LOW-VOLTAGE,
HIGH-CURRENT DC/DC CONVERTERS
S. Saggini, G. Garcea, M. Ghioni, A. Geraci
The ever-increasing speed and complexity of modern microprocessors is pushing the need for
voltage regulator modules (VRM) with challenging design requirements. As an enabling technology,
multiphase buck converters with analog control loop have become the standard practice in VRM
industry. Recently, there has been a growing interest in digitally controlled VRMs, due to the
well known advantages of digital design: flexibility and fast reconfigurability, ability to implement
sophisticated control algorithms, immunity to noise, low cost, etc. However, a broad acceptance of
digital control techniques is still hindered by their excessive complexity if compared with standard
analog solutions. We have introduced a new digital architecture for VRM control, which is fully
compliant with Intel’s VRM9.0 specifications. The key feature of the proposed solution is the lowcomplexity: only two digital-to-analog converters with low-resolution (7 bit) are used, thus allowing
for considerable resource saving. The control strategy combines current programming and variable
frequency operation, leading to negligible quantization effects in spite of the low resolution. This
makes it possible to improve both output voltage accuracy and stability with respect to traditional
digital solutions. The new architecture is designed to provide active current sharing and adaptive
voltage positioning functions. Extension to multiphase converters is straightforward.
[1] S. Saggini, G. Garcea, M. Ghioni, P. Mattavelli ”Analysis of High-Performance SynchronousAsynchronous Digital Control for dc-dc Boost Converters” Proceedings of the 20th IEEE Applied
Power Electronics Conference, APEC 2005, 6-10 March 2005, vol. 2, pp. 892 - 898 (2005)
[2] Stefanutti, W., Mattavelli, P., Saggini, S., Ghioni, M. ”Autotuning of Digitally Controlled Buck
Converters based on Relay Feedback” Proceedings of the 36th IEEE Power Electronics Specialists
Conf., PESC 2005, 12-16 June 2005, pp.2140-2145 (2005).
[3] Saggini, S.; Stefanutti, W.; Trevisan, D.; Mattavelli, P.; Garcea, G. ”Prediction of limit-cycles
oscillations in digitally controlled dc-dc converters using statistical approach” Proceedings of the
203
32nd IEEE Annual Conf. of Industrial Electronics Society, IECON 2005, 6-10 Nov., 2005, pp. 561
- 566 (2005)
[4] G. Garcea, P. Mattavelli, K. Lee, Fred C. Lee ”A Mixed-Signal Control for VRM applications”
Proceedings of the 11th European Conference on Power Electronics and Applications, EPE 2005,
11-14 Sept. 2005, ISBN : 90-75815-08-5 (2005)
LARGE-AREA AVALANCHE DIODES FOR PICOSECOND
TIME-CORRELATED PHOTON COUNTING
S. Cova, I. Rech, M. Ghioni, A. Gulinatti
In recent years there has been a growing interest in time-correlated single-photon counting. This
technique is widely used in many research fields ranging from biology to chemistry, to bioengineering
to materials characterization. In applied life-science, the explosion of fluorescence-based techniques
has accelerated the research pace in many fields including genomics, proteomics and medical diagnosis. Particularly interesting is the single molecule analysis, that allows, for example, to obtain
information on the activity of a single molecule, or on its conformational states. These properties
are usually hidden in averaged ensemble measurements. However, advanced Fluorescence-based
Techniques, and specially Single Molecule Analysis require suitable detectors, characterized by
high sensitivity and low noise. In time resolved analysis, even high time resolution is of the utmost
importance, because the fluorescence lifetime can be as low as 100ps or less. Moreover, a quite
large active area diameter, at least in the order of 50um, is very useful in practice to obtain high
collection efficiency without a very expensive optics. Our main research focus has been the development of single photon avalanche diodes (SPADs) with large active area and low dark counting
rate. Particularly, devices with an active diameter ranging from 20um to 100um have been realized,
and deeply characterized. The room temperature dark counting rate is low, ranging from 300c/s
for a 20um device to 4kc/s for a 100um device. The suitably-designed fabrication process has thus
allowed to overcome one of the main problems of the previous generation of SPAD devices: the
steep increase of the noise with the diameter; actually the noise scales linearly with the device active
area. The device noise has been characterized also as a function of the temperature; a moderate
cooling to -15C/-20C, easily performed by means of a Peltier cooler, can reduce the noise of about
30 times. A known problem of large area SPADs was the reduction of the time resolution with the
increase in the active diameter, due to the avalanche propagation mechanism. Actually very good
time resolution of about 30ps were obtained only with diameter as low as 10-20um.Using suitable
current pick circuit and sensing the avalanche at very low level, we obtained an unprecedented time
resolution of 35ps FWHM, independently of the detector diameter, ranging from 20um to 100um.
204
[1] A. Gulinatti, P. Maccagnani, I. Rech, M. Ghioni, S. Cova ”35 ps time resolution at room
temperature with large area single photon avalanche diodes” Electronics Letters, 41, n.5, 71 - 72
(2005)
[2] A. Gulinatti, I. Rech, P. Maccagnani, M. Ghioni, S. Cova ”Large-area avalanche diodes for
picosecond time-correlated photon counting”, Proc. of 35th European Solid-State Device Research
Conf., ESSDERC 2005, 12-16 Sept. 2005, pp. 355 358 (2005)
HIGH-RATE PHOTON COUNTING AND PICOSECOND TIMING WITH
SILICON-SPAD
S. Cova, I. Rech, A. Gulinatti, M. Ghioni, F. Zappa, I. Labanca
Many applications based on time-correlated single-photon counting techniques require to operate at high repetition rates in order to reduce the measurements time. This is particularly
important when the apparatus is used, for example, to perform in vivo analysis or to study the
temporal evolution of a certain phenomenon. Our research focused on the development of the
electronics needed to operate the Single Photon Avalanche Diodes (SPADs) at high counting rates
without sacrificing the time resolution performance. In particular the designed circuitry allows to
drastically limit the broadening of the detector time response at high counting rate. Some compact
photon timing modules have been produced to evaluate the system performance in some of the
most demanding applications. For example a module has been used at the European Synchrotron
Research Facility (ESRF) of Grenoble (France) to monitor the electron beam longitudinal profile.
This the application, besides a high dynamic range and a good time resolution, required also a high
repetition rate in order to perform a real time monitoring of the system. As another example, a
module has been used in quantum cryptography applications, where the capability of operating at
high repetition rates is definitely an advantage because it allows to increase the communication bit
rates.
[1] A.Giudice, M.Ghioni, R.Biasi, F.Zappa, S.Cova ”High-rate photon counting and picosecond timing with silicon-SPAD based compact detector modules” Proceedings of Single Photon Workshop
2005, Source, Detectors, Applications and Measurement Methods, 24-26 October 2005, National
Physical Laboratori Teddington, UK.
[2] K. Gordon, V. Fernandez, G. Buller, I. Rech, S. Cova, and P. Townsend, ”Quantum key
distribution system clocked at 2 GHz” Optics Express, 13, pp. 3015-3020 (2005)
[3] Karen J. Gordon, Veronica Fernandez, Robert J. Collins, Ivan Rech, Sergio D. Cova, Paul D.
Townsend, and Gerald S. Buller ”3.3 Gigahertz Clocked Quantum Key Distribution System” Proc.
205
of the European Conf. on Optical Communications (ECOC 2005), Vol. 4, pp. 913-914, Glasgow,
UK, Sept. 2005.
[4] Gerald S. Buller, Karen J. Gordon, Veronica Fernandez, Robert J. Collins, Sara Pellegrini,
Sergio D. Cova, and Paul D. Townsend ”An Approach to High Key Exchange Rate Quantum Key
Distribution in Optical Fibres” Proceedings of the European Conference on Optical Communications (ECOC 2005), Volume 5, pp. 63-66, Glasgow, UK, September 2005
[5] S.C. Hutchins, G.S. Buller, K.J. Gordon, S. Pellegrini, S. Cova, M. Ghioni, A. Gulinatti, I. Labanca, I. Rech, ”Single Photon Detector Tests For The LHC Synchrotron Light Diagnostics”, Proc.
of the 7th European Workshop on Beam Diagnostics and Instrumentation for Particle Accelerators,
6 - 8 June, 2005, pp. 63-65 (2005)
SINGLE-PHOTON IMAGING AT 20,000 FRAMES/S
F. Zappa, S. Tisa, A. Gulinatti, S. Cova
Goal of this research was the fabrication of a system based on a silicon monolithic array of 60
photon-counters (SPADA, Single-Photon Avalanche Diode Array), for the visible wavelength range.
The system shows state-of-the-art performances, achieving single-photon sensitivity in the visible
range, together with low noise, high frame rate and parallel readout. The research focused on
astrophysical applications, such as Adaptive Optics, Fast Transient Imaging (for instance of optical
counterparts of gamma-ray bursts) and Atmospheric Layer Sensing, but the system can be used for
any counting application that requires a small number of very highly sensitive detectors operated at
high frame rate. Traditional CCDs can not be operated at the high frame rates required by these
demanding applications without severely degrading the SNR. Whereas some research group is
attempting to develop systems with such requirements based on EM-CCDs (Electron-Multiplying
CCDs), the apparatus originated from this research is the first to employ a monolithic array of
Single-Photon Avalanche Diodes. The 60-pixels monolithic array of fully parallel photon counters
are operated at low voltage (below 30 V) and at high frame rates (up to 20 kHz), thanks to the use
of specifically designed Integrated Active Quenching Circuits. The array sports also nanosecond
gating in order to be used with pulsed laser applications (such as Atmospheric Layer Sensing).
Photon Detection Efficiency is remarkably uniform over the entire sensor, with a 60% peak at
550 nm, and dark-counting rate can be reduced below 1kcps for each pixel with moderate cooling
(-10◦ C). Applications are planned in adaptive optics, for the auxiliary telescopes of the European
Southern Observatory (ESO), in fluorescence measurements, and in fast-transient imaging.
[1] F. Zappa, A. Gulinatti, S. Tisa, P. Maccagnani, S. Cova, ”SPADA: Single-Photon Avalanche
Diode Arrays”, Photonics Technology Letters, vol. 17, no. 3, March 2005, pp. 657-659.
206
[2] F. Zappa, S. Tisa, S. Cova, P. Maccagnani, R. Saletti, and R. Roncella, ”Single-photon imaging
at 20,000 frames/s”, Optics Letters, Vol. 30, Issue 22, pp. 3024-3026, November 2005.
PHOTON-COUNTING CHIP FOR AVALANCHE DETECTORS
F. Zappa, S. Tisa, A. Gulinatti, A. Gallivanoni, I. Labanca, S. Cova
When very weak and/or ultrafast optical signals must be measured, the detection of single
photons is widely employed. The intensity of slowly varying optical signals is measured by counting detected photons during measurement time slots. Many fields of industry and science demand
suitable photon-counting modules: single molecule detection, fluorescence spectrometry, quantum
cryptography, etc. Avalanche photodiodes efficiently exploit single-photon sensitivity when operated in Geiger-mode, biased above breakdown voltage. Though compact and performing detection
modules are commercially available, our purpose was to conceive and fabricate the first ever reported all-inclusive chip, able to detect and count single-photons in the visible and near-infrared
wavelength range. Even if traditionally SPADs are fabricated using dedicated processes that require additional technological steps when compared to standard CMOS, we developed the first
ever-reported monolithic single photon counter in a standard CMOS technology. The obtained
performances, especially detection efficiency (with a 45% peak at 550 nm) and timing resolution
(down to 36 ps FWHM), positively compare with those of detectors built in custom processes.
The detector is monolithically integrated together with an Active Quenching Circuit, in an ASIC
comprising also a counter and a serial interface, thus opening the way to the design and fabrication
of ultra compact multi-channel single-photon counters.
[1] F. Zappa , A. Lotito, S. Tisa, ”Photon-Counting chip for Avalanche Detectors”, Photonics
Technology Letters, vol. 17, no. 1, January 2005, pp. 184-186.
[2] F. Zappa, S. Tisa, A. Gulinatti, A. Gallivanoni, S. Cova, ”Complete single-photon counting
and timing module in a microchip”, Optics Letters, Volume 30, Issue 11, 1327-1329, June 2005.
[3] S. Tisa, F. Zappa, I. Labanca, ”On-chip Detection and Counting of Single-Photons”, Proceedings of IEDM 2005, Dec. 2005, Washington DC, USA.
207
NON-INVASIVE OPTICAL TESTING OF INTEGRATED CIRCUITS
A. Tosi, F. Zappa
Dense integrated circuits (IC) working at high frequency and low voltages require testing tools
that allow for non-invasively probing internal node signals. Techniques such as Emission Microscopy
(EMMI), Picosecond Imaging for Circuit Analysis (PICA) and Time-Resolved Emission (TRE)
exploit the spontaneous hot-carrier photoemission from MOSFET in order to measure internal
signals. Aim of this research is the extension of the capability of TRE technique by introducing an
ultra-fast single-photon detector, the Single-Photon Avalanche Diode (SPAD). The combination
of the SPAD detector with an imaging time-integrating detector (e.g. a CCD camera) constitutes
a powerful tool for IC testing, able to localize the failing transistors and to analyze the timing
information. A main improvement for the experimental setup is the capability to perform backside
measurements. In fact, multiple metal layers and flip-chip packages prevent to measure optical
signals from the front side of the chips. Therefore, only by means of optical backside investigations,
after substrate thinning, it is possible to achieve information from signals at transistors level.
Unfortunately, all available packages are mostly designed for electrical testing and they do not
take into account the requirements of optical testing from the backside. We introduced a newly
invented packaging method, called ”Glass Attached Chip” (GAC), specifically designed to hold a
thinned chip for optical testing from the backside. The proposed solution provides both electrical
connections to the device under test and optical access through the silicon substrate and it can
be used for PICA-like techniques, EMMI investigations, LVP, TLS, PLS and other failure analysis
methods that require optical access to the transistor level through the silicon backside. Applications
and measurements proved that the GAC package is a valid tool for backside testing of wire-bond
chips. The TRE technique has been used to test and debug a complex integrated circuit, an IBM
link chip processor. In this work we have shown that the Time-Resolved Emission (TRE) technique
using the Superconducting Single-Photon Detector (SSPD) allows the detailed characterization of
the performances of a Self-Timed Interface (STI) used in high-speed chip-to-chip communication.
Through a backside access, it was possible to detect light pulses from both n-FET and p-FET and
therefore measure pulse width variations along the delay chain. In this way we were able to observe
a distortion of the duty cycle of the waveforms and a progressive shrinking of the pulse width. As
a consequence, very narrow pulses disappear before reaching the end of the delay line, thus causing
the circuit to fail. Design changes were implemented based on the measurements discussed here
to correct this problem in newer releases of the chip. This case study proved the ability of the
non-invasive optical testing to find hidden problems inside a scaled integrated circuit.
[1] A. Tosi, F. Stellari, F. Zappa, ”Innovative packaging technique for backside optical testing of
wire-bonded chips”, Microelectronics Reliability, Vol. 45, Issue 9-11, September - May, 2005, pp.
1493-1498.
[2] F. Stellari, P. Song, J. Hryckowian, O. A. Torreiter, S. Wilson, P. Wu, A. Tosi, ”Characterization
of a 0.13 um CMOS Link Chip using Time Resolved Emission (TRE)”, Microelectronics Reliability,
Vol. 45, Issue 9-11, September - May, 2005, pp. 1550-1553.
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DESIGN AND CHARACTERIZATION OF INGAAS/INP SINGLE-PHOTON
AVALANCHE DIODE FOR NEAR-INFRARED WAVELENGTHS.
A. Tosi, S. Cova, F. Zappa, M. Ghioni
Single-photon counting and single-photon timing in the near-infrared (NIR) range (800 nm –
1700 nm) have become increasingly important in a number of applications such as quantum key
distribution (QKD), non-invasive testing of VLSI circuits, time-resolved photoluminescence, optical
time-domain reflectometry (OTDR), and time-of-flight laser ranging and imaging. Silicon-based
Single-Photon Avalanche Diodes (SPAD) are currently available with remarkable performance up
to wavelengths of 1 m. However, system developers who wanted to use single photon detectors
for the NIR range had to sample the commercially available linear APDs in order to select those
with best single photon performance. In fact, the optimization of InGaAs/InP SPADs for detecting
single photons requires design approaches that are quite distinct from those shown to be effective in
optimizing APD linear mode performance. We designed, fabricated and characterized InGaAs/InP
Single-Photon Avalanche Diodes (SPAD), which have been specifically designed for single-photon
detection. We analyzed the temperature dependence of the device detection efficiency, dark count
rate, afterpulsing and timing jitter. We studied the variation in epitaxial layer doping concentrations and thicknesses that leads to variations in the internal electric field profile and therefore in
SPAD performance. We have taken advantage of these variations to compare geometrically identical
devices which have been taken from different parts of the wafer. Thanks to the deep device characterization, we identified working conditions that optimize the detector performance. InGaAs/InP
SPAD simultaneously exhibits a dark count rate of 10 kHz at a detection efficiency of 20% with
timing jitter of 100 ps at 200 K, and with appropriate performance tradeoffs, we demonstrate a
200 K dark count rate as low as 3 kHz, a detection efficiency as high as 45%, and a timing jitter as
low as 30 ps. Finally, we developed a front-end electronics for properly operating the SPAD and
reading the avalanche signal in gated-mode. A newly developed circuit for reading signals allowed
us to attain remarkable performance in terms of timing jitter (less than 30 ps-FWHM).
[1] Mark A.Itzler, Rafael Ben-Michael, Chia-Fu Hsu, Krystyna Slomokowski, Alberto Tosi, Sergio
Cova, Franco Zappa, Radu, Ispasoiu, ”Single photon avalanche diodes for 1.5 m photon counting
applications”, Proceedings of Single Photon Workshop 2005, Source, Detectors, Applications and
Measurement Methods, 24-26 October 2005, National Physical Laboratori Teddington, UK.
[2] G.S.Buller, S.Pellegrini, R.E.Warburton, J.P.R.David, J.Shien Ng, A.Krysa, K. Groom, L.
Tan, S. Cova, ”Fabrication and characterization of InGaAs/InP single-photon avalanche diode
detectors”, Proceedings of Single Photon Workshop 2005, Source, Detectors, Applications and
Measurement Methods, 24-26 October 2005, National Physical Laboratori Teddington, UK.
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ADAPTIVE DIGITAL PROCESSING OF PULSES
G. Ripamonti, A. Geraci, R. Abbiati
Digital processors for pulse processing have been intensively investigated and developed in
many fields of application as an alternative to classic analogue systems. This interest is due to
the intrinsic adaptivity, easiness of calibration and capability to obtain signal-to-noise ratios very
close to the optimum one. This research deals with the design, realization and test of a general
purpose digital instrumentation for signal processing of random pulses analysis with throughput up
to 100 kevents/sec, whose features and performances are comparable or superior to state-of-the-art
analogue designs. Implementations of processors for different application environments have been
carried out. The systems have been configurated as high resolution amplitude spectrometers and/or
as units capable to time the occurrence of pulses of random amplitude arriving randomly in time.
The achieved energy resolutions are below those of the state-of-the-art of analogue instruments.
Also timing resolution is better than a sampling interval. The set-up is based on programmable
logic (Field Programmable Gate Array - FPGA) and DSP (Digital Signal Processor) technology.
In order to get advantages of spatial computing in programmable devices, data-path structures of
temporal computing process techniques have been revised and new processing architectures have
been conceived. Among relevant improvements consequent to these optimizations are the reduction
of processing speed, time-continuous processing operation and adaptive dynamic management of
numeric filters length.
[1] R. Abbiati, E. Gatti, A. Geraci, G. Ripamonti ”A new digital estimation technique for baseline
restoration” Elsevier - Nuclear Instruments and Methods in Physics Research A, 548, 507-516, June
2005
[2] R. Abbiati, A. Geraci, G. Ripamonti ”A New Filter Concept Yielding Improved Resolution and
Throughput in Radiation Detection Systemws” IEEE Transactions on Nuclear Science, Volume 52,
Issue 4, Aug. 2005 Page(s):950 953.
[3] Restelli, R. Abbiati, A. Geraci ”Digital field programmable gate array-based lock-in amplifier for
high-performance photon counting applications” Review of Scientific Instruments, Vol.76, Number
9, September 2005, pp.93112-1/93112-8.
[4] R. Abbiati, A. Geraci, G. Ripamonti ”A New Filter Concept Yielding Improved Resolution and
Throughput in Radiation Detection Systemws” IEEE Transactions on Nuclear Science, Volume 52,
Issue 4, Aug. 2005 Page(s):950 953.
[5] R.Abbiati, S.Scarpaci, A.Geraci, E.Gatti, G.Ripamonti ”A new statistical approach for digital
triggering of events from radiation detectors” 2005 IEEE Nuclear Science Symposium, October 23
- 29, 2005, Wyndham El Conquistador Resort, Puerto Rico, CDROM.
[6] M.Buffa, R.Abbiati, A.Geraci, G.Ripamonti ”Configurable digital data system for simulation
and processing of detected events” 2005 IEEE Nuclear Science Symp., October 23-29, 2005, Wyndham El Conquistador Resort, Puerto Rico, CDROM.
210
[7] R.Abbiati, L.Bertossi, A.Geraci, E.Gatti, G.Ripamonti ”High-resolution digital on-line linear
procedure for timing of detected events” 2005 IEEE Nuclear Science Symp., October 23 - 29, 2005,
Wyndham El Conquistador Resort, Puerto Rico, CDROM.
[8] A.Geraci, R.Abbiati, E.Gatti, G.Ripamonti ”New signal conditioning architecture for optimal
A/D conversion in digital spectrosopy setups” 2005 IEEE Nuclear Science Symp., October 23 - 29,
2005, Wyndham El Conquistador Resort, Puerto Rico. , CDROM.
AUTOMATIC TECHNIQUE OF OPTIMAL FILTERS SYNTHESIS
E. Gatti, G. Ripamonti, A. Geraci, R. Abbiati
A completely automatic procedure to derive the coefficients of numerical filters of digital pulse
processors corresponding to the optimum weight functions has been implemented. The shape of
the synthesised filter can be customized for yielding the optimum filter in the actual experimental conditions with arbitrary constraints: e.g., necessity of time-limited filters for input signals
of arbitrary shape, lorentzian noise spectral density components, presence of 1/f current noise
smoothed-to-white at low frequency, timing filters, etc. The method has been translated into a
computer program and has been used as a tool for optimising a digital signal processing spectroscopy set-up in its digital filter section. We have also introduced a filtering method capable of
completely eliminating the effects of unwanted periodic disturbances occurring in high resolution
spectroscopy setups, while still minimizing the effects of electronic noises. The theory has been
been highlighted and implementation issues are challenged.
[1] R. Abbiati, A. Geraci, G. Ripamonti ”Analog shaping optimization for digital processing of
radiation detector signals”, IEEE Transactions on Nuclear Science, Volume 52, Issue 5, Part 3,
Oct. 2005 Page(s):1638 1642.
[2] S. Riboldi, R. Abbiati, A. Geraci, E. Gatti ”Experimental Comparison of State-of-the-art
Methods for Digital Optimum Filter Synthesis with Arbitrary Constraints and Noise”, Proc. of
2004 IEEE Transactions on Nuclear Science, Volume 52, Issue 4, Aug. 2005 Page(s):954 958.
MODENA E REGGIO EMILIA
211
Dipartimento di Ingegneria dell’Informazione,
Dipartimento di Scienze e Metodi dell’Ingegneria
e Dipartimento di Fisica
Research topics
1) DESIGN OF RF INTEGRATED CIRCUITS
L. Larcher, A. Mazzanti, M. Borgarino, R. Brama, M. Pifferi
Collaborations: ST-Microelectronics, Univ. Pavia, Univ. Pisa, Univ. Parma, Univ. Perugia.
2) COMPOUND SEMICONDUCTOR FIELD EFFECT TRANSISTORS FOR RF
POWER APPLICATIONS
C. Canali, A. Chini, G. Verzellesi
Collaborations: Selex S.I., Univ. of Padova, Politechnic of Torino, Univ. of Roma Tor Vergata,
Univ. of Bologna (Dept. of Physics), University of California, Santa Barbara (USA), Research
Centre Jülich (Germany).
3) CHARACTERIZATION AND MODELING OF THE LOW FREQUENCY NOISE
PROPERTIES OF BIPOLAR TRANSISTOR
M. Borgarino, F. Fantini
Collaborations: University of Bologna.
4) CHARACTERIZATION AND MODELING OF NON VOLATILE MEMORY
CELLS
P. Pavan, L. Larcher
Collaborations: Univ. Padova, Univ. Ferrara, Univ. ”La Sapienza” Roma, Politecnico di Milano,
IU.net, ST-Microelectronics, Saifun Semiconductors Ltd.
5) CHARGE TRANSPORT IN CONVENTIONAL DEVICES AND MESOSCOPIC
STRUCTURES
R. Brunetti, C. Jacoboni, P. Bordone, F. Affinito, F. Buscemi, E. Piccinini, E. Cancellieri
Collaborations: Dr. Andrea Bertoni, INFM-S3, Dr. Marcello Rosini (Univ. Lecce), Prof. M.
Rudan e Dr. S. Reggiani (Univ. di Bologna), Prof. E. Di Zitti (Univ. di Genova), Dr. L. Demeio
(Univ. di Ancona), Prof. P. Carloni (SISSA, Trieste), Prof. L. Reggiani (Univ. di Lecce), Prof. L.
Sorba (Univ. di Modena e Reggio E.), Dr. Giulio Ferrari (Univ. Glasgow, UK).
212
6) BIOMEDICAL INSTRUMENTATION
L. Rovati, M. Bonaiuti, G. Salvatori, S. Cattini
Collaborations: Univ. Brescia, Univ. Pavia, Univ. Bologna, Tetrapak spa.
7) RADIATION DETECTORS ON 4H-SIC AND HIGH-RESISTIVITY SI
F. Nava, C. Canali, G. Verzellesi
Collaborations: INFN, Selex S.I., ITC-irst, Univ. Bologna, Politecnico di Milano, Univ. of Trento,
Univ. of Trieste, Univ. of Pisa.
8) THICK FILM RESISTORS AND SENSORS
M. Prudenziati, B. Morten
Collaborations: Prof. Jacob Hormadaly, Zandman Center for thick film microelectronics and Department of Chemistry, Ben-Gurion University of the Negev, Dott. Sunit Rane (Centre for Materials for Electronics Technology, Panchawati, Pune-India).
9) RELIABILITY OF ELECTRONIC SYSTEMS
F. Fantini, L. Cattani, G. Cassanelli
Collaborations: Spal spa, Magneti Marelli Powertrain, Thermowatt spa, Digitek spa, Cnh, Prof.
M. Vanzi (DIEE Cagliari).
10) STEER-BY-WIRE SYSTEMS FOR OFF-HIGHWAY APPLICATIONS
A. Bertacchini, P. Pavan
Collaborations: Ognibene spa, Univ. Parma.
213
DESIGN OF RF INTEGRATED CIRCUITS
L. Larcher, A. Mazzanti, M. Borgarino, R. Brama, M. Pifferi
The activity on RF design of Silicon integrated circuits involves several research projects. We
focused on the analysis and design of injection locked CMOS oscillators and analog regenerative dividers for quadrature Local Oscillator(LO) signal generation. We designed switched class-E power
amplifiers and successfully tested prototypes exploiting 22dBm output power at 1.95 GHz with 18
dB power gain and 70% drain efficiency. Now, we are working toward the design Clock and Data
Recovery circuits for S-ATA, SSH and Fiber Channel standards. Moreover in the framework of
the PRIN2002 entitled ”Multi-standard 5-6GHz transceiver front-end for domotic WLAN”, an I/Q
demodulator and a transmitter for a sliding-IF architecture transceiver for the IEEE801.11a and
HyperLAN2 standards have been designed in SiGe BiCMOS technology, laid out, and successfully
tested. Research activity is also started on the design of a Ku-band down-conversion mixer to be
implemented in a 90nm CMOS technology. The activity is in the framework of the PRIN2005 entitled ”Silicon Integrated Radiometer for Fire Prevention and Civil and Environmental Safeguard”.
Further research activity is also in progress in the UWB field. In particular, attention is focused
on the design of a fast switching synthesizer for OFDM UWB transceivers and on the design of a
24GHz radar for automotive applications.
[1] A. Mazzanti, L. Larcher, R. Brama, and F. Svelto, ”A 1.8GHz 22dBm 65% PAE CMOS switched
Power Amplifier”, IEEE Radio Frequency Integrated Circuit Conference, Long Beach (CA), pp.
425-428, 2005.
[2] A. Mazzanti, L. Larcher, F. Svelto, ”Balanced CMOS LC-tank analog frequency dividers for
Quadrature LO Generation”, Proc. of the IEEE Custom Integrated Circuit Conference, pp. 570573, Sept. 18-21, 2005.
[3] F. Alimenti, M. Borgarino, R. Codeluppi, V. Palazzari, M. Pifferi, L. Roselli, A. Scorzoni,
”Building Blocks for a 5GHz WLAN Transmitter in 0.35mm Si/SiGe BiCMOS”, TARGET Workshop, XI Giornata sullIngegneria delle Microonde, 14-15 April, 2005, Orvieto (Italy).
[4] F. Alimenti, M. Borgarino, R. Codeluppi, V. Palazzari, M. Pifferi, L. Roselli, A. Scorzoni, F.
Fantini, ”Design of RFICs in 0.35mm Si/SiGe BiCMOS Technology for a 5GHz Domotic Transmitter”, Proceedings ECWT2005, pp. 473-476, Paris (France).
214
COMPOUND SEMICONDUCTOR FIELD EFFECT TRANSISTORS FOR RF
POWER APPLICATIONS
C. Canali, A. Chini, G. Verzellesi
This research activity addresses the power-performance-limiting phenomena and the hotelectron reliability of GaAs- and GaN-based field-effect transistors for RF power applications.
Specific results published in 2005 can be summarized as follows.
(i) The light sensitivity of current Deep-Level Transient Spectroscopy (I-DLTS) has been analyzed with the aim of gaining insight about the physics of surface-trap-related dc-to-RF dispersion
effects in AlGaAs-GaAs heterostructure field-effect transistors [1]. I-DLTS experiments under dark
have revealed three surface-trap levels with activation energies 0.44 eV (h1), 0.59 eV (h2), and 0.85
eV (h3), as well as a bulk trap with activation energy 0.45 eV (e1). While the I-DLTS signal peaks
associated with the two shallower surface traps h1 and h2 are suppressed by optical illumination
with energy larger than the AlGaAs bandgap, that associated with the deepest surface trap h3 is
nearly unaffected by light up to the highest intensity adopted. Two-dimensional device simulations
assuming that surface traps behave as hole traps have provided an interpretation for the observed
different light sensitivity of surface traps, explaining it as the result of the temperature dependence
of surface hole concentration and negative trap-charge density, making trap-charge modulation at
increasing temperature less and less sensitive to excess carriers generated by light.
(ii) Long-term on-state and off-state hot-electron stress tests have been carried out on unpassivated GaN/AlGaN/GaN HEMTs on SiC substrates [3]. Thanks to the thin GaN cap layer, devices
show minimal current-collapse effects prior to hot-electron stress, despite they are not passivated.
This comes at the price of a relatively-high gate-leakage current. Under the assumption that donorlike electron traps are present within the GaN cap, two-dimensional numerical device simulations
explain the current-collapse immunity of GaN/AlGaN/GaN HEMTs as the result of the partial
compensation of the negative polarization charge that is present at the GaN-AlGaN interface. The
higher the ionized donor charge, the higher, however, the free electron density and the conductance of the GaN layer, this explaning the observed reverse correlation between current-collapse
magnitude and gate-leakage current. Both on-state and off-state stresses produce simultaneous
current-collapse increase and gate-leakage-current decrease, which can be interpreted to be the result of gate-drain-surface degradation and/or reduced gate electron injection. This study has shown
that, although the thin GaN cap layer is effective in suppressing surface-related dispersion effects
in virgin devices, it does not, per se, protect the device from hot-electron degradation and should
to this aim be adopted in conjunction with other technological solutions like surface passivation,
pre-passivation surface treatments and/or field-plate gate.
(iii) The pulsed and RF power performance of passivated AlGaN-GaN HEMTs obtained by
two different gate evaporation process have been investigated [4]. Devices with a self-aligned gate
evaporation showed larger dispersion with respect to those where an angled evaporation was performed. The improvement observed with pulsed measurements was then confirmed also by RF
power measurement. Devices with self-aligned gate evaporation yielded an output power density
of 1.5W/mm with a 40 % peak PAE. On the other hand, HEMTs with angled gate evaporation
215
yielded 2.4 W/mm of output power density with a 54 % peak PAE. Due to the SiN lateral overetch
prior to the gate metalization step, devices with a self-aligned gate evaporation have unmetallized
surface regions. The poorer performances of the self-aligned devices have therefore to be related to
these surface regions that are not covered by the gate metal, and that have been exposed to the
SiN CF4 /O2 dry etch process.
(iv) N-face GaN HEMTs have been succesfully fabricated and characterized [5]. A dedicated
process flow was developed due to the fact that N-face GaN material is etched by the photoresist
developer that is commonly used for the fabrication of semiconductor devices. Before each lithography step a thin layer of Ge (germanium) was evaporated on top of the wafer, and then removed,
after PR development, by means of an H2 O2 wet-etch. Devices have also been tested by means
of C-DLTS, gate-lag and I-DLTS measurement tecniques in order to investigate the effect of DC
to RF dispersion that were present in the N-face GaN HEMTs [6], similarly to waht happen for
the more common Ga-face GaN HEMTs. C-DLTS measurement performed on a large area diode
(200 µm diameter) showed two different behaviors with respect to the test condition. Filling pulses
yielded an electron trap (e1 ) with Ea =0.28eV, while emptying pulses yielded an hole trap (h1 ) with
Ea =60meV that has been located at the AlGaN on GaN interfaces. When performing gate-lag
measurement on the fabricated HEMT, we observed evidence of both e1 and h1 , and an additional
hole-like trap h2 . Emptying pulses showed that the drain current transient was given by the sum of
two exponential decays. The fast one yielded an Ea of 60meV (h1 ) while the slow one yielded an Ea
of 25meV (h2 ). When using filling pulses, evidence of e1 was observed. We also observed a hole-like
exponential decay whose Ea was 25meV (h2 ). Since h2 was measured only in HEMTs, where both
bulk and surface traps can affect the transient response, we concluded that h 2 is a surface trap
state, while e1 and h1 are bulk trap states. Both filling and emptying pulses on HEMTs showed
transients dominated by hole-like behaviors, thus suggesting that h1 (bulk trap) and h2 (surface
trap) are the most important traps in limiting device performance.
[1] G. Verzellesi, A.F. Basile, A. Cavallini, A. Castaldini, A. Chini, C. Canali, ”Light sensitivity
of current DLTS and its implications on the physics of DC-to-RF dispersion in AlGaAs-GaAs
HFETs”, IEEE Transactions on Electron Devices, vol. 52(4), pp. 594-602, Apr. 2005.
[2] G. Verzellesi, G. Meneghesso, A. Chini, E. Zanoni, C. Canali, ”DC-to-RF dispersion effects in
GaAs- and GaN-based heterostructure FETs: performance and reliability issues”, Microelectronics
Reliability, vol. 45, pp. 1585-1592, 2005. [INVITED PAPER 16th European Symposium on
Reliability of Electron Devices (ESREF’05), Bordeaux (France), Oct. 2005].
[3] G. Meneghesso, R. Pierobon, F. Rampazzo, G. Tamiazzo, E. Zanoni, J. Bernat, P. Kordos, A.F.
Basile, A. Chini, G. Verzellesi, ”Hot-electron-stress degradation in unpassivated GaN/AlGaN/GaN
HEMTs on SiC”, Proc. of the 43rd IEEE International Reliability Physics Symposium (IRPS), pp.
415-422, San Jose (USA), Apr. 2005.
[4] A. Chini, M. Peroni, P. Romanini, C. Lanzieri, V. Teppati, V. Camarchia, A. Passaseo, G.
Verzellesi, ”Effect of CF4 /O2 plasma damage on AlGaN/GaN HEMTs”, Proc. of the 14th European
Workshop on Heterostructure Technology (HeTech’05), Smolenice Castle (Slovakia), Oct. 2005.
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[5] A. Chini, S. Rajan, M. H. Wong, Y. Fu, J. S. Speck, U. K. Mishra, ”Fabrication and Characterization of N-Face AlGaN/GaN/AlGaN HEMTs”, Device Research Conference (DRC) 2005.
Santa Barbara (US), 20-22 June 2005
[6] A. Chini, Y. Fu, S. Rajan, J. S. Speck, U. K. Mishra, ”An experimental method to identify
bulk and surface traps in GaN HEMTs”, International Symposium on Compound Semiconductors
(ISCS), Freiburg (Germany) 18-22 September 2005.
CHARACTERIZATION AND MODELING OF THE LOW FREQUENCY NOISE
PROPERTIES OF BIPOLAR TRANSISTORS
M. Borgarino, F. Fantini
The research activity was aimed to improve the automatization degree as well as the measurement accuracy of the experimental set-up for the low frequency noise characterization of bipolar
transistors developed during the previous year. The implementation of automated bias networks
for the device under test is the typical trouble to be faced during the realization of a full automated experimental set-up for low frequency noise characterization. Stabilized power suppliers and
active electron devices can not be indeed employed, because of the introduced 50Hz interferences
and the low frequency noise level, respectively. For this reason, the bias point is usually manually
driven by the operator. In the present research activity this limitation was overcome through the
use of stepper motors mechanically driving the bias networks. This solution allowed to get a high
automatization degree of the experimental set-up. A further introduced improvement concerned
the measurement accuracy. When the device under test to be characterized exhibits high noise
levels and low input dynamic input impedances, serious experimental difficulties rise up, in particular concerning the integrity of the characterization of the power spectral densities of the collector
current fluctuations and of their correlation with the base current fluctuations. This limitation in
the accuracy has been first theoretically investigated. On the basis of the obtained indications,
a solution has been then proposed, implemented in the automated experimental set-up, and successfully tested on GaAs-based Heterojunction Bipolar Transistors. The solution consisted in a
suitable cascade of a very low noise common-base amplifier and a mu-metal shielded transformer.
The carried out research activity in this field allowed therefore to get a high automatization degree,
high accuracy low frequency noise experimental set-up for bipolar transistors. The research activity
was carried out in the framework of the PRIN2003 entitled Non-linear noise models and design of
low phase-noise oscillators for high performance communication systems.
[1] M. Borgarino, ”Full direct low frequency noise characterization of GaAs Heterojunction Bipolar
Transistors”, Solid-State Electronics, vol. 49, 2005, pp. 1361-1369.
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[2] M. Borgarino, M. Rossi, F. Fantini, ”Low Noise, Low Interference Automated Bias Networks
for Low frequency Noise Characterization Set-Ups”, Proceedings GAAS2005, pp. 411-414, Paris
(France).
CHARACTERIZATION AND MODELING OF NON VOLATILE MEMORY
CELLS
P. Pavan, L. Larcher
We have continued the research activity concerning the characterization and the modeling of
traditional and emerging non-volatile memories. Specifically, the research activity we carried out
has been focused on using the statistical model of Stress Induced Leakage Current (SILC) to
investigate the effects of leakage current on the reliability of Flash memory arrays. We investigated
complex issues involved in Flash memory integration in Systeom on a Chip. Finally, we are working
also on emerging non-volatile memories, and specifically on NROM devices. We are investigating
and developing new experimental techniques to characterize NROM devices and their reliability.
[1] L. Larcher and P.Pavan, Statistical Simulations of Oxide Leakage Current in MOS Transistor
and Floating Gate (invited paper) Workshop on Compact Modeling-Nanotech 2005, Los Angeles
(CA, USA), pp. 117-122, 2005.
[2] L. Larcher, P. Pavan, and A. Maurelli, Flash memories for SoC: an overview on system constraints and technology issues (invited paper), IEEE-IWSoC2005, Banff (Alberta, Canada), pp.
73-77, 2005.
[3] G.Cellere, L. Larcher, A. Paccagnella, A. Visconti, M. Bonanomi, Radiation Induced Leakage
Current in Floating Gate memory cell, IEEE NSREC 2005, Seattle (USA), 2005.
[4] G. Cellere, L. Larcher, A. Paccagnella, A. Visconti, M. Bonanomi, Radiation Induced Leakage
Current in Floating Gate Memory Cells IEEE Transaction on Nuclear Science, Vol. 52, no. 6, pag.
2144-2152, 2005.
CHARGE TRANSPORT IN CONVENTIONAL DEVICES AND MESOSCOPIC
STRUCTURES
R. Brunetti, C. Jacoboni, P. Bordone, F. Affinito, F. Buscemi, E. Piccinini, E. Cancellieri
The scientific activity in the year 2005 has been focused on the following topics.
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Quantum coherent transport in nanostructures
In the past years a strong attention has been focused on the optical and transport properties
of Inx Ga1−x Asheterostructures due to the possibility of tailoring material parameters such as the
electron effective mass, and the band gap, by changing the indium content x in the alloy. It was
demonstrated that a defect-free region with an arbitrary indium concentration can be obtained both
on GaAs and InP substrates by inserting a step-graded buffer layer with increasing indium composition in order to smoothly adapt the lattice constant of the substrate to the one of the topmost
layer. In the defect-free region the electron mobility can be made higher than 20 m 2 /(V s), making
these materials very promising for electronic and optical applications. Recent experiments on such
kind of structures, carried at the TASC-INFM-CNR laboratory in Trieste by the research group of
Professor L.Sorba, have shown the limits of the standard theoretical and simulative framework.
Our group is particularly interested in further investigating the discrepancy between theoretical
and experimental data. From the theoretical point of view the most suitable approach to the
simulation of these systems is the solution of the two dimensional Schrödinger equation.
The core of the numerical implementation is represented by the calculation of the scattering
states of the potential describing the physical shape and the local chemical composition of the
device. The calculation of the scattering states is performed applying the Quantum Transmitting
Boundary Method. To evaluate the current and the electron mobility within the Landauer formalism, the transmission coefficient at different energies is needed. We have already developed the
serial version of the Schrödinger solver and we are already using it for preliminary simulations.
However, the devices we were able to study up to now, owing to the limited computational power,
are much smaller than the actual experimental ones (1 µm instead of 10 µm). For this reason
we plan to port the code to the parallel version. In our approach, since we are starting from an
exact solution of the Schrödinger equation, the calculated values for the physical quantities do not
depend upon any fitting parameter.
Quantum dissipative transport in nanostructures
The Wigner function formalism developed by the group in the last years has been applied for
studing electron quantum transport in mesoscopic systems. The theoretical approach considers
the dynamical evolution of the electron Wigner function in presence of phonon scattering. An
elaboration of the quantum dynamical equation in terms of Wigner paths formed by free flights
and scattering events is used. These paths are especially suitable for a Monte Carlo solution of
the transport equation for the Wigner function very similar to the semiclassical traditional Monte
Carlo solution of the Boltzmann equation. The wigner paths method has already been used to
evaluate the drift velocity of an electron system, in a homogeneous 3-dimensional Silicon lattice,
for very short time interval (few hundreds of fs) in the case in which the interaction of the electrons
with the phonon baths is treated by means of a fully quantum approach. Now a code for the study
of a 2-dimensional system is under development. The reduction in the dimensions of the system
significantly reduces the computational burdeen, so allowing to simulate of the system for longer
time. This should make possible the evaluation of the decoherence time of an electron interacting
with phonons.
Properties of semiclassical electron transport
An algorithm for the introduction of collisional broadening in semiclassical Monte Carlo simulations of electron transport is under development. The method is suitable for a direct implementation in device modelling, since it can be easily introduced in existing Monte Carlo simulators. The
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scaling of device architecture will shortly require to take into account this effect in simulations.
Conduction and noise properties of ion channels based on first-principle approaches
Our work is focused on the study of the conduction and noise properties of potassium ions
in the KcsA ion channels by means of a coupled Molecular Dynamics/Monte Carlo (MD/MC)
simulation that yields both current and its noise for a single channel under open-gate conditions.
A multi-ion model, based on the existence of ion binding sites inside the protein and at the protein
boundaries, has been adopted. Six binding sites are included in the model and the transition rates
are evaluated from the analysis of free-energy profiles for the possible ion-occupancy configurations
of the channel. The MC approach developed by the Modena group provides a numerical solution of
the kinetic equation and allows to explore a detailed and accurate microscopic model. Furthermore
the simulation can be biased in order to enhance sampling of rare events. Results obtained from the
MD/MC simulation of the ion permeation process include evaluations of the relevant energy barriers
along given transition paths on the free-energy profile, current-voltage characteristics comparable
with experiments and noise power spectra for different transmembrane potentials. The analysis of
open-channel current fluctuations confirms that ion motion within the selectivity filter is strongly
correlated and the evaluation of the Fano factor yields a quantitative estimate of the degree of
correlation between consecutive ion exits from the channel.
[1] F. Affinito, A. Bigiani, R. Brunetti, P. Carloni, C. Jacoboni,E. Piccinini, M. Rudan, “A
simulative method for the analysis of conduction properties of ion channels based on first-principle
approaches”,J. Comput. Electronics, 4 171-174 (2005).
[2] G. Ferrari, P. Bordone, C. Jacoboni, “Electron dynamics inside short-coherence systems”, to
be published in Phys. Lett. A.
[3] L. Demeio, P. Bordone, and C. Jacoboni, “Multiband, non-parabolic Wigner-function approach
to electron transport in semiconductors”, to be published in Transp. Th. Stat. Phys. .
[4] E. Cancellieri, P. Bordone, and C. Jacoboni, “Exchange effects in the Wigner function approach”, Proc. XIV Int. Conf. on Nonequilibrium Carrier Dynamics in Semiconductors, (2005),
to be published.
[5] G. Ferrari, E. Cancellieri, P. Bordone, and C. Jacoboni, “Quantum phonon-limited high-field
electron transport in semiconductors”, Proc. XIV Int. Conf. on Nonequilibrium Carrier Dynamics
in Semiconductors, (2005), to be published.
[6] F. Affinito, E. Piccinini, A. Bigiani, R. Brunetti, C. Jacoboni, and M. Rudan, “Noise properties
of sinle open ion channels: an atomistic approach”, Proc. 4-th International conference on Unsolved
problems on noise and fluctuations in Physics, Biology and High technology, Gallipoli (Le), june
2005.
[7] M. Rudan, A. Marchi, R. Brunetti, and E. Gnani: ”The R- approach to tunneling in nanoscale
devices”, Proc. XIV Int. Conf. on Nonequilibrium Carrier Dynamics in Semiconductors, (2005),
to be published.
[8] E. Piccinini, A. Affinito, R. Brunetti, C. Jacoboni, and M. Rudan: Physical Mechanisms for
ion-current levelling off in the KcsA channel through combined Monte Carlo/Molecular Dynamics
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simulations, Proc. XIV Int. Conf. on Nonequilibrium Carrier Dynamics in Semiconductors, (2005),
to be published.
BIOMEDICAL INSTRUMENTATION
L. Rovati, M. Bonaiuti, G. Salvatori, S. Cattini
Aim of this project is the development of new optoelectronic systems to be applied in medial
and industrial environments. All known optical measurement techniques, including fluorescence,
Near Infrared Spectroscopy, light scattering, Raman spectroscopy are investigated with the aim
to implement custom designed innovative instrumentation. Moreover great care is devoted to the
study and the development of low-noise, high-performance front-end electronics to process the low
level signals related to such instrumentation.
[1] M. Ruggeri, G. Salvatori and L. Rovati, ”Synchronous phase to voltage converter for true-phase
polarimeters, Measurement Science and Technology Vol. 16, pp. 569-577, 2005
[2] L. Rovati, M. Bonaiuti and P. Pavan, ”Design of a High-performance Optical System for
Angular Position Measurement: Optical and Electronic Strategies for Uncertainty Reduction”, in
press in IEEE Transaction on Instrumentation and Measurement, October 2005
[3] L. Rovati, G. Salvatori and M. Bonaiuti, ”A PC-Controlled Non-Incremental Distance Meter
Based on a Comb-Spectrum Combined with a Frequency Modulated Continuous Wave Interferometer”, in press in IEEE Transaction on Instrumentation and Measurement, December 2005
[4] F. Crespi, A. Bandera, M. Donini, C. Heidbreder and L. Rovati, ”Non-invasive in vivo infrared
laser spectroscopy to analyse endogenous oxy-haemoglobin, deoxy-haemoglobin, and blood volume
in the rat CNS”, Journal of Neuroscience Methods 145, pp. 11-22, 2005
[5] M. Ruggeri, G. Salvatori and L. Rovati, A True-Phase Polarimetric System to Study BiAnisotropic Media, Proc. IEEE/IMTC, pp. 1039-1043, 2005
[6] G. Salvatori, I.K. Suh, R.R. Ansari, and L. Rovati, Instrumentation and Calibration Protocol
for a Continuous Wave NIRS Oxymeter, Proc. IEEE/IMTC, pp. 1443-1148, 2005
[7] L. Rovati, and R.R. Ansari, Optical Schemes for Polarimetric Glucose Sensing Analyzed by the
Anatomical Eye Model of Navarro, Proc. IEEE/IMTC, pp. 1923-1927, 2005
[8] L. Rovati, N. Zambelli and G. Staurenghi, ”An optical technique for monitoring chorioretinal
temperature during Transpupillary Thermotherapy”, Proc. SPIE Vol. 5688, pp.201-207, 2005
[9] G. Staurenghi and L. Rovati, ”Analysis of the Temporal Fluctuations of the Laser Light Intensity Diffused by the Chorioretinal Tissue During Transpupillary Thermotherapy (TTT), Invest.
Ophthalmol. Vis. Sci. 2005 46:E-Abstract 2588
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RADIATION DETECTORS ON 4H-SIC AND HIGH-RESISTIVITY SI
F. Nava, C. Canali, G. Verzellesi
This research activity is aimed at the development of ionizing radiation detectors on SiC and
high-resistivity Si for scientific and industrial applications. Results published in 2005 can be summarized as follows.
(i) An important parameter, that is the average amount of energy given up by the incident radiation to form electron-hole pair, has been calculated in 4H-SiC material used as ionizing radiation
detectors. It has been found to be 7.78 eV for He ions, 7.79 eV for protons and 7,75 eV for X rays
[1].
(ii) We have continued the study of the influence of the defects induced by 24 GeV proton,
8,2 MeV electron and 1 MeV neutrons irradiation on the performances of the 4H-SiC epitaxial
detectors by using nuclear and junctions spectroscopy techniques [2], [3], [4].
(iii) We have proposed a novel n-p-n BJT radiation detector on high-resistivity silicon with
integrated p-n-p transistor providing the quiescent base current of the detector [5]. The DC operational limits of the proposed detector have been analyzed by means of numerical device simulations,
pointing out that, by properly outdistancing the base of the p-n-p transistor from the emitter of the
n-p-n detector, the latch up of the parasitic thyristor embedded within the detector-plus-biasingtransistor structure takes place at relatively-high current levels, where detector operation should
anyway be avoided in order to prevent the associated current-gain loss. Numerical simulations
provided insight about the bias dependence of charge-collection waveforms, indicating that minimization of the collecting time requires the detector quiescent current to be adjusted at the highest
value still allowing high-injection effects to be avoided. A small-signal equivalent circuit of the
proposed structure has also been derived, allowing the impact of p-n-p biasing transistor and load
resistance on the charge-collecting time constant to be evaluated. First experimental results showed
that fabricated structures are immune from the latch up of the parasitic thyristor throughout their
high-current-gain operating region and feature a minimum charge-collecting time constant of 35
µs, as tested by pulsed laser illumination. In comparison with other silicon detectors, like p-i-n
diodes, silicon drift chambers and active pixel detectors (e.g., DEPMOS, DEPJFET), the principal
limitations of the BJT detector are its relatively small bandwidth and modest noise performance.
More specifically, maximum counting rates achievable are in order of 10-40 kHz, while the lowest
ENC (Equivalent Noise Charge) demonstrated so far is of about 380 e- r.m.s [6]. On the other
hand, the key benefit of the BJT detector is its internal signal amplification capability, allowing
the readout chain complexity to be significantly reduced and/or the output signal to be propagated
for some distance (up to tens of cm) through metal wires or external cables before reaching the
readout circuitry. A reduced output signal amplification can also be traded with a higher counting
rate, by inserting a C-R high-pass filter at the output of the BJT detector. In summary, this type
of detector is suited for particle counting, in cases where high resolution and speed are not required
and/or where system simplicity is a primary goal. It can also be employed as a radiation-intensity
sensor in industrial applications (e.g., for monitoring of materials quality and/or density, level
sensing, etc.) in situations where X rays are more suited than light as probing radiation.
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[1] A. Lo Giudice, F. Fizzotti, C. Manfredotti, E. Vittone, F. Nava, ”Average energy dissipated
by MeV hydrogen and helium ions per electron-hole pair generation in 4H-SiC”, Appl. Phys. Lett.
87 (2005), 2221.
[2] S. Sciortino, F. Hartjes, S. Lagomarsino, F. Nava, M. Brianzi, V. Cindro, C. Lanzieri, M. Moll,
P. Vanni, ”Effect of heavy proton and neutron irradiations of epitaxial 4H-SiC Schottky diodes”,
Nucl. Instr. and Meth. in Phys. Res. A552 (2005), 138.
[3] A. Castaldini, A. Cavallini, L. Rigutti, F. Nava, S. Ferrero, F. Giorgis, ”Deep levels by proton
and electron irradiation in 4H-SiC”, J. Appl. Phys. 98 (2005), 3706.
[4] G. Bertuccio, S. Binetti, S. Caccia, R. Casiraghi, A. Castaldini, A. Cavallini, C. Lanzieri, A.
Le Donne, F. Nava, S. Pizzini, L. Rigutti, G. Verzellesi, E. Vittone, Silicon carbide for alpha, beta,
ion and soft X-ray high performance detectors, Materials Science Forum, vol. 483, pp. 1015-1019,
2005.
[5] G. Verzellesi, G. Batignani, S. Bettarini, M. Boscardin, L. Bosisio, G.-F. Dalla Betta, C.
Piemonte, ”BJT-based detector on high-resistivity silicon with integrated biasing structure”, 4th
International Conference on New Developments in Photodetection, pp. 163, Beaune (France), June
2005.
[6] L. Bosisio, G. Batignani, S. Bettarini, M. Boscardin, G.-F. Dalla Betta, G. Giacomini, C.
Piemonte, G. Verzellesi, N. Zorzi, ”Performance evaluation of radiation sensors with internal signal
amplification based on the BJT effect”, 10th European Symposium on Semiconductor Detectors,
Wildbad Kreuth (Germany), June 2005.
THICK FILM RESISTORS AND SENSORS
M. Prudenziati, B. Morten
Thick film resistors.
We pursued investigations in search for new compositions of lead-free thick film resistors for hybrid
microelectronics and chip resistors [1-2]. A fruitful collaboration with the Ben Gurion University of
Negev allowed us to prepare new compositions starting from RuO2 as the conducting phase and bismuthate glasses. This blend of bismuthate glasses constitutes a suitable choice for avoiding negative
effects such as devitrification, bleeding out of the glass on alumina substrates, anomalous distribution of conductive grains in the glassy matrix and phase separation observed in other systems. The
morphology, microstructure and electrical properties have been studied. X-ray diffraction (XRD),
electron scanning microscopy (SEM) and energy dispersion spectroscopy (EDS) show that a defect pyrochlore phase of bismuth titanate formed at about 700 C in all the compositions studied.
Transmission electron microscopy (TEM) analysis of the original RuO 2 powder shows that a single
grain is made of many smaller grains of different crystalline orientations. The sheet resistance spans
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three decades by changing the RuO2 fraction from about 14 to 52 % wt. The resistors exhibit good
reproducibility and their temperature coefficient of resistance is in the range of ±300 ppm/C [2].
Thick film sensors.
The research has been focused on materials and processes typical of thermal spray technology with
the final purpose of verifying the capabilities of these technologies for the development of new class
of sensors of physical and chemical quantities. A preliminary results novel high-temperature (600
C) self-regulated heating platforms have been developed with atmospheric plasma spray technology
(APS) on metal supports, according to the design and processes disclosed in the US Patent recently
published [3].
Other activities were undertaken in Study of structures and performance of thick film piezoelectric materials for actuators (micro-positioners).
[1] S. Rane , M. Prudenziati, B. Morten, L. J. Golonka and A. Dziedzic, ”Microstructure and
electrical properties of perovskite Ruthenate-based Lead Free Thick-Film Resistors on alumina and
LTCC”, J.Mat. Sci: Materials in Electronics 16 (2005) 687-691.
[2] M.G. Busana, M. Prudenziati and J. Hormadaly, ”Microstructure development of RuO 2 -based
lead-free thick film resistors”, submitted for publication.
[3] G. Cirri, M. Prudenziati, ”Method and process for produce heated components for injection
moulding apparatus and heating equipment in general”, US 2005/0257367 A1 Nov. 2004.
RELIABILITY OF ELECTRONIC SYSTEMS
F. Fantini, G. Cassanelli
Aim of this activity is the development of a reliability prediction methodology that can be
used to evaluate the reliability of electronics systems for industrial applications, in particular for
automotive applications. The reliability prediction methodology developed during the last year
has been improved and tested on electronics systems used in different industrial applications. The
concept of Failure Analysis-assisted FMEA (Failure Modes and Effect Analysis) has been developed
and tested on an electronic system for automotive application.
[1] G. Cassanelli, G. Mura, F. Cesaretti, M. Vanzi, F. Fantini, ”Reliability predictions in electronic industrial application”, Microelectronics Reliability, Volume 45, Issues 9-11, pp 1321-1326,
September-November 2005.
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STEER-BY-WIRE SYSTEMS FOR OFF-HIGHWAY VEHICLES
A. Bertacchini, P. Pavan
We have continued the research activity concerning the design and implementation of a Steerby-Wire System (SBW). In particular,the research activity has been focused on the implementation
of a preliminary architecture of a complete steer-by-wire system. The system is composed by three
main ECUs. The first one concerns the force feedback. The implemented ECU executes a torque
control of the chosen force-feedback actuator (in this case, a brushless motor) in order to recreate on
the steering wheel the same drive feeling of a traditional steering system. The second one concerns
the steering command actuation on the wheels. It has been chosen a fully electric implementation,
particularly suitable for light vehicles. The implemented ECU executes a torque control of the
motor used as steering command actuator, in agreement with the data coming out from the forcefeedback ECU. The third ECU operates as gateway between the previous two ECUs and contains
the software needed to implement some typical steer-by-wire add on like variable steering ratio,
fixed wheel position, and so on). Moreover, in a more complex system, it can be used to operate
with other ECUs (i.e. ABS, ESP, etc...) to improve active and passive safety of the vehicle. The
system described has been implemented on a small lawnmower.
[1] - A. Bertacchini, L.Tamagnini, L. Fergnani, P. Pavan, ”Control of Brushless Motor with Hybrid
Redundancy for Force Feedback in Steer-by-Wire Applications”, in Proceedings of 31st Annual
Conference of the IEEE Industrial Engineering Society IECON05, Raleigh, NC, USA November
6-10, 2005.
[2] A. Bertacchini, L. Tamagnini, M. Mistrorigo, P. Pavan, ”Control of Brushless DC Motor with
Static Redundancy for Force Feedback in Steer-by-Wire Applications”, Proc. 10th International
CAN Conference - iCC 2005, Rome, Italy, 8-10 March 2005.
[3] A. Bertacchini, L. Tamagnini, M. Mistrorigo, P. Pavan, ”Controllo di Motore Brushless con
Ridondanza Statica per Applicazioni di Force-Feedback in Sistemi Steer-by-Wire”, in ”Field Bus
& Networks”, Journal ed. VNU Business Pubblication, May 2005.
MONREALE - CRES
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MONREALE - CRES
CRES - Centro per la Ricerca Elettronica in Sicilia
Research topics
1) MICROELECTRONIC BOARD AND FIRMWARE: DESIGN AND DEVELOPMENT
S. Ferruggia Bonura, R. Giordano, D. La Manna, G. Spoto
Collaborations: Dipartimento di Ingegneria Elettrica, Elettronica e delle Telecomunicazioni
dell’Universita’ di Palermo; Layer Electronics s.r.l. - Erice(TP)
2) PROTON EXCHANGE OPTICAL WAVEGUIDES ON SURFACE PERIODIC
POLED AND DOPED FERROELECTRIC CRYSTALS
A.C. Cino, S. Guarino, A. Parisi, S. Riva-Sanseverino
Collaborations: Dipartimento di Ingegneria Elettrica, Elettronica e delle Telecomunicazioni Universita’ di Palermo; Dipartimento di Ingegneria Elettronica - Universita’ Roma Tre
3) APPLIED RESEARCH ON IP NETWORKS
P. Di Francesco, G. Fabio, P. Gallo, R. Giordano, G. Damiani, M. Russo, L. Tramuto
Collaborations: Universita’ degli Studi di Palermo
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MONREALE - CRES
MICROELECTRONIC BOARD AND FIRMWARE: DESIGN AND
DEVELOPMENT
S. Ferruggia Bonura, R. Giordano, D. La Manna, G. Spoto
During 2005 the CRES Microelectronic Laboratory main activities were related to a new research project named ”Quali.Bio”, whose goal is the development of a new biosensor based on the
surface plasmon resonance (SPR) phenomenon. In particular the Microelectronic Laboratory activity related to this project concerns the development of an electronic board for both acquisition,
conversion, elaboration and transmission to a personal computer of all analog signals generated
by the integrated optical biosensor transducer; this microelectronic board will allow to both plot
the refractive index diagram related to different analytes flowing along the sensing surface and to
detect the presence of particular pesticides, toxins, etc..
Also, during 2005 the CRES Microelectronic Laboratory continued both designing and developing GRIP, an innovative microelectronic system for both monitoring and managing public lighting
plants. This new system uses serial data communication over the mains; it employes a set of
microcontroller-based boards, each of them monitoring the single lamp work state. In case a fault
occurres in a lighting point the specific alarm signal is generated, as this system provides different
alarm tipologies. This information is then sent to a monitor board, both collecting data related
to each predefined lamp group and sending them to the informatized control room. The monitor
computer will then automatically produce the specific technical support request, that will be sent
to the lighting plant maintenance service.
Furtherly, in collaboration with the Dipartimento di Ingegneria Elettrica, Elettronica e delle
Telecomunicazioni (DIEET) of the Universita’ di Palermo, CRES developed a microelectronic device to perform cost-free remote monitoring through GSM network. It’s made up of a microcontroller electronic board and of a GSM module that can be placed outside or inside the board; the
device has also an user interface with a keypad and an alphanumeric LCD display. When the GSM
module receives a telephone call, if the caller ID is among enabled numbers included in the stored
device list, the electric equipment to be controlled can be automatically switched on. The user can
both display and modify the enabled number list in many ways as below described: - Directly on
the device by its keypad and LCD display; - By SMS (Short Message Service) written according to
an opportune protocol (a password can also be provided); - by a software installed on a personal
computer connected to the system through the serial interface RS232.
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PROTON EXCHANGE OPTICAL WAVEGUIDES ON SURFACE PERIODIC
POLED AND DOPED FERROELECTRIC CRYSTALS
A.C. Cino, S. Guarino, A. Parisi, S. Riva-Sanseverino
The fast growing of optical communication systems requires all optical networks featuring devices like all optical switches, wavelength converters, compact tunable sources. Optical parametric
interactions in ferroelectric Lithium Niobate (LN) crystals have already been exploited for the realization of nonlinear devices suitable for all optical networks. In particular proton exchange (PE)
waveguide technology together with periodic poling of ferroelectric domains of LN make available
very efficient frequency doublers that rely on quasi phase matching (QPM) between the infrared
(IR) pump and the generated second harmonic field. Our attention has been focused on the combination of PE processes with surface periodic poling of Lithium Niobate (SPPLN). With the SPP
technique only a tens of microns thick layer is poled and, on the other hand, it is possible to
achieve very small periods with respect to standard bulk poling. In fact submicron poling has
been demonstrated which is needed in some parametric interaction schemes, still unexplored due to
technological limits. The SPP technique was also applied to Lithium Tantalate, while the reverse
proton exchange waveguide fabrication was applied to Neodymium doped LN (Nd3+:LN) for laser
emission. In order to get good conversion efficiencies high optical power densities are required
along the whole path of nonlinear interaction between the input pump radiation and the generated second harmonic radiation. This is why it is convenient to fabricate the SPPLN structures
on channel waveguides that confine optical power on an area comparable with the square of the
optical wavelength and are not affected by diffraction problems when propagating over centimeters
interaction lengths. The photolithographic masks for channel waveguide fabrication were patterned
silica films that we have deposited using the Ion Plating Plasma Assisted (IPPA) technique on the
Z face of the ferroelectric samples. This same technique was used for micron-scale periods patterning. For sub-micrometric patterning we have turned to patterning of photoresist masks with the
Lloyd mirror, an holographic technique that can reach hundreds of nanometer period gratings. Our
experimentation allowed to developed a technologic process to ensure full compatibility between
the PE waveguide fabrication technology on surface periodic poled regions. In particular we have
reached the world record of 400 nm poling period gratings for LN, and a period of 3.6 micron in the
very first experiments on LT. Submicron periods are indispensable for the realization of integrated
optical devices based on collinear propagation of counter-propagating waves, such as the Backward
Second Harmonic Generator or the Counter-Propagating Parametric Amplifier. Actually these
parametric interaction schemes to date have not been explored in LN and LT due to technological
limitations of the poling process. Nd3+:LN channel waveguides, fabricated by the reverse proton
exchange technique were successfully pumped in either sigma and pi-polarized configurations, obtaining thresholds of 12 mW and 4.3 mW and slope efficiencies of 0.5 The research activity has
been carried out in a team with the Department of Electrical, Electronic and Telecommunications
Engineering, University of Palermo Italy, and for some parts with the Departamento Fisica de
Materiales, Universidad Autonoma de Madrid - Spain.
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[1] M. Domenech, G. Lifante, E. Cantelar, F. Cuss, A. C. Busacca, A. C. Cino, S. Riva Sanseverino,
”Polarization effects on the laser operation in RPE Nd3+:LiNbO3 channel waveguides”, OPTOEL
2005, 4 Runion Espagnola de Optoelectronica, Elx-Elche (Alicante, Spain), 13-15 July, 2005
[2] A. Busacca, M. Cherchi, S. Riva Sanseverino; A. C. Cino, A. Parisi; G. Assanto, M. Cichocki;
F. Caccavale, D. Calleyo, A. Morbiato, ”Surface Periodic Poling in Lithium Niobate and Lithium
Tantalate”, Proc. 4th IEEE/LEOS Workshop on Fibres and Optical Passive Components, Mondello
(Palermo, IT), pp. 126-130, June 22-24, 2005
[3] A. C. Busacca, A. C. Cino, M. Ravaro, G. Assanto, F. Caccavale, A. Morbiato, and S. Riva
Sanseverino, ”Nano-domains definition in congruent lithium niobate by surface periodic electricfield poling”, Proc. 12th European Conference on Integrated Optics (ECIO’05), Grenoble (France),
6-8 April 2005
[4] A. Busacca, M. Cherchi, S. Riva Sanseverino, A. Parisi, A. C. Cino, M. Ravaro, G. Assanto,
”Short period Lithium Niobate poling for nonlinear three waves interactions”, Proc. European
WORKSHOP Photonic Signal Processing for Defence Applications, Roma (Italy), Paper T6, 17-18
March 2005
[5] S. Riva Sanseverino, A. C. Busacca, A. C. Cino, G. Assanto, ”Ingegnerizzazione dei domini
ferroelettrici nel niobato di litio per applicazioni nonlineari”, Proc. El Em ’05, Scientific Week on
Microwave Engineering, Orvieto (Italy), pp. 137-140, 12-16 April 2005
[6] M. Domenech, G. Lifante and F. Cuss, A. Parisi, A.C. Cino and S. Riva Sanseverino, ”Fabrication and characterisation of reverse proton exchange optical waveguides in Neodymium doped
lithium niobate crystals”, Materials Science Forum, Vols. 480-481, pp. 429-436, (2005)
[7] A. C. Busacca, A. C. Cino, S. Riva-Sanseverino, M. Ravaro, and G. Assanto, ”Silica masks
for improved surface poling of lithium niobate”, Electronics Letters, Vol. 41, No. 2, pp. 92-93,
January 2005
APPLIED RESEARCH ON IP NETWORKS
P. Di Francesco, G. Fabio, P. Gallo, R. Giordano, G. Damiani, M. Russo, L. Tramuto
The Telecommunication Systems (TeSys) Laboratory of the Centro per la Ricerca Elettronica
in Sicilia (CRES) continued its collaboration with the Universita’ di Palermo, in order to furtherly
develop internal both research and know-how in both wireless and MANET (Mobile Ad Hoc Networks) network fields. In 2005 CRES has expanded its effort in wireless networks with specific
interest for outdoor use; in particular, coherently with its previous project in 2004 (Progetto Teleducazione), the TeSys Lab has tested and evaluated different industrial products for outdoor use.
This has lead to a stable platform that will be widely used in the near future by the sister company
Teleinform SpA. This new wireless activity related to outdoor use systems has also lead to an
MONREALE - CRES
229
interesting and fruitful cooperation with some international relevant partners, in order to submit
several RD projects that will probably start in 2006. The Laboratory has also collaborated with
the University of Palermo to study new traffic-aware routing protocols, particularly suited for mesh
networks.
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NAPOLI-CNR
Istituto per la Microelettronica e Microsistemi - Unit di Napoli - CNR
Research topics
Istituto di Cibernetica E. Caianiello - CNR
Research topics
Istituto Nazionale di Ottica Applicata (INOA) - Unit di Napoli - CNR
Research topics
1) OPTICAL MICROSYSTEMS
G. Coppola, M. De Angelis, P. De Natale, S. De Nicola, M. De Rosa, L. De Stefano, P. Ferraro, A.
Finizio, M. Iodice, M. Medugno, V. Mocella, G. Pierattini, I. Rendina, L. Sirleto
Collaborations: University of California, Los Angeles (UCLA), Ca, USA; Delft Institute of Microelectronics and Submicron Technology (DIMES), NL; University of Southampton, UK; University of Stockholm; University of Connecticut, USA; University of Madrid ”Computense”, ES;
University of Florence; LENS, Florence; University of Calabria; University Mediterranea of Reggio Calabria; CRIF-ENEA, Portici (Na); University Federico II of Napoli; Istituto Elettrotecnico
Nazionale ”Galileo Ferraris”, Torino; Politecnico di Milano; Politecnico di Bari
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OPTICAL MICROSYSTEMS
is, P. De Natale, S. De Nicola, M. De Rosa, L. De Stefano, P. Ferraro, A. Finizio, M. Iodice, M. Medugno, V. Mocella, G. Pie
The activity is aimed to the development of optoelectronic devices and microsystems for telecom
and sensing applications. It can be divided in five main topics:
1) Silicon-based optoelectronics and photonic crystals:
The standard silicon microelectronic technology is exploited for the realization of photonic
components that can be integrated on chip with electronic circuits. New configuration of optical
modulators, with a pin configuration and integrated in a SOI waveguide, have been designed.
The realization of preliminary prototypes is in progress. Resonant-cavity-enhanced Si schottky
photodiodes based on the internal photoemission effect at 1.55 micron have been studied. Ramanbased porous silicon optical emitters have been experimentally investigated. 2D photonic crystals
have been investigated for the future realization of optical switches based on negative refraction, on
the thermo-optic effect, and on the electro-optic properties of liquid crystals. The characterization
on a sub-micron scale of materials and devices has sometimes required the exploitation of sincrotron
light.
2) Optical microsensors and biochips
Porous silicon microsensors with a microcavity structure have been realized and characterized
for the detection of liquids and gases. The devices are based on the measure of the resonance peak
shift in the reflectivity spectra. Preliminary results have also been obtaind by measuring the peak
shift in the porous silicon spontaneous raman spectrum. The functionalization of the porous silicon
surface with protein and single-strand DNA molecules has been performed to selecticvely detect
bio-molecules by means of protein-ligand and DNA-complementary DNA interactions. Optical
electromagnetic field sensors based on a Mach-Zehnder interferometric optical structure have been
developed on a LiNbO3 substrate, with a conductive thin film as near and far field non-invasive
probe.
3) Fiber optic sensing systems for avionics, geophysics and aerospace applications
Sensing systems based on a network a fiber optic bragg sensors have been exploited for the
health monitoring of avionic structures. The technique is particularly interesting in the monitoring
of composite materials wherein the sensing fibers can be completely embedded, so making it a smart
material. The systems are now under test on board of Airbus test airplanes. The technique has been
more recently extended to the prediction of heartquakes and to the analysis of thermo-structures
operating in extreme conditions of temperature and strain, such as those ones experienced by
spatial vehicles at the re-entry in the atmosphere. Such activities are developed in cooperation
with industries (Alenia Aeronautica, C. Gavazzi Space, D’Appolonia, etc.) within european and
national research projects.
4) Imaging and optical characterization techniques of MEMS and microstructures
A new technique based on digital holography has been developed for the visualization and profile
characterization of MEMS and microstructures on a sub-micron scale. The technique combines the
properties of an optical microscope with that of a non destructive profilometer, allowing static and
dynamic characterization of MEMS devices during their operation.
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5) Nonlinear optics and high sensitivity spectroscopy
A novel difference-frequency-generation (DFG) optical source, capable to emit between 2.9 and
3.5 micron, has been developed. The signal beam comes from an erbium-fiber amplified diode
laser emitting around 1550. The pump radiation is generated by an extended-cavity diode laser
tunable around 1050, and then amplified by a double-stage Yb-amplifier. Coherent radiation at
their difference frequency is generated by focusing the two beams, properly collimated and polarized
to satisfy the quasi-phase-matching (QPM) condition, into a temperature-controlled, antireflectioncoated, periodically poled LiNbO3 (PPLN) crystal. With this source, sub-Doppler spectroscopy of
methane was successfully carried out. High sensitivity absorption spectroscopy of CH4, C2H4 and
NH3, exhibiting fundamental bands in the 3-micron range, was also carried out coupling the DFG
radiation to a high-finesse optical cavity. For this purpose, an integrated-cavity-output scheme
with off-axis alignment was adopted to obtain long absorption path lengths (2 km), thus allowing,
for instance, simultaneous detection of 12CH4, 13CH4 and 12CH3D species in natural abundance.
[1] ”Dispositivo integrato per la determinazione ottica del contenuto alcolico, in particolare per
vini e liquori, relativo procedimento di fabbricazione, e relativo procedimento di misura”, Inventori:
L. De Stefano, I. Rendina, L. Rotiroti, Brevetto n. RM 2005 A 0002280 del 03.06.05
[2] ”Metodo interferometrico di interrogazione di sensori, in particolare di sensori in fibra ottica a
reticolo di Bragg, e relative sistema”; Inventori: G. Coppola, M. Iodice, S. De Nicola, P. Ferraro, G.
Pierattini, P. De Natale, M. De Rosa, I. Rendina; Assegnatario: Consiglio Nazionale delle Ricerche.
Depositato a Roma il 20 Aprile 2005, Domanda N RM 2005A000189.
[3] V. Mocella, ”Negative refraction in Photonic Crystals: thickness dependence and Pendellsung
phenomenon.”, Optics Express 13, 1361-1367 (2005).
[4] V. Mocella, P. Dardano, L. Moretti, and I. Rendina, ”A polarizing beam splitter using negative
refraction of photonic crystals,” Optics Express 13, 7699-7707 (2005).
[5] R. Tucoulou , O. Mathon, C. Ferrero , V. Mocella, D. V. Roshchupkin, R.E. Kumon ” Investigation of surface acoustic wave fields in silicon crystals by x-ray diffraction: A dynamical theory
approach ”: Journal of Applied Physics 97 (11): 113505 (2005).
[6] A. Sciuto, S. Libertino, S. Coffa, G. Coppola, A miniaturizable Si-based electro-optical modulator working at 1.5mm, Applied Physic Letter, 86(20) 201115 (2005)
[7] L. Moretti, L. De Stefano, A.M. Rossi, I. Rendina, Dispersion of thermo-optic coefficient in
porous silicon layers of different porosities, Appl. Phys.Lett. 86, 061107 (3 pages) (2005).
[8] M. De Stefano, L. De Stefano, Nanostructures in diatom frustules: functional morphology of
valvocopulae in Cocconeidacean monoraphid taxa, Journal of Nanoscience and Nanotechnology 5,
15-24, 2005.
[9] L. Rotiroti, L. De Stefano, L. Moretti, A. Piccolo, I. Rendina, A. M. Rossi, Optical micro-sensors
for pesticides identification based on porous silicon technology, Biosensors and Bioelectronics 20,
10, 2136-2139, 2005.
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[10] L. De Stefano, I. Rendina, L. Moretti, L. Rotiroti, Pesticides detection in water and humic
solutions using porous silicon technology, Sensor and Actuators B, 111-112, 522-525, 2005.
[11] L. De Stefano, K. Malecki, F.G. Della Corte, L. Moretti, L. Rotiroti, I. Rendina, Integrated
silicon-glass opto-chemical sensors for lab-on-chip applications, in press on Sensor and Actuators
B.
[12] L. De Stefano, I. Rendina, L. Rotiroti, L. Moretti, V. Scognamiglio, M. Rossi, S. D. Auria,
Porous silicon-based optical microsensor for the detection of L-Glutamine, in press on Biosensors
and Bioelectronics.
[13] L. De Stefano, M. De Stefano, A. Bismuto, P. Maddalena, I. Rendina, Marine diatoms as
optical chemical sensors, APL 87, 233902 (3 pages) (2005). (selected paper for the December 1,
2005 issue of Virtual Journal of Biological Physics Research)
[14] L. De Stefano, I. Rendina, A. M. Rossi, M. Rossi, S. D. Auria, Biosensori e Biochip Basati
sulla Nanotecnologia del Silicio Poroso , Rivista di Materiali Nanocompositi e Nanotecnologie 1,
61-63, 2005.
[15] P. Ferraro, S. Grilli, D. Alfieri, S. De Nicola, A. Finizio, G. Pierattini, B. Javidi, G. Coppola,
V. Striano, Extended focused image in microscopy by digital holography Optics Express - Vol. 13
- No. 18; September 05, 2005 ; (6738-6749)
[16] G. Coppola, M. Iodice, A. Finizio, S. De Nicola, G. Pierattini, P. Ferraro, C. Magro, G. Spoto,
Digital holography microscope as tool for microelectromechanical systems characterization and
design, SPIE J. of Microlithography, Microfabrication and Microsystems, vol. 4(1), CID 013012,
2005.
[17] L. Moretti, M. Iodice, F. G. Della Corte, I. Rendina, Temperature dependence of the thermooptic coefficient of lithium niobate, from 300 to 515 K in the visible and infrared region, J. Appl.
Phys., vol. 98, CID 036101, 2005.
[18] L. Sirleto, G. Coppola, G. C. Righini, G. Abbate, Photonics devices based on hybrid approach
combining liquid crystals and sol-gel waveguides, Molecular Crystals and Liquid Crystals 429: 149165 (2005)
[19] A. Sciuto, S. Libertino, S. Coffa, G. Coppola, M. Iodice, Experimental evidences of carrier
distribution and behaviour in frequency in a Bipolar Mode Field Effect Transistor light modulator,
accepted for publication on IEEE Trans. Electr. Dev., 2005
[20] A. Di Maio, A. Rocco, P. Ferraro, M. De Rosa, P. De Natale, S. De Nicola, A. Finizio, G.
Pierattini, G. Coppola, M. Iodice, V. Striano, Performance evaluation of fiber Bragg grating sensors
by digital holographic technique and strain gauge measurement, submitted to Optics and Laser in
Engineering, 2005.
[21] M. Gioffr, M. Angeloni, M. Gagliardi, M. Iodice, G. Coppola, C. Aruta and F. G. Della Corte,
Influence of the oxygen on the optical properties of RF-sputtered Zinc Oxide thin films , submitted
to Thin Solid Films, 2005.
[22] M. Iodice, G. Mazzi, L. Sirleto and F. G. Della Corte, Thermo-optical static and dynamic
analysis of a Digital Optical Switch in amorphous silicon waveguide , submitted to Optics Express,
2005.
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[23] Luigi Moretti, Vito Mocella, Luigi Sirleto, Giuseppe Bonasso, Principia Dardano, and Ivo
Rendina, Investigation of a T-shaped waveguides based on a silicon 2D photonic crystal Proc.
SPIE Int. Soc. Opt. Eng. 5926, 59260 (2005)
[24] Luigi Moretti, Vito Mocella, Luigi Sirleto, Giuseppe Bonasso, and Ivo Rendina, Tunable two
dimensional photonic crystal based on liquid crystals , Proc. SPIE Int. Soc. Opt. Eng. 5840, 667
(2005)
[25] Vito Mocella, Thickness dependence of negative refraction in photonic crystals, Proc. SPIE
Int. Soc. Opt. Eng. 5840, 161 (2005)
[26] Vito Mocella, Luigi Moretti, Luca De Stefano, and Ivo Rendina, Dynamical diffraction and
band structure analysis application to the design of vapor sensors based on porous silicon microcavities, Proc. SPIE Int. Soc. Opt. Eng. 5733, 316 (2005).
[27] L. De Stefano, K. Malecki, L. Moretti, I. Rendina, Anodically bonded silicon-glass optical chip
for biochemical sensing applications Proc. SPIE Int. Soc. Opt. Eng. 5718-7, 38-47 (2005).
[28] L. Moretti, L. De Stefano, V. Mocella, I. Rendina, Dynamical diffraction and band structure
analysis application to the design of vapour sensors based on porous silicon microcavities, Proc.
SPIE Int. Soc. Opt. Eng. 5733-50, 1-9 (2005).
[29] L. De Stefano, L. Rotiroti, I. Rea, L. Moretti, I. Rendina, Quantitative determinations in
liquid and gaseous binary mixtures by porous silicon optical microsensors , Advances in Sensors
and Interfaces, Proc. of IWASI 2005, Eds. D. De Venuto and B. Courtois, 178-180, (2005).
[30] L. De Stefano, M. De Stefano, I. Rea, L. Moretti, I. Rendina, A. Bismuto, P. Maddalena,
Opticalcharacterisation of biological nano-porous silica structures , Proc. SPIE Int. Soc. Opt.
Eng. 5925-31, (2005).
[31] L. De Stefano, K. Malecki, F. G. Della Corte, L. Moretti, I. Rea, L. Rotiroti, I. Rendina,
Silicon/glass integrated optical sensor based on porous silicon for gas and liquid inspection ,Digest
of Technical Papers Eurosensors XIX, 2005.
[32] L. De Stefano, I. Rendina, L. Rotiroti, L. Moretti, V. Scognamiglio, M. Rossi, S. D’ Auria,
Protein-ligand interaction detection by a porous silicon optical sensor, AISEM 2005, Firenze, 15-17
Febbraio, 2005.
[33] G.Abbate, V.Tkachenko, A.Marino, M. Giocondo, A. Mazzulla, F. Ciuchi, A. Pane, L. De
Stefano, Refractive index measurements of liquid crystals in the visible-near infrared range , Invited,NOMA, Cetraro (CS), Italy, May 29 - June 04, 2005.
[34] L. De Stefano, M. De Stefano, G. Bonasso, V. Mocella, I. Rea, L. Moretti, A. Bismuto,
P. Maddalena, I. Rendina, New perspective in photonic components based on marine diatoms ;
European Optical Society Topical Meeting on Optical Microsystems, Settembre 15-18, 2005, Capri,
Italia.
[35] L. Rotiroti, L. De Stefano, I. Rea, L. Moretti, G. Di Francia, V. La Ferrara, A. Lamberti,
P. Arcari, C. Sangez, I. Rendina, Porous silicon based optical biochips ; European Optical Society
Topical Meeting on Optical Microsystems, Settembre 15-18, 2005, Capri, Italia.
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[36] L. Sirleto, M. A. Ferrara, L. Moretti, A. M. Rossi, E. Santamato, and I. Rendina, Raman
Sensing Of Vapours And Liquids In Porous Silicon , Proc. of SPIE Vol. 5840, 758-765 (2005).
[37] M. A. Ferrara, L. Sirleto, L. Moretti, A. M. Rossi, E. Santamato, and I. Rendina, Sensing
In Porous Silicon By Raman Scattering , Proc. AISEM 2005 in print. L. Sirleto, M. A. Ferrara,
L. Moretti, A. M. Rossi, E. Santamato, and I. Rendina, Emissione Raman a 1.5, Atti di Fotonica
2005, 185-188.
Emission In Porous Silicon At 1.5 Micron: A Possible Approach , Proc. Of IEEE-LEOS Conference
WFOPC 2005,103-108.
[39] L. Sirleto, M. A. Ferrara, L. Moretti, I. Rendina, E. Santamato, B. Jalali, Spontaneous Raman
Emission And Tunable Stokes Shift In Porous Silicon , 2nd International Conference on Group IV
Photonics, 81-83
[40] M.A. Ferrara, L. Sirleto, L. Moretti, I. Rendina, E. Santamato, Raman Scattering In Porous Silicon Microcavity For Liquids And Vapors Sensor Applications , MMD 2005-meeting workbook,299300.
[41] N. Azzar, M. Angeloni, M. Gagliardi, M.A. Ferrara, L. Sirleto, M. Iodice, G. Coppola, M.
Gioffr, Deposition And Optical Characterization Of Rf Sputtered Lithium Niobate Thin Films
Onto Silicon Substrate , Genova, MMD 2005-meeting workbook, 290-291.
[42] L.Sirleto, M.A. Ferrara, L. Moretti, L. Rotiroti, E. Santamato, I. Rendina, Emissione Raman
In Silicio Poroso a 1.5 , Giardini Naxos, GE 2005.
[43] M.A. Ferrara, L. Sirleto, L. Moretti, A. Rossi, B. Jalali, I. Rendina, Spontaneous Raman Effect
In Porous Silicon For Liquids And Vapors Sensor Applications , Capri, Optical Microsystems 2005.
[44] M. Iodice, G. Coppola, R. C. Zaccuri, I. Rendina, Waveguide-vanishing-based optical modulator in embedded all-silicon structure , Proc. SPIE Int. Soc. Opt. Eng. 5730, pp. 114, 2005.
[45] G. Coppola, M. Iodice, N. Saffioti, R. C. Zaccuri, M. Indolfi, I. Rendina, A. Rocco, P. Ferraro,
Fiber Bragg grating sensor monitoring with thermally-tuned Fabry-Perot cavity integrated in an
all-silicon rib waveguide , Proc. SPIE Int. Soc. Opt. Eng. 5730, pp. 234, 2005.
[46] F. P. Camerlingo, G. Cavaccini, A. Ciliberto, C. Voto, M. Iodice, F. Pezzuti, Application
of fiber optic Bragg grating sensors to the structural health monitoring of aerospace structures
,European Workshop on Photonic Signal Processing for Defence Applications, Roma, Italy, 2005.
[47] M. Iodice, V. Striano, G. Cappuccino, A. Palumbo and G. Cocorullo, Fiber Bragg grating
sensors based system for strain measurements , Proceedings of 2005 IEEE/LEOS Workshop on
Fibres and Optical Passive Components, Palermo, Italy, 22-24 June 2005 Page(s):307 - 312
[48] G. Cocorullo and M. Iodice, Thermally induced optical beam steering in polymeric slab
waveguide , Proceedings of 2005 IEEE/LEOS Workshop on Fibres and Optical Passive Components,
Palermo, Italy, 22-24 June 2005.
[49] V.Striano, G.Coppola, P.Ferraro, D.Alfieri, S.De Nicola, A.Finizio, G.Pierattini,R.Marcelli,
Digital holographic microscope for dynamic characterization of a micromechanical shunt switch,
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FRINGE 05, International Workshop on Automatic Processing of Fringe Patterns - Stuttgart,
September 12-14, 2005
[50] G.Coppola, V.Striano, P.Ferraro, S.Grilli, D.Alfieri, S.De Nicola, A.Finizio, G.Pierattini,
B.Javidi, MEMS characterization by digital holography OMS 05, European Optical Society Topical
Meeting on Optical Microsystem, Capri, Napoli, Italy September 15-18, 2005
[51] V.Striano, M.Iodice, G.Coppola, F.P.Camerlingo, G.Cavaccini, F.Pezzuti, Fiber optic system
for structural healt monitoring in avionics, OMS 05, European Optical Society Topical Meeting on
Optical Microsystems, Capri, Napoli, Italy September 15-18, 2005
[52] D. Alfieri, G. Coppola, S. DeNicola, P. Ferraro, A. Finizio, S. Grilli, G. Pierattini, V. Striano,
Image focusing properties in reconstructing digital holograms, Proc. SPIE Vol. 5856, pp.64-70,
Optical Measurement Systems for Industrial Inspection IV; Wolfgang Osten, Christophe Gorecki,
Erik L. Novak; Eds., Jun 2005
[53]
V.Striano, G.Coppola, P.Ferraro, D.Alfieri, S.De Nicola, A.Finizio, G.Pierattini,
R.Marcelli,P.Mezzanotte, Non Destructive optical system based on digital holographic microscope
for quasi real-time characterization of micromechanical shunt switch, Proc. SPIE Vol. 5858, Nanoand Micro-Metrology; Heidi Ottevaere, Peter DeWolf, Diederik S. Wiersma Eds.; pp. 312-320
(2005).
[54] P. Ferraro, G. Coppola, D. Alfieri, S. De Nicola, A. Finizio, G. Pierattini, Non desctructive
inspection of microstructure by a digital holographic microscope, Proc. of ICEM12- 12th International Conference on Experimental Mechanics ICEM12.
[55] A. Sciuto, S. Libertino, S. Coffa, G. Coppola, A miniaturizable integrated Si-based light
modulator , Proc. of SPIE, Vol. 5730, pp. 94-101 (2005).
[56] M. Casalino, L. Sirleto, L. Moretti, D. Panzera, S. Libertino, I. Rendina, Silicon Resonant
Cavity Enhanced Photodetector at 1.55 µm , SPIE Proc. vol.5840, pp.545-553 (2005).
[57] M. Casalino, L. Sirleto, L. Moretti, S. Libertino, I. Rendina, Silicon Resonant Cavity Enhanced
Photodetector at 1.55 µm, Proc. of the 2nd IEEE International Conference on Group IV Photonics
(2005), pp. 143-145
[58] M. Casalino, L. Sirleto, L. Moretti, S. Libertino, I. Rendina, Si-Based Resonant Cavity
Enhanced Photodetectors at 1.55 µm, Proceedings of Frontiers in Optics 2005 - in stampa
[59] M. Casalino, L. Sirleto, L. Moretti, D. Panzera, S. Libertino, I. Rendina,Silicon Resonant
Cavity Enhanced Photodetector at 1.55µm , Atti del Congresso AISEM 2005 in stampa
SECONDA UNIVERSITÁ DI NAPOLI
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Dipartimento di Ingegneria dell’Informazione
Research topics
1) NONLINEAR ANALYSIS AND DESIGN OF ELECTRONIC OSCILLATORS
A. Buonomo, A. Lo Schiavo
2) STEADY-STATE ANALYSIS OF NONLINEAR ELECTRONIC CIRCUITS
3) FIBER OPTIC DEVICES AND SENSORS
R. Bernini, A. Minardo, L. Zeni
Collaborations: Universit di Napoli Federico II, CNR-IREA, Politecnico Federale di Losanna (CH)
4) INTEGRATED OPTOELECTRONIC DEVICES AND SENSORS
R. Bernini, N. Cennamo, E. De Nuccio,A. Minardo, F. Mottola, G. Testa, L. Zeni
Collaborations: Universit di Napoli Federico II, CNR-IREA, DIMES Delft (NL)
238
NONLINEAR ANALYSIS AND DESIGN OF ELECTRONIC OSCILLATORS
The goal of this research is to investigate the problems related to the analysis and design of
electronic oscillators. In this context:
a) we performed a full nonlinear analysis of second- and third-order oscillators, widely used
in radio frequency (RF) applications, using an asymptotic perturbation method. The steadystate oscillation and its orbital stability, as well as the initial transient response were determined
through relatively simple and expressive relationships making it possible to establish design criteria.
Some practical RF circuits, which are representative of wide classes of oscillators, were analyzed.
Moreover, a nonlinear perturbation model of differential oscillators was developed to make their
nonlinear analysis possible;
b) we developed a systematic nonlinear analysis of differential Voltage Controlled Oscillators
(VCOs), both bipolar and MOS. Using the standard device models, we derive the second-order
nonlinear equation describing the behavior of these oscillators, which is formulated in a perturbation
form. The solution of this equation is obtained as a particular case of the solution of the most general
equation of second-order oscillators, which is solved through a suitable perturbation method. Unlike
a pure numerical analysis, simple analytical relationships are derived for predicting the steadystate oscillation, its transient behavior and for ascertaining the existence of a stable oscillation
in differential VCOs. These relationships, leading to results which well agree with the SPICE
simulations, are useful in both analysis and design.
c) we developed a differential LC VCO, which does not require an external or integrated inductor. It is obtained by connecting a capacitor between the emitters of a cross-coupled transistor
pair, whose behaviour around the equilibrium-point is proved to be equivalent to the parallel connection of an inductance and a negative differential resistance. The resulting circuit is the most
simple implementation of a differential LC VCO, that is suitable for a very compact integrated
realization. Circuit simulations were performed showing the practical feasibility of the proposed
oscillator.
[1] A. Buonomo, A. Lo Schiavo, Modeling and Analysis of a Relaxation Oscillator, Proceedings
of the European Conference on Circuit Theory and Design ECCTD05, Cork, Ireland, August 29 September 2, 2005; pp. III-185 III-188;
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STEADY-STATE ANALYSIS OF NONLINEAR ELECTRONIC CIRCUITS
The research activity, started some years ago, has dealt with
a) the development of a new iteration procedure for calculating the steady-state response of
nonlinear dynamic circuits. This problem was treated in a number of papers using a variety
of methods. Among these, mention should be made of the Galerkin projection method, whose
validity, in the case of the so-called isolated periodic solutions, was first investigated by Urabe,
which gave conditions under which the sequence of the Galerkin approximations converges to the
exact solution as well as an estimate of how this solution is close to a Galerkin approximation. The
determining equation of the Galerkin approximation, which can be treated as a nonlinear system
of equations with scalar variables, can be easily derived in explicit form, as a rule through the
procedure of harmonic balance. The simplicity of the Galerkin method was observed by Urabe, who
highlighted its convenience in practical applications as compared to the Cesari method. According
to the Cesari method, by a suitable decomposition of the nonlinear equation into auxiliary and
bifurcation equations, it is possible to reduce the original equation to the sole determining equation
in a low order finite dimensional space. The application of this method is connected with certain
difficulties, as the dimension of this space is not known a priori and, further, the determining
equation involves a function which is only implicitly determined. To avoid these difficulties in
practical applications of the Cesari method, which perhaps discouraged its use in nonlinear circuit
analysis, Banfi and later on some authors, devised, in the line of the Cesari method, a constructive
method of periodic solutions whereby both the auxiliary and the bifurcation equations are treated
together and are solved through an unique iteration scheme. In this context, we showed the
adaptability of the Banfi method to the periodic problems of nonlinear circuit analysis. To this end
we extended the applicability of this method to an equation in operator form and gave a frequencydomain formulation of the calculation procedure. The successive approximations of the periodic
solution of circuit equations are determined through recurrent formulae starting from a low-order
approximation of the solution, which is obtained by using the Harmonic Balance method. The
use of this latter method can be thus aimed only at this end when it is used in combination with
the proposed iteration procedure. The resulting constructive process of solution is remarkably less
expensive than that of the Harmonic Balance method.
b) the determination of the nonlinear distortion in analog circuits. A perturbation model of a
common emitter amplifier was developed and used to introduce an iterative perturbation procedure
allowing us to evaluate the nonlinear distortion. The equations of the successive approximations,
were derived and solved in explicit form for the unknown harmonics. The nonlinear distortion
analysis was, thus, performed using recurrent formulae which can be an useful tool for design
purposes. The accuracy of the proposed analysis method was tested by numerical simulations.
[1] A. Buonomo, A. Lo Schiavo, Perturbation Analysis of Nonlinear Distortion in Analog Integrated
Circuits, IEEE Trans. on Circuits and Systems - Part I, vol.52, n.8, August 2005, pp. 1620 - 1631;
240
[2] A. Buonomo, A. Lo Schiavo, F. Rotulo, Optimizing Pb-Free SMT Process Parameters, Circuits
Assembly, January 2005, pp. 22-25;
FIBER OPTIC DEVICES AND SENSORS
R. Bernini, A. Minardo, L. Zeni
The active research lines are the followings:
a) Fiber optic distributed sensors
Fiber optic sensors are very attractive for a variety of applications because of their immunity
to electromagnetic interference and the possibility to employ them in hostile environments. In particular, they can be used for distributed sensing in large structures. Among distributed fiber optic
sensors, those based on stimulated Brillouin scattering (SBS) have been extensively investigated
in the past few years for distributed tensile strain and temperature measurements. In fact, the
dependence of the Brillouin frequency shift on environmental quantities makes SBS very attractive
for sensing applications in large structures like dams, tunnels etc., where the use of fiber optic point
sensors is not suitable. These techniques are basically based on pump and probe methods to measure the distributed profile of Brillouin frequency shift along an optical fiber, which is dependent on
the local strain and temperature conditions of the fiber itself. Spatial information can be obtained
using, e.g. optical time domain analysis of the probe signal, when the pump laser is modulated
to produce a train of pulses. An important issue is the signal processing schemes used to enhance
the spatial resolution and the measurement precision of the sensors. We have been involved in the
analysis of optimized recovery techniques for temperature and strain profiles reconstruction starting from SBS data. Preliminary results show that the proposed methods may result in a better
resolution on the evaluated temperature or strain profiles, and, furthermore, in the enhancement of
the dynamic range of the sensor systems. Two experimental set-ups have been implemented, working in the time domain and in the frequency domain, respectively, and the achieved experimental
results indicate the validity of the proposed approaches. Furthermore, the ability of the proposed
sensors to identify relatively small defects in steel beams has been demonstrated. A cooperation
with EPFL - cole Polytchnique Fdrale du Lausanne (Switzerland) - has been established.
b) Optical controllable delay lines
Stimulated Brillouin scattering (SBS) has been recently shown to offer a mechanism for generating tunable all-optical delays in room-temperature single-mode optical fibers at telecommunication
wavelengths. This technique makes use of the rapid variation of the refractive index that occurs in
the vicinity of the Brillouin gain resonance. When the slow-light pulse delay is subject to a constraint on the allowable pulse distortion, it has been shown that the use of a pair of closely-spaced
Brillouin gain lines can increase the distortion-constrained delay, with respect to the single-line
configuration. We have numerically and experimentally demonstrated that the same experimental
apparatus usually employed for generating a Brillouin gain doublet, can also be used for achieving
three equally-spaced Brillouin gain resonances, further increasing the distortion-constrained pulse
delay.
241
[1] A. Minardo R. Bernini, L. Zeni, L. Thevenaz, F. Briffod, A reconstruction technique for longrange Stimulated Brillouin Scattering distributed fiber-optic sensors: experimental results, Measurement Science and Technology, 16, 900-908 (2005) [2] R. Bernini, A. Minardo, L. Zeni, Distributed fiber-optic frequency-domain Brillouin sensing, Sensors and Actuators A:Physical (2005)
[3] R. Bernini, M. Fraldi, A. Minardo, V. Minutolo, F. Carannante, L. Nunziante, L. Zeni, Damage detection in bending beams through Brillouin distributed optic-fibre sensor, Bridge Structures,
1, 355-363 (2005) [4] R. Bernini, A. Minardo, L. Zeni, High-resolution distributed fiber-optic
frequency-domain Brillouin scattering, OFS17, Bruges 2005. [5] R. Bernini, A. Minardo, L. Zeni,
Frequency-domain analysis of stimulated Brillouin scattering in single-mode optical fibers, WFOPC,
Palermo 2005. [6] R. Bernini, A. Minardo, L. Zeni, Distributed strain measurements by fiber-optic
Brillouin sensing for structural monitoring, Eurosensors, Barcelona 2005 [7] R. Bernini, M. Fraldi,
A. Minardo, V. Minutolo, F. Carannante, L. Nunziante, L. Zeni, Optical-fiber sensor measurements
for safety assessment and m,onitoring of bridges and large structure, NYCBC, New York 2005. [8]
R. Bernini, M. Fraldi, A. Minardo, V. Minutolo, F. Carannante, L. Nunziante, L. Zeni, Damage detection in bending beams through Brillouin distributed optical fiber sensor, 5th IWSHM, Stanford
- California 2005.
INTEGRATED OPTOELECTRONIC DEVICES AND SENSORS
R. Bernini, N. Cennamo, E. De Nuccio,A. Minardo, F. Mottola, G. Testa, L. Zeni
The active research lines are the followings:
a) Integrated optoelectronic sensors and biosensors
This research activity deals with the development of integrated optical sensors for measuring
physical and chemical quantities, useful f.i. in environmental monitoring. In fact, these sensors
offer unique advantages like versatility, high sensitivity, low price. In particular, we have been
involved in the analysis, design and realization of refractive index sensors based on antiresonant
reflecting optical waveguides (ARROW). In these waveguides the field is not confined by total
internal reflection, as in conventional waveguides, but by cladding layers designed to form high
reflectivity Fabry-Perot mirrors. This peculiar design offers some particular properties that make
them very attractive for sensing application. Particularly, it has been shown that they exhibit a
strong attenuation dependence on the claddings refractive indexes. So it is possible to use this
intensity modulation mechanism as the sensing principle in order to realize optical integrated refractometers that can also easily be integrated with the photodetectors used for the optical readout.
This research activity is carried out in cooperation with the Delft Institute for Microelectronics and
Submicron technology (DIMES) - Technical University of Delft (The Neatherlands) -, where two
242
different devices have been realized: planar rib waveguides for refractive index sensing and hollow
micromachined waveguides for gas and liquid sensing. Experimental results indicate the effectiveness of both structures. A cooperation with CNR-IBP - Istituto di Biochimica delle Proteine National Research Council (Italy) has been established to work toward the design and realization
of a protein based biosensor exploiting the protein refractive index variations. Furthermore, exploiting the hollow core ARROW waveguides, a novel micro-flow-cytometer for single cell analysis
has been developed and successfully tested.
b) Integrated optofluidic devices
Optofluidics represents a novel approach for the dynamic manipulation of optical properties,
enabling the realization of reconfigurable photonic circuits. The research activity deals with the
realization of optofluidic devices based on the hydrodynamic focusing inside hollow core ARROW
waveguides. This approach permits to take advantage of both the light confinement properties of the
ARROW structures and the reconfigurable waveguides achievable by means of the hydrodynamic
focusing. The preliminary experimental results have shown the validity of the proposed approach.
This research activity is carried out in strict cooperation with the Delft Institute for Microelectronics
and Submicron technology (DIMES) - Technical University of Delft (The Neatherlands).
c) Metal-clad waveguides for fluorescence detection
Recently, metal-clad leaky waveguides (MCLW) have been proposed as highly sensitive single
point sensor devices for small-volume refractive index (RI) and fluorescence detection for micro
total analytical system (-TAS) applications. We started a theoretical study of the efficiency of
MCLW-based sensors for fluorescence detection. It is shown that MCLWs can be designed in
order to obtain an efficient coupling of fluorescence emission with their leaky modes. This leads
to a higher directionality of the fluorescence emission into the glass substrate, when compared to
emission in presence of a pure glass/water interface and surface-plasmon coupled emission. Such
high directionality can be exploited to perform an efficient spatial filtering of the fluorescent signal
from scattered light. Numerical analyses also indicate that exciting the fluorescence from the glass
side while collecting fluorescence emission through a water-immersed microscope objective, may
result in a 70-fold enhancement of the detectable signal when compared to conventional fluorescence
collection carried out on a bare glass/water interface.
[1] R. Bernini, A. Minardo, N. Cennamo, L. Zeni, Planar waveguides for fluorescence-based biosensing: optimization and analysis, IEEE Sensors Journal (2005) [2] S. D’Auria, M. Staiano, A.
Varriale, V. Scognamiglio, M. Rossi, A. Parracino, S. Campopiano, N. Cennamo, L. Zeni, The
Odorant-binding protein from Canis familiaris: purification, characterization and new perspectives in biohazard assessment, Protein & Peptide Letters (2005) [3] R. Bernini, N. Cennamo,
A. Minardo, L. Zeni, Polymer-on-glass waveguide structure for efficient fluorescence-based optical
biosensors, SPIE Photonics West 2005 [4] R. Bernini, N. Cennamo, A. Minardo, L. Zeni, Silicon
planar waveguides for absorption based biosensors , IWASI, Bari 2005 [5] R. Bernini, E. De Nuccio,
F. Mottola, A. Minardo, P. M. Sarro, L. Zeni, Design, fabrication and characterization of integrated
antiresonant hollow core waveguides for photonics integrated circuits, WFOPC, Palermo 2005. [6]
R. Bernini, E. De Nuccio, F. Mottola, A. Minardo, P. M. Sarro, L. Zeni, Integrated antiresonant
243
hollow core waveguides as a platform for microoptical-microfluidic TAS applications, Eurosensors,
Barcelona 2005.
244
NAPOLI-CNR
NAPOLI-CNR
Istituto per la Microelettronica e Microsistemi - Sezione di Napoli - CNR
Istituto di Cibernetica E. Caianiello - CNR
Istituto Nazionale di Ottica Applicata (INOA) - Sezione di Napoli - CNR
Research topics
1) OPTICAL MICROSYSTEMS
G. Coppola, M. De Angelis, P. De Natale, S. De Nicola, M. De Rosa, L. De Stefano, P. Ferraro, A.
Finizio, M. Iodice, M. Medugno, V. Mocella, G. Pierattini, I. Rendina, L. Sirleto
Collaborations: University of California, Los Angeles (UCLA), Ca, USA; Delft Institute of Microelectronics and Submicron Technology (DIMES), NL; University of Southampton, UK; University of Stockholm; University of Connecticut, USA; University of Madrid ”Computense”, ES;
University of Florence; LENS, Florence; University of Calabria; University Mediterranea of Reggio Calabria; CRIF-ENEA, Portici (Na); University Federico II of Napoli; Istituto Elettrotecnico
Nazionale ”Galileo Ferraris”, Torino; Politecnico diMilano; Politecnico di Bari
NAPOLI-CNR
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OPTICAL MICROSYSTEMS
G. Coppola, M. De Angelis, P. De Natale, S. De Nicola,
M. De Rosa, L. De Stefano, P. Ferraro, A. Finizio,
M. Iodice, M. Medugno, V. Mocella,
G. Pierattini, I. Rendina, L. Sirleto
The activity is aimed to the development of optoelectronic devices and microsystems for telecom
and sensing applications. It can be divided in five main topics:
1) Silicon-based optoelectronics and photonic crystals:
The standard silicon microelectronic technology is exploited for the realization of photonic
components that can be integratedon chip with electronic circuits. New configuration of optical
modulators, with a pin configuration and integrated in a SOI waveguide, have been designed.
The realization of preliminary prototypes is in progress. Resonant-cavity-enhanced Si schottky
photodiodes based on the internal photoemission effect at 1.55 micron have been studied. Ramanbased porous silicon optical emitters have been experimentally investigated. 2D photonic crystals
have been investigated for the future realization of optical switches based on negative refraction, on
the thermo-optic effect, and on the electro-optic properties of liquid crystals. The characterization
on a sub-micron scale of materials and devices has sometimes required the exploitation of sincrotron
light.
2) Optical microsensors and biochips
Porous silicon microsensors with a microcavity structure have been realized and characterized
for the detection of liquids andgases. The devices are based on the measure of the resonance peak
shift in the reflectivity spectra. Preliminary results have also been obtaind by measuring the peak
shift in the porous silicon spontaneous raman spectrum. The functionalization of the porous silicon
surface with protein and single-strand DNA molecules has been performed to selecticvely detect
bio-molecules by means of protein-ligand and DNA-complementary DNA interactions. Optical
electromagnetic field sensors based on a Mach-Zehnder interferometric optical structure have been
developed on a LiNbO3 substrate, with a conductive thin film as near and far field non-invasive
probe.
3) Fiber optic sensing systems for avionics, geophysics and aerospace applications
Sensing systems based on a network a fiber optic bragg sensors have been exploited for the
health monitoring of avionic structures. The technique is particularly interesting in the monitoring
of composite materials wherein the sensing fibers can be completely embedded, so making it a smart
material. The systems are now under test on board of Airbus test airplanes. The techniquehas been
more recently extended to the prediction of heartquakes and to the analysis of thermo-structures
operating in extremeconditions of temperature and strain, such as those ones experienced by spatial
vehicles at the re-entry in the atmosphere. Such activities are developed in cooperation with
industries (Alenia Aeronautica, C. Gavazzi Space, D’Appolonia, etc.) within european and national
research projects.
4) Imaging and optical characterization techniques of MEMS and microstructures
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NAPOLI-CNR
A new technique based on digital holography has been developed for the visualization and profile
characterization of MEMS and microstructures on a sub-micron scale. The technique combines the
properties of an optical microscope with that of a non destructive profilometer, allowing static and
dynamic characterization of MEMS devices during their operation.
5) Nonlinear optics and high sensitivity spectroscopy
A novel difference-frequency-generation (DFG) optical source, capable to emit between 2.9 and
3.5 micron, has been developed. The signal beam comes from an erbium-fiber amplified diode
laser emitting around 1550. The pump radiation is generated by an extended-cavity diode laser
tunable around 1050, and then amplified by a double-stage Yb-amplifier. Coherent radiation at
their difference frequency is generated by focusing the two beams, properly collimated and polarized
to satisfy the quasi-phase-matching (QPM) condition, into a temperature-controlled, antireflectioncoated, periodically poled LiNbO3 (PPLN) crystal. With this source, sub-Doppler spectroscopy of
methane was successfully carried out. High sensitivity absorption spectroscopy of CH4, C2H4 and
NH3, exhibiting fundamental bands in the 3-micron range, was also carried out coupling the DFG
radiation to a high-finesse optical cavity. For this purpose, an integrated-cavity-output scheme
with off-axis alignment was adopted to obtain long absorption path lengths (2 km), thus allowing,
for instance, simultaneous detection of 12CH4, 13CH4 and 12CH3D species in natural abundance.
[1] ”Dispositivo integrato per la determinazione ottica del contenuto alcolico, in particolare per
vini e liquori, relativo procedimento di fabbricazione, e relativo procedimento di misura”, Inventori:
L. De Stefano, I. Rendina, L. Rotiroti, Brevetto n. RM 2005 A 0002280 del 03.06.05
[2] ”Metodo interferometrico di interrogazione di sensori, in particolare di sensori in fibra ottica a
reticolo di Bragg, e relative sistema”; Inventori: G. Coppola, M. Iodice, S. De Nicola, P. Ferraro, G.
Pierattini, P. De Natale, M. De Rosa, I. Rendina; Assegnatario: Consiglio Nazionale delle Ricerche.
Depositato a Roma il 20 Aprile 2005, Domanda N RM 2005A000189.
[3] V. Mocella, ”Negative refraction in Photonic Crystals: thickness dependence and Pendellsung
phenomenon.”, Optics Express 13, 1361-1367 (2005).
[4] V. Mocella, P. Dardano, L. Moretti, and I. Rendina, ”A polarizing beam splitter using negative
refraction of photonic crystals,” Optics Express 13, 7699-7707 (2005).
[5] R. Tucoulou , O. Mathon, C. Ferrero , V. Mocella, D. V. Roshchupkin, R.E. Kumon ” Investigation of surface acoustic wave fields in silicon crystals by x-ray diffraction: A dynamical theory
approach ”: Journal of Applied Physics 97 (11): 113505 (2005).
[6] A. Sciuto, S. Libertino, S. Coffa, G. Coppola, A miniaturizable Si-based electro-optical modulator working at 1.5mm,Applied Physic Letter, 86(20) 201115 (2005)
[7] L. Moretti, L. De Stefano, A.M. Rossi, I. Rendina, Dispersion of thermo-optic coefficient in
porous silicon layers of different porosities, Appl. Phys.Lett. 86, 061107 (3 pages) (2005).
[8] M. De Stefano, L. De Stefano, Nanostructures in diatom frustules: functional morphology of
valvocopulae in Cocconeidacean monoraphid taxa, Journal of Nanoscience and Nanotechnology 5,
15-24, 2005.
NAPOLI-CNR
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[9] L. Rotiroti, L. De Stefano, L. Moretti, A. Piccolo, I. Rendina, A. M. Rossi, Optical micro-sensors
for pesticides identification based on porous silicon technology, Biosensors and Bioelectronics 20,
10, 2136-2139, 2005.
[10] L. De Stefano, I. Rendina, L. Moretti, L. Rotiroti, Pesticides detection in water and humic
solutions using porous silicon technology , Sensor and Actuators B, 111-112, 522-525, 2005.
[11] L. De Stefano, K. Malecki, F.G. Della Corte, L. Moretti, L. Rotiroti, I. Rendina, Integrated
silicon-glass opto-chemical sensors for lab-on-chip applications , in press on Sensor and Actuators
B.
[12] L. De Stefano, I. Rendina, L. Rotiroti, L. Moretti, V. Scognamiglio, M. Rossi, S. D Auria,
Porous silicon-based optical microsensor for the detection of L-Glutamine, in press on Biosensors
and Bioelectronics.
[13] L. De Stefano, M. De Stefano, A. Bismuto, P. Maddalena, I. Rendina, Marine diatoms as
optical chemical sensors , APL87, 233902 (3 pages) (2005). (selected paper for the December 1,
2005 issue of Virtual Journal of Biological Physics Research)
[14] L. De Stefano, I. Rendina, A. M. Rossi, M. Rossi, S. D Auria, Biosensori e Biochip Basati
sulla Nanotecnologia del Silicio Poroso , Rivista di Materiali Nanocompositi e Nanotecnologie 1,
61-63, 2005.
[15] P. Ferraro, S. Grilli, D. Alfieri, S. De Nicola, A. Finizio, G. Pierattini, B. Javidi, G. Coppola,
V. Striano, Extended focused image in microscopy by digital holography Optics Express - Vol. 13
- No. 18; September 05, 2005 ; (6738 6749)
[16] G. Coppola, M. Iodice, A. Finizio, S. De Nicola, G. Pierattini, P. Ferraro, C. Magro, G.
Spoto, Digital holography microscope as tool for microelectromechanical systems characterization
and design, SPIE J. of Microlithography, Microfabricationand Microsystems, vol. 4(1), CID 013012,
2005.
[17] L. Moretti, M. Iodice, F. G. Della Corte, I. Rendina, Temperature dependence of the thermooptic coefficient of lithium niobate, from 300 to 515 K in the visible and infrared region, J. Appl.
Phys., vol. 98, CID 036101, 2005.
[18] L. Sirleto, G. Coppola, G. C. Righini, G. Abbate, Photonics devices based on hybrid approach
combining liquid crystals and sol-gel waveguides, Molecular Crystals and Liquid Crystals 429: 149165 (2005)
[19] A. Sciuto, S. Libertino, S. Coffa, G. Coppola, M. Iodice, Experimental evidences of carrier
distribution and behaviour in frequency in a Bipolar Mode Field Effect Transistor light modulator,
accepted for publication on IEEE Trans. Electr. Dev.,2005
[20] A. Di Maio, A. Rocco, P. Ferraro, M. De Rosa, P. De Natale, S. De Nicola, A. Finizio, G.
Pierattini, G. Coppola, M. Iodice, V. Striano, Performance evaluation of fiber Bragg grating sensors
by digital holographic technique and strain gauge measurement, submitted to Optics and Laser in
Engineering, 2005.
[21] M. Gioffr, M. Angeloni, M. Gagliardi, M. Iodice, G. Coppola, C. Aruta and F. G. Della Corte,
Influence of the oxygen on the optical properties of RF-sputtered Zinc Oxide thin films , submitted
to Thin Solid Films, 2005.
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[22] M. Iodice, G. Mazzi, L. Sirleto and F. G. Della Corte, Thermo-optical static and dynamic
analysis of a Digital Optical Switch in amorphous silicon waveguide , submitted to Optics Express,
2005.
[23] Luigi Moretti, Vito Mocella, Luigi Sirleto, Giuseppe Bonasso, Principia Dardano, and Ivo
Rendina, ”Investigation of aT-shaped waveguides based on a silicon 2D photonic crystal” Proc.
SPIE Int. Soc. Opt. Eng. 5926, 59260 (2005)
[24] Luigi Moretti, Vito Mocella, Luigi Sirleto, Giuseppe Bonasso, and Ivo Rendina, ”Tunable two
dimensional photonic crystal based on liquid crystals ”, Proc. SPIE Int. Soc. Opt. Eng. 5840, 667
(2005)
[25] Vito Mocella, ”Thickness dependence of negative refraction in photonic crystals” Proc. SPIE
Int. Soc. Opt. Eng. 5840,161 (2005)
[26] Vito Mocella, Luigi Moretti, Luca De Stefano, and Ivo Rendina, ”Dynamical diffraction
and band structure analysis application to the design of vapor sensors based on porous silicon
microcavities”, Proc. SPIE Int. Soc. Opt. Eng. 5733, 316 (2005).
[27] L. De Stefano, K. Malecki, L. Moretti, I. Rendina, Anodically bonded silicon-glass optical chip
for biochemical sensing applications Proc. SPIE Int. Soc. Opt. Eng. 5718-7, 38-47 (2005).
[28] L. Moretti, L. De Stefano, V. Mocella, I. Rendina, Dynamical diffraction and band structure
analysis application to the design of vapour sensors based on porous silicon microcavities Proc.
SPIE Int. Soc. Opt. Eng. 5733-50, 1-9 (2005).
[29] L. De Stefano, L. Rotiroti, I. Rea, L. Moretti, I. Rendina, Quantitative determinations in
liquid and gaseous binarymixtures by porous silicon optical microsensors , Advances in Sensors and
Interfaces, Proc. of IWASI 2005, Eds. D. De Venuto and B. Courtois, 178-180, (2005).
[30] L. De Stefano, M. De Stefano, I. Rea, L. Moretti, I. Rendina, A. Bismuto, P. Maddalena,
Opticalcharacterisation of biological nano-porous silica structures , Proc. SPIE Int. Soc. Opt.
Eng. 5925-31, (2005).
[31] L. De Stefano, K. Malecki, F. G. Della Corte, L. Moretti, I. Rea, L. Rotiroti, I. Rendina,
Silicon/glass integrated optical sensor based on porous silicon for gas and liquid inspection ,Digest
of Technical Papers Eurosensors XIX, 2005.
[32] L. De Stefano, I. Rendina, L. Rotiroti, L. Moretti, V. Scognamiglio, M. Rossi, S. D Auria,
Protein-ligand interaction detection by a porous silicon optical sensor , AISEM 2005, Firenze, 15-17
Febbraio, 2005.
[33] G.Abbate, V.Tkachenko, A.Marino, M. Giocondo, A. Mazzulla, F. Ciuchi, A. Pane, L. De
Stefano, Refractive index measurements of liquid crystals in the visible-near infrared range , Invited,NOMA, Cetraro (CS), Italy, May 29 - June 04, 2005.
[34] L. De Stefano, M. De Stefano, G. Bonasso, V. Mocella, I. Rea, L. Moretti, A. Bismuto,
P. Maddalena, I. Rendina, New perspective in photonic components based on marine diatoms ;
European Optical Society Topical Meeting on Optical Microsystems, Settembre 15-18, 2005, Capri,
Italia.
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[35] L. Rotiroti, L. De Stefano, I. Rea, L. Moretti, G. Di Francia, V. La Ferrara, A. Lamberti,
P. Arcari, C. Sangez, I. Rendina, Porous silicon based optical biochips ; European Optical Society
Topical Meeting on Optical Microsystems, Settembre 15-18, 2005, Capri, Italia.
Sensing Of Vapours And Liquids In Porous Silicon , Proc. of SPIE Vol. 5840, 758-765 (2005).
[37] M. A. Ferrara, L. Sirleto, L. Moretti, A. M. Rossi, E. Santamato, and I. Rendina, Sensing In
Porous Silicon By RamanScattering , Proc. AISEM 2005 in print. L. Sirleto, M. A. Ferrara, L.
Moretti, A. M. Rossi, E. Santamato, and I. Rendina, Emissione Raman a 1.5m , Atti di Fotonica
2005, 185-188.
Emission In Porous Silicon At 1.5 Micron: A Possible Approach , Proc. Of IEEE-LEOS Conference
WFOPC 2005,103-108.
[39] L. Sirleto, M. A. Ferrara, L. Moretti, I. Rendina, E. Santamato, B. Jalali, Spontaneous Raman
Emission And Tunable Stokes Shift In Porous Silicon , 2nd International Conference on Group IV
Photonics, 81-83
[40] M.A. Ferrara, L. Sirleto, L. Moretti, I. Rendina, E. Santamato, Raman Scattering In Porous Silicon Microcavity For Liquids And Vapors Sensor Applications , MMD 2005-meeting workbook,299300.
[41] N. Azzar, M. Angeloni, M. Gagliardi, M.A. Ferrara, L. Sirleto, M. Iodice, G. Coppola, M.
Gioffr, Deposition And Optical Characterization Of Rf Sputtered Lithium Niobate Thin Films
Onto Silicon Substrate , Genova, MMD 2005-meeting workbook, 290-291.
[42] L.Sirleto, M.A. Ferrara, L. Moretti, L. Rotiroti, E. Santamato, I. Rendina Emissione Raman
In Silicio Poroso a 1.5m , Giardini Naxos, GE 2005.
[43] M.A. Ferrara, L. Sirleto, L. Moretti, A. Rossi, B. Jalali, I. Rendina Spontaneous Raman Effect
In Porous Silicon For Liquids And Vapors Sensor Applications , Capri, Optical Microsystems 2005.
[44] M. Iodice, G. Coppola, R. C. Zaccuri, I. Rendina, Waveguide-vanishing-based optical modulator in embedded all-silicon structure , Proc. SPIE Int. Soc. Opt. Eng. 5730, pp. 114, 2005.
[45] G. Coppola, M. Iodice, N. Saffioti, R. C. Zaccuri, M. Indolfi, I. Rendina, A. Rocco, P. Ferraro,
Fiber Bragg gratingsensor monitoring with thermally-tuned Fabry-Perot cavity integrated in an
all-silicon rib waveguide , Proc. SPIE Int. Soc. Opt. Eng. 5730, pp. 234, 2005.
[46] F. P. Camerlingo, G. Cavaccini, A. Ciliberto, C. Voto, M. Iodice, F. Pezzuti, Application
of fiber optic Bragg grating sensors to the structural health monitoring of aerospace structures
,European Workshop on Photonic Signal Processing for Defence Applications, Roma, Italy, 2005.
[47] M. Iodice, V. Striano, G. Cappuccino, A. Palumbo and G. Cocorullo, Fiber Bragg grating
sensors based system for strain measurements , Proceedings of 2005 IEEE/LEOS Workshop on
Fibres and Optical Passive Components, Palermo, Italy, 22-24 June 2005 Page(s):307 - 312
[48] G. Cocorullo and M. Iodice, Thermally induced optical beam steering in polymeric slab
waveguide , Proceedings of 2005 IEEE/LEOS Workshop on Fibres and Optical Passive Components,
Palermo, Italy, 22-24 June 2005.
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[49] V.Striano, G.Coppola, P.Ferraro, D.Alfieri, S.De Nicola, A.Finizio, G.Pierattini,R.Marcelli,
Digital holographic microscope for dynamic characterization of a micromechanical shunt switch,
FRINGE 05, International Workshop on Automatic Processing of Fringe Patterns - Stuttgart,
September 12-14, 2005
[50] G.Coppola, V.Striano, P.Ferraro, S.Grilli, D.Alfieri, S.De Nicola, A.Finizio, G.Pierattini,
B.Javidi, MEMS characterization by digital holography OMS 05, European Optical Society Topical
Meeting on Optical Microsystem, Capri, Napoli, Italy September 15-18, 2005
[51] V.Striano, M.Iodice, G.Coppola, F.P.Camerlingo, G.Cavaccini, F.Pezzuti, Fiber optic system
for structural healt monitoring in avionics, OMS 05, European Optical Society Topical Meeting on
Optical Microsystems, Capri, Napoli, Italy September 15-18, 2005
[52] D. Alfieri, G. Coppola, S. DeNicola, P. Ferraro, A. Finizio, S. Grilli, G. Pierattini, V. Striano,
Image focusing properties in reconstructing digital holograms, Proc. SPIE Vol. 5856, pp.64-70,
Optical Measurement Systems for Industrial Inspection IV; Wolfgang Osten, Christophe Gorecki,
Erik L. Novak; Eds., Jun 2005
[53]
V.Striano, G.Coppola, P.Ferraro, D.Alfieri, S.De Nicola, A.Finizio, G.Pierattini,
R.Marcelli,P.Mezzanotte, Non Destructive optical system based on digital holographic microscope
for quasi real-time characterization of micromechanical shunt switch, Proc. SPIE Vol. 5858, Nanoand Micro-Metrology; Heidi Ottevaere, Peter DeWolf, Diederik S. Wiersma Eds.; pp. 312-320
(2005).
[54] P. Ferraro, G. Coppola, D. Alfieri, S. De Nicola, A. Finizio, G. Pierattini, non desctructive inspection of microstructure by a digital holographic microscope , Proc. of ICEM12- 12th
International Conference on Experimental Mechanics ICEM12.
[55] A. Sciuto, S. Libertino, S. Coffa, G. Coppola, A miniaturizable integrated Si-based light
modulator , Proc. of SPIE,Vol. 5730, pp. 94-101 (2005).
[56] M. Casalino, L. Sirleto, L. Moretti, D. Panzera, S. Libertino, I. Rendina - Silicon Resonant
Cavity Enhanced Photodetector at 1.55 mm , SPIE Proc. vol.5840, pp.545-553 (2005).
[57] M. Casalino, L. Sirleto, L. Moretti, S. Libertino, I. Rendina Silicon Resonant Cavity Enhanced
Photodetector at 1.55 mm , Proc. of the 2nd IEEE International Conference on Group IV Photonics
(2005), pp. 143-145
[58] M. Casalino, L. Sirleto, L. Moretti, S. Libertino, I. Rendina Si-Based Resonant Cavity Enhanced Photodetectors at 1.55 m Proceedings of Frontiers in Optics 2005 - in stampa
[59] M. Casalino, L. Sirleto, L. Moretti, D. Panzera, S. Libertino, I. Rendina Silicon Resonant
Cavity Enhanced Photodetector at 1.55 mm , Atti del Congresso AISEM 2005 in stampa
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Dipartimento di Ingegneria dell’Informazione
Research topics
1) CHARACTERIZATION OF WIDE BANDGAP (SIC- AND GAN-BASED) SEMICONDUCTOR DEVICES
Roberto Pierobon, Fabiana Rampazzo, Gianluca Tamiazzo, Alberto Sozza, Augusto Tazzoli,
Francesca Danesin, Gaudenzio Meneghesso, Enrico Zanoni
2) RELIABILITY OF GAN BASED LIGHT EMITTING DIODE
Matteo Meneghini, Lorenzo R. Trevisanello, Simone Levada, Gianluca Tamiazzo, Augusto Tazzoli,
Simone Buso, Giorgio Spiazi, Gaudenzio Meneghesso, and Enrico Zanoni
3) CHARACTERIZATION OF THE ESD SENSITIVITY ON ADVANCED CMOS
TECHNOLOGIES
Gaudenzio Meneghesso, Augusto Tazzoli, Andrea Cester, Simone Gerardin, Alessandro Paccagnella
and Enrico Zanoni
4) CHARACTERIZATION AND RELIABILITY OF RF-MEMS
Augusto Tazzoli, Vanni Peretti, Gaudenzio Meneghesso, and Enrico Zanoni
5) ELECTROMAGNETIC COMPATIBILITY IN POWER ELECTRONICS
S.Buso, G.Spiazzi
6) DC/DC AND AC/DC CONVERTERS
S.Buso, G.Spiazzi, P.Tenti
7) INTEGRATED DIGITAL CONTROL FOR SWITCHED-MODE POWER SUPPLIES
E. Tedeschi, L. Corradini, P.Mattavelli, P. Tenti
Collaborations: Politecnico di Milano, University of Udine, Center of Power Electronics Systems
(CPES), Colorado Power Electronics Center (CoPEc), ST Microelectronics, Infineon Technologies
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8) MODELING, DESIGN AND CONTROL OF UPS AND COMPENSATING SYSTEMS
E. Tedeschi, P.Mattavelli, P. Tenti
9) DESIGN OF ANALOG DECODERS
A. Gerosa, A. Neviani, D. Vogrig, A. Xotta
Collaborations: STMicroelectronics, Politecnico di Torino
10) ULTRA WIDE BAND RECEIVERS
A. Bevilacqua, A. Gerosa, A. Neviani
Collaborations: University of California, Berkeley
11) ANALOG-TO-DIGITAL CONVERTERS
A. Bevilacqua, A. Gerosa, A. Neviani, A. Xotta
titoloSTUDY OF GATE OXIDES FOR DEEP SUB-MICRON CMOS TECHNOLOGIES AND
BIOSENSORS Leonardo Bandiera, Giorgio Cellere, Andrea Cester, Alberto Gasperin, Simone
Gerardin, Alessandro Paccagnella
Collaborations: STMicroelectronics, Univ. of Udine, Philips, IMEC, IRST, UABarcelona, CRIBIPadova, CIVEN-Marghera
12) IONIZING RADIATION EFFECTS ON SILICON DEVICES
Andrea Cester, Giorgio Cellere, Alberto Gasperin, Simone Gerardin, Alessandro Paccagnella
Collaborations: STMicroelectronics, Politecnico di Torino, Univ. of Modena and Reggio Emilia,
Clemson University, INAF-Milano, CERN-Geneva, INFN
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CHARACTERIZATION OF WIDE BANDGAP (SIC- AND GAN-BASED)
SEMICONDUCTOR DEVICES
R.Pierobon, F.Rampazzo, G.Tamiazzo, A.Sozza, A.Tazzoli, F.Danesin, G.Meneghesso, E.Zanoni
The wide bandgap semiconductor gallium nitride (GaN) and related materials are highly attractive for high-power and high-temperature applications. Significant results have been obtained
in the fabrication of GaN-based microwave power field effect transistors, demonstrating impressive
DC and rf characteristics. However, instabilities related to material and trapping effects limited the
reproducibility and the performance of these devices. A decrease of the drain current, I D , during
operation and after Hot electron tests has been observed during this research activity.
We have investigated the rf current collapse phenomenon in AlGaN/GaN HEMT’s by means of
pulsed, transient, and small-signal measurements. Moreover, 2D numerical device simulations have
been for the first time adopted to analyze the influence of surface states on the pulsed characteristics
of AlGaN/GaN HEMT’s. Thanks to a collaboration with the University of Juelich (D), we have
investigated different GaN-HEMT devices process with different technology of the gate region.
Simulations point out that an additional mechanism exists, capable of explaining the surface-related
ID collapse and the correlated dispersion effects. Owing to the negative polarization charge, bands
are actually bent upwards at the ungated surface. This makes the occupation of energy levels
relatively close to the top of the valence band (EV ) susceptible to be modulated by bias changes
through hole exchange with the valence band. Simulations can not account for surface leakage
current, and can not therefore be used to discriminate between the enlightened hole-trap mechanism
and more conventional, electron-trap-based interpretations.
We have also carried out a detailed characterization of long-term aging (by means of both high
temperature storage and hot-electron stress) in unpassivated GaN/AlGaN/GaN HEMTs on SiC
substrates. First, hot carrier effects and their dependence on bias conditions have been analyzed
by electron luminescence measurements. Afterward, long term hot-electron-stress in on-state and
off-state conditions (up to 150 hours) have been carried out. Besides other degradation modes, two
main results have been observed:
(i) a new correlation between gate leakage current and drain current collapse phenomena have
been observed and explained;
(ii) the evidence of trapping phenomena and traps creation on GaN/AlGaN/GaN HEMT on SiC
substrate before and after a constant biasing life test have been demonstrated.
The duration of the test was more than 3000 hours and it represents, up to now, one of the
longest ever published on this kind of technology. The devices were characterized using lowfrequency experimental techniques, namely low frequency noise (LFN) measurements, transconductance frequency-dispersion gm (f ), and gate-lag measurements.
Finally, the performance of a 600V, 4A Silicon Carbide (SiC) Schottky diode (Infineon
SDP04S60) has also been experimentally evaluated and compared with an ultra-fast, soft-recovery,
silicon power diode (Fairchild RURD460). A substantially negligible recovery current is observed
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for the SiC Schottky diode with expected great advantage on EMI generation; on the other hand,
the forward voltage drop is larger than that of Si diodes with not easily predictable behavior in
power applications efficiency.
[ 1 ] J. BERNÁT, R. PIEROBON, M. MARSO, J. FLYNN, G. BRANDES, G. MENEGHESSO, E.
ZANONI, P. KORDOŠ, “ Low current dispersion and low bias-stress degradation of unpassivated
GaN/AlGaN/GaN/SiC HEMTs”, Phys. Status Sol. (C) Vol 02, No. 7, pp. 2676-2679, 2005.
[ 2 ] G. VERZELLESI, G. MENEGHESSO, A. CHINI, E. ZANONI, C. CANALI, “DC-to-RF
dispersion in GaAs and GaN based Heterostructure FETs: Performance and reliability issues”,
Microelectronics Reliability, Vol. 45, pp. 1585-1592, 2005 (also INVITED at ESREF 2005).
[ 3 ] P. KORDOŠ, J. BERNÁT, M. MARSO, AND H. LÜTH, F. RAMPAZZO, G. TAMIAZZO, R.
PIEROBON, AND G. MENEGHESSO, “Influence of gate-leakage current on drain current collapse
of unpassivated GaN/AlGaN/GaN high electron mobility transistors” Applied Physics Letters Vol.
86, p. 253511, 2005.
[ 4 ] G. MENEGHESSO, R. PIEROBON, F. RAMPAZZO, G. TAMIAZZO, E. ZANONI, J.
BERNÁT, P. KORDOŠ, A.F. BASILE , A. CHINI, G. VERZELLESI “Hot-Electron-Stress Degradation in Unpassivated GaN/AlGaN/GaN HEMTs on SiC”, IEEE-IRPS 2005, International Reliability Physics Symposium, pp.415-422, San Jos, California, April 17-21, 2005.
[ 5 ] F.RAMPAZZO, G. MENEGHESSO, R. PIEROBON,G. TAMIAZZO, E. ZANONI,P. KORDOŠ, J. BERNÁT, “Hot Electron stress on unpassivated GaN/AlGaN/GaN HEMTs”, WOCSDICE 2005, 29th Workshop on Compound Semiconductor Devices and Integrated Circuits held in
Europe, pp. 137-139, Cardiff - UK, May 16-18, 2005.
[ 6 ] A. SOZZA, C. DUA, N. SARAZIN, E. MORVAN, S.L. DELAGE, F. RAMPAZZO, A.
TAZZOLI, F. DANESIN, G.MENEGHESSO, E. ZANONI, A. CURUTCHET, N. MALBERT AND
N. LABAT, “Traps characterization in Si-doped GaN/AlGaN/GaN HEMT on SiC by means of
low frequency techniques”, Proc. of HETECH 2005, 14th European Heterostructure Technology
Workshop, Bratislava, October 2-5, 2005.
[ 7 ] A. SOZZA, C. DUA, E. MORVAN, M. A. DIFORTE-POISSON, S. DELAGE, F. RAMPAZZO, A. TAZZOLI, F. DANESIN, G. MENEGHESSO, E. ZANONI, A. CURUTCHET, N.
MALBERT , N. LABAT, B. GRIMBERT AND J.-C. DE JAEGER, “Evidence of Traps Creation
in GaN/AlGaN/GaN HEMTs After a 3000 Hour On-state and Off-state Hot-electron Stress”, Tech.
Digest IEEE-IEDM2005, IEEE International Electron Device Meeting, pp.601-604, Washington
DC, December 5-7, 2005.
[ 8 ] R. PIEROBON, G. MENEGHESSO, E. ZANONI, F. ROCCAFORTE, F. LA VIA, V.
RAINERI, “Temperature stability of Breakdown Voltage on SiC power Schottky diodes with different barrier heights”. Material Science Forum, Vol.483-485, pp. 933-936, 2005.
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RELIABILITY OF GAN BASED LIGHT EMITTING DIODE
M.Meneghini, L.Trevisanello, S.Levada, G.Tamiazzo, A.Tazzoli, S.Buso, G.Spiazi, G.Meneghesso, E.Zanoni
High-brightness, high-efficiency GaN-based LEDs have already found many applications, and
are extremely promising devices for solid-state lighting, including general illumination. While reliability of LEDs is significantly better in most aspects compared to traditional light sources, lumen
maintenance remains one of the critical issues concerning this new technology. Early reliability
studies observed a rapid loss of light output, severe degradation of the transparent encapsulating
material under blue and UV illumination and elevated temperatures; non-optimized packaging also
induced other reliability problems due to difficulties in thermal management. As the packaging
technology improves, the interest is focussing on failure modes and mechanisms related with the
semiconductor material and the die technology, which have been less investigated in the past.
We have carried out accelerated aging tests on blue and green InGaN/GaN LEDs packaged
with the usual epoxy encapsulation (lamps) as well as mounted without encapsulation (chips),
in order to isolate the chip-related failure modes. Within this work, we analysed the behavior of
commercially available samples (from several manufacturers) and of R&D test structures, produced
ad hoc for the analysis of specific failure mechanisms by OSRAM-OS (Regensburg). Different kinds
of stress were taken into account: thermal storage without bias (250≤T≤300 ◦ C) and low current
stress without significant self heating (current density < 30 A/cm2 ), in order to distinguish between
failure modes related to temperature and to carrier transport. Further tests were carried out at
high current densities and junction temperatures, in order to estimate the acceleration factors and
to extrapolate LEDs lifetime. Identification of the specific failure mechanisms suggests specific
actions for improving device reliability.
As a result, different failure modes and technologic issues were identified:
(i) thermal storage without applied bias affects devices performance due to de interaction between
magnesium (acceptor dopant) and the hydrogen present in the chip and in the surrounding
material. This effect was detected by means of electrical, capacitive and electroluminescence
measurements. Failure modes identified during stress consist in series resistance and ideality
factor increase, emission crowding, efficiency loss;
(ii) low current density can induce defects generation/propagation near/within the active layer,
even at low temperatures. This result was achieved by means of combined capacitive, optical
and DLTS analysis. Failure modes identified during stress were efficiency decrease and reverse
current increase. Furthermore, the decrease of optical power appears to be correlated with
reverse leakage current increase, possibly due to an increase in the density of non-radiative
recombination centers;
(iii) high current and temperature affect the semi-transparent ohmic contact on top of the device
and the top surface of the p-GaN layer, leading to increase in series resistance, with consequent emission crowding effects that reduce the optical power; this effect is related to the
interaction between magnesium (acceptor dopant) and hydrogen present in the chip and in
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the surrounding material. Defect generation/propagation due to high carrier flow was found
to worsen devices efficiency during stress;
(iv) in encapsulated devices, testing at high current levels and, consequently, at high junction
temperatures, induces degradation of the epoxy material in contact with the heated device
surface, leading to the formation of an opaque layer on the device surface;
(v) during low current stress, an increase in doping of the p-type layer takes place close to the
active region, possibly due to decomposition of Mg complexes, and Mg reactivation;
(vi) both DLTS and photocurrent spectra indicate the creation of extended defects in devices
treated at high current density;
(vii) passivation layer can have a determining role in limiting GaN LEDs stability at high temperature levels, due to the interaction between the hydrogen present in the passivation layer
and the acceptor dopant (magnesium). A detailed study of the properties of the passivation
layer is therefore very important in order to achieve stable devices.
We also have analysed some issues concerning the influence of temperature on the performance
of commercially available LEDs based on Gallium Nitride with light extraction enhanced by flip
chip realization [7]. A key issue for the use of HBLEDs in general lighting applications is the
individuation of the driving strategy that better suits the application needs and, at the same
time, optimizes the devices performance and lifetime. In this research work the effects on the
performance and reliability of high power and high brightness light emitting diodes of two different
driving strategies, namely constant current and pulsed current, have been studied. Main results [7]
can be summarized as follows:
(i) the constant current drive is not the optimal driving strategy for the considered devices;
(ii) pulsed current drive have proved to guarantee a better lumen maintenance and a lower defect
generation rate, provided that the peak current pulse does not exceed the bonding maximum
current limitation;
(iii) in low power devices, the advantage of using a pulsed current drive is even more evident;
(iv) a new generation of HBLED drivers can be conceived that, operating with pulsed current
waveforms, minimizes the need for bulky passive components, like electrolytic capacitors.
Following the research line related to HBLEDs drivers, paper [8] proposes a line fed power supply
for HBLEDs, that is characterized by high efficiency and power density. Based on a double buck
topology, operating at high switching frequency (>200kHZ), the converter is capable of supplying
a constant current to an array of HBLEDs, up to a maximum delivered power of about 30W.
The paper describes the topology and gives basic design criteria. A laboratory prototype is also
described, that demonstrates the validity of the proposed solution.
[ 1 ] A. CASTALDINI, A. CAVALLINI, L. RIGUTTI, M. MENEGHINI, S. LEVADA, G.
MENEGHESSO, E. ZANONI, V. HÄRLE, T. ZAHNER, AND U. ZEHNDER, “Short-term in-
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stabilities of InGaN/GaN light-emitting diodes by capacitance-voltage characteristics and junction
spectroscopy”, Phys. Status Sol. (C) Vol 02, No. 7, pp. 2862-2865, 2005.
[ 2 ] S. BYCHIKHIN AND D. POGANYA, L. K. J. VANDAMME, G. MENEGHESSO AND E.
ZANONI, “Low-frequency noise sources in as-prepared and aged GaN-based light-emitting diodes”,
Journal of Applied Physics Vol. 97, p. 123714 1-7, 2005
[ 3 ] S. LEVADA, M. MENEGHINI, G. MENEGHESSO, E. ZANONI, “Analysis of DC current
accelerated life tests of GaN LEDs using a Weibull-based statistical model”, IEEE Transaction on
Device and Material Reliability (T-DMR), Vol.5, No.4, pp. 688-693, 2005.
[ 4 ] S. BYCHIKHIN, L. K. J. VANDAMME, J. KUZMIK, G. MENEGHESSO, S. LEVADA,
E. ZANONI, D. POGANY, “Accelerated aging of GaN light emitting diodes studied by 1/f and
RTS noise”, ICNF2005, 18th Int. Conference on Noise and Fluctuations, Salamanca, Spain 19-23
September 2005.
[ 5 ] M. MENEGHINI, L.-R. TREVISANELLO, S. LEVADA, G. MENEGHESSO, G. TAMIAZZO,
E. ZANONI, T. ZAHNER, U. ZEHNDER, V. HÄRLE, U. STRAUSS, “Failure mechanisms of
gallium nitride LEDs related with passivation”, Tech. Digest IEEE-IEDM2005, IEEE International
Electron Device Meeting, pp.1031-1034, Washington DC, December 5-7, 2005.
[ 6 ] A. CASTALDINI, A. CAVALLINI, L. RIGUTTI, M. MENEGHINI, S. LEVADA, G.
MENEGHESSO, E. ZANONI , V. HÄRLE, T. ZAHNER, AND U. ZEHNDER, “Role of deep
levels in DC current aging of GaN/InGaN Light-Emitting Diodes studied by Capacitance and
Photocurrent Spectroscopy”, MRS Fall Meetings, Symposium FF: GaN. AlN, InN and Related
Materials, Boston MA, Novembre 28 December 2, 2005, 2005,
[ 7 ] S. LEVADA, D. CARRARO, E. FAVARO, M. MENEGHINI, A. TAZZOLI, S. BUSO, G.
SPIAZZI, G. MENEGHESSO, E. ZANONI, “Factors limiting the High Brightness InGaN LEDs
performance at high injection current bias”, WOCSDICE 2005, 29th Workshop on Compound
Semiconductor Devices and Integrated Circuits held in Europe, pp. 191-193, Cardiff, UK, May
16-18, 2005
[ 8 ] G. SPIAZZI, S. BUSO, G. MENEGHESSO, “Analysis of a High-Power-Factor Electronic
Ballast for High Brightness Light Emitting Diodes”, PESC 2005, 36th IEEE Power Specialist
Conference, Recife, Brasil, June 12-16 2005, pp. 1494-1499.
CHARACTERIZATION OF THE ESD SENSITIVITY ON ADVANCED CMOS
TECHNOLOGIES
G. Meneghesso, A. Tazzoli, A. Cester, S. Gerardin, A. Paccagnella and E. Zanoni
ElectroStatic Discharge (ESD) is a well-known hazard to IC’s during production and assembly.
IC’s are generally protected by protection devices integrated on chip between the pins of the IC
package. These protection devices are designed in such a way that all ESD induced charge can be
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dissipated during the discharge transient. In the CMOS ICs the problem increases dramatically as
the device dimensions scale down into the sub-micron range. In Smart-Power technologies (BCD,
Bipolar CMOS, DMOS) which deal with high output voltages the problem is even more critical.
The problem is also increased by the relatively low information concerning ESD studies on the BCD
technology that can be found in literature. Moreover, the BCD technology, thanks to the large
variety of available protection structures (bipolar, CMOS, DMOS, SCR, diodes, etc) can result
in a larger flexibility than the standard CMOS technology. However, the peculiar applications of
these devices (automotive, industrial, high voltage) lead to very tight requirements for the ESD
susceptibility on the BCD technology devices.
In this period We mainly investigated the effects of destructive and non-destructive Electrostatic
Discharge (ESD) events applied either to the gate or drain terminal of MOSFETs with ultra-thin
gate oxide, emulating the occurrence of an ESD event at the input or output IC pins, respectively.
We studied how ESD may affect MOSFET reliability in terms of Time-To-Breakdown (TTBD) of
the gate oxide and degradation of the transistor electrical characteristics under subsequent electrical
stresses. The main results of this study are that ESD stresses may modify the MOSFET current
driving capability immediately after stress and during subsequent accelerated stresses, but do not
affect the TTBD distributions. The damage introduced by ESD in MOSFETs increases when the
gate oxide thickness is reduced.
[ 1 ] A. CESTER, S. GERARDIN, A. TAZZOLI, A. PACCAGNELLA, E. ZANONI, G. GHIDINI,
AND G. MENEGHESSO, “ESD Induced Damage on Ultra-Thin Gate Oxide MOSFETs and its
Impact on Device Reliability”, IEEE-IRPS 2005, International Reliability Physics Symposium,
pp.84-90, San Jos, California, April 17-21, 2005.
[ 2 ] A. TAZZOLI, G. MENEGHESSO, E. ZANONI “A Novel fast and Versatile Temperature
Measurement System for LDMOS Transistors”, Microelectronics Reliability Vol. 45, pp. 17421745, 2005
[ 3 ] L. VENDRAME, L. BORTESI, M. BIASIO AND G. MENEGHESSO, “Time domain approach
for the evaluation of RC delays effects in ULSI interconnect lines”, IEEE SPI-2005, Proc. 9th
IEEE Workshop On Signal Propagation On Interconnects, Garmisch-Partenkirchen, pp. 139-142,
Germany, May 10-13, 2005.
CHARACTERIZATION AND RELIABILITY OF RF-MEMS
A. Tazzoli, V. Peretti, G. Meneghesso, and E. Zanoni
Emerging and future autonomous, wireless communications systems require highly reliable
electronic components with very low power consumption and micromechanical switches present
a promising technology to meet this demand. MEMS switches are devices that use mechanical
movement to achieve a short circuit or an open circuit in the RF transmission line. RF MEMS
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switches are the specific micromechanical switches that are designed to operate at RF-to-milimeterwave frequencies (0.1 to 100 GHz). Such RF switches have been demonstrated with low loss, low
power consumption, low distortion, and higher off-state isolation as compared to p-i-n diodes or
field effect transistors. The high cost of packaging such devices has also limited their commercial
acceptance. Moreover, their power handling capability is normally much lower than 1 W, and
reliability concerns become more pronounced.
The reliability of MEMS switches is of major concern for long term applications and is currently
the subject of an intense research effort. Actually, many MEMS switches have been tested up to 100
billion cycles with no observed mechanical failure around the anchors (the location of maximum
strain). For dc-contact switches, the main failure mechanisms are resistive, while for capacitive
switches, the main failure mechanism is due to stiction.
In this research work we have carried out an extensive electrical characterization in order to
identify the dynamic response of RF-MEMS switches driven in different conditions of bias and
actuation time. We have found that an optimum actuation voltage must be chosen as a tradeoff between good switch transmission and isolation properties and the need to avoid bouncing
phenomena when the actuation voltage has been applied. Moreover, the degradation of shunt
RF-MEMS strongly depends on the duty cycle of the actuation voltage waveform and so on the
time that the switch spends in the actuated state. Another important aspect concerning the
reliability of MEMS devices in general that has been poorly investigated is the sensitivity to the
Electro Static Discharge or Electrical Over Stress (EOS). Using a Transmission Line Pulser Time Domain Reflectometer (TLP-TDR) on wafer system we have stressed RF-MEMS switches in
different conditions with interesting results. We have found that TLP-ESD pulses around 250V that
corresponds to a very low HBM event applied to the actuation pins produce potentially dangerous
high currents exposing issues related to the device electrode layout. Moreover, the TLP-ESD pulses
of around 250V can easily lead to device destruction indicating the necessity of a detailed study of
the ESD sensitivity of these RF-MEMS switches.
[ 1 ] R. Gaddi, A. Gnudi, A Tazzoli, G. Meneghesso, E. Zanoni, “Reliability of RF-MEMS”,
Focussed Session on Reliability of emerging technologies for microwave applications, at the
EuMW2005, European Microwave Week, Paris 3-7 October 2005.
[ 2 ] A. Tazzoli, A. Gnudi, R. Gaddi, V. Peretti, E. Zanoni, G. Meneghesso, “Resistive RF-MEMS
Switches Characterization and Reliability”, Proc. of HETECH 2005, 14th European Heterostructure Technology Workshop, Bratislava, October 2-5, 2005
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ELECTROMAGNETIC COMPATIBILITY IN POWER ELECTRONICS
S.Buso, G.Spiazzi
Research activities regarding electromagnetic interferences (EMI) in power electronics are gaining considerable attention due to the more and more stringent requirements set by international
standards. The exponential increase of electronic devices, the growing trend toward compactness
and size reduction and toward high operation frequencies have all led to the necessity of a deeper
understanding of electromagnetic noise generation and coupling mechanisms, and of the effects of
radiated and conducted noise on electronic circuits and the surrounding environment. Papers [1-5]
propose and discuss a novel analysis methodology, to be used in the identification of noise sources
in complex SMPS PCBs. This is based on the use of wavelet transforms.The basic idea is to exploit
the capability of wavelet transforms to locate pre-defined frequency patterns in time, so as to identify the correlation between signals on the PCB and the noise measured on the LISN by the EMI
receiver. After discussing the main theoretical issues, mainly comparing the proposed method with
the standard, Fourier based approach, the papers present extensive results based on laboratory
test circuits. The different papers deal with dc-dc converters, ac-dc converters and voltage source
inverters. All the experimental results confirm the viability of the approach. Recently, the research
focus on EMC is moving from the printed circuit board level (PCB) to the integrated circuit (IC)
level. Following this trend, paper [6] discusses some effects of RFI injection on the input stages of
operational amplifiers. The paper extends previously published results proposing a more general
explanation of the noise coupling and propagation mechanisms, putting into evidence the critical
role played by rectification phenomena in bipolar devices. Solutions to be adopted to mitigate the
observed malfunctions are also proposed.
[ 1 ] L. COPPOLA, Q. LIU, S. BUSO, D. BOROYEVICH, “On the Usage of Wavelet Transform for
Studying Conducted EMI in Power Electronics Systems”, 2005 CPES Power Electronics Seminar
Proceedings , Blacksburg, Virginia, USA, 2005.
[ 2 ] L. COPPOLA, S. BUSO, Q. LIU, D. BOROYEVICH, A. BELL, “Application of Fourier
and Wavelet Transforms to the Identification of EMI Noise Sources in SMPSs”, 2005 International
Symposium on Electromagnetic Compatibility - EMC 2005 , Chicago, USA, Vol. 2, August, 2005,
pp. 584-589.
[ 3 ] L. COPPOLA, S. BUSO, “Application of the Wavelet Transform to the Analysis of Conducted
EMI in SMPSs”, EMC Zurich 2005 , Zurich, Switzerland, Vol. , No. , February, 2005, pp. 497-502.
[ 4 ] L. COPPOLA, S. BUSO, Q. LIU, D. BOROYEVICH, A. BELL, “Identification of Conducted
Noise Causes through CWT in a Boost PFC”, Power Electronics Specialist Conference (PESC),
Recife, Brazil, Vol. , No. , June, 2005, pp. 2216-2221.
[ 5 ] L. COPPOLA, S. BUSO, Q. LIU, D. BOROYEVICH, A. BELL, “Identification of EMI Noise
Sources through the Use of Fourier and Wavelet Transforms”, IEEE Industry Application Society
Annual Meetin, (IAS) , Hong Kong, 2005.
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[ 6 ] M. CORRADIN, G. SPIAZZI, S. BUSO, “Effects of Radio Frequency Interference in OPAMP
Differential Input Stages”, 2005 International Symposium on Electromagnetic Compatibility - EMC
2005 , Chicago, USA, Vol. 3, No. , August, 2005, pp. 866-871.
DC/DC AND AC/DC CONVERTERS
G.Spiazzi, S.Buso, P.Tenti
The research activity is centred on the definition of novel topologies and control strategies for the
implementation of AC/DC and DC/DC converters. This kind of research is typically application
driven and the proposed solutions are almost always found as the results of optimizations of basic
converters for the particular problem. From this standpoint, paper [1] discusses the different
problems related to the application of a piezoelectric power supply to cold cathode fluorescent lamps
(CCFLs). The considered topology is a conventional half bridge converter, but the interface between
this controlled voltage source and the load (CCFL) is a piezoelectric, not magnetic, transformer.
This solution, that allows to minimize cost and size of the power supply, also poses some interesting
control problems, giving rise, in some particular conditions, to unstable lamp behaviors. These
effects are discussed and analyzed in detail in paper[2], where the origin of the instability is identified
and explained by means of equivalent electrical models of the lamp and piezoelectric transformer.
The interest towards digital controllers for Switch-Mode Power Supplies (SMPS) is growing rapidly,
because the feasibility and advantages of digital controller ICs, specifically developed for highfrequency switching converters, have been widely demonstrated and are nowadays fully recognized.
Following this trend, paper [3] proposes a fully digital control of a boost Power Factor Preregulator
(PFP) with input voltage estimation, that seems to be suitable for smart-power integration. The
proposed solution includes a control algorithm for the estimation of the rectified input voltage
(based on the theory of disturbance observers), thus saving the input voltage conditioning and
sampling. This guarantees the minimization of the number of inputs and, as a consequence, of the
IC’s cost.
[ 1 ] G. SPIAZZI, S. BUSO, P. TOMASIN, A. ONGARO, “Cold Cathode Fluorescent Lamp
Power Supply Based on Piezoelectric Transformers”, Society for Information Display (SID), Boston,
Massachusetts, USA, Vol. XXXVI, No. , May, 2005, pp. 555-557.
[ 2 ] G. SPIAZZI, S. BUSO, “Small-Signal Analysis of Cold Cathode Fluorescent Lamp Ballasts”,
Power Electronics Specialist Conference (PESC) , Recife, Brazil, June, 2005, pp. 2783-2789.
[ 3 ] P. MATTAVELLI, G. SPIAZZI, P. TENTI, “Predictive Digital Control of Power Factor
Preregulators With Input Voltage Estimation Using Disturbance Observers”, Trans. on Power
Electronics, Vol. 20, No. 1, January, 2005, pp. 140-147.
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INTEGRATED DIGITAL CONTROL FOR SWITCHED-MODE POWER
SUPPLIES
E. Tedeschi, L. Corradini, P.Mattavelli, P. Tenti
The research activity is mainly focused on the development of digital controllers for SwitchMode Power Supplies (SMPS), which are gaining growing interest both from the scientific and
industrial point of view. Our research activities can be summarized as follows:
- Development of mixed-signal control architecture for high-frequency dc-dc converters [1,2].
Most of the digital controllers developed up to now are based on conventional architectures where
Analog-to-Digital Converters (ADCs) are used to digitalize the converter state variables and a
digital control algorithm determines the duty-cycle, that drives the Digital Pulse Width Modulator
(DPWM). In order to limit the complexity of the digital controller, low resolution ADCs and
DPWM are usually needed [2,4], which unfortunately enhance undesirable quantization effects and
limit cycle oscillations. Mixed-signal solution are an interesting alternative in order to overcome the
limitations of conventional solutions. For voltage-mode dc-dc converters, we have proposed in [8] a
control architecture which uses a simple analog front-end (a low-resolution DAC) and a comparator
and a simple digital algorithm. The proposed solution enables high-dynamic performances.
- Development of a simple autotuning technique for voltage-mode dc-dc converters [3,4]. The
proposed approach is based on the relay feedback method and introduces perturbations on the
output voltage during converter soft-start. By using an iterative procedure, the tuning of PID
parameters is obtained directly by including the controller in the relay feedback and by adjusting
the controller parameters based on the specified phase margin and control loop bandwidth. A nice
property of the proposed solution is that output voltage perturbations are introduced while maintaining the relay feedback control of the digitally controlled converters. The proposed algorithm
is simple, requires small tuning times and it is compliant with the cost/complexity constraints of
integrated digital ICs. Experimental results have verified the effectiveness of the proposed solution.
- Investigation of digital control for non-isolated single-inductor multiple-output step-down dcdc converters [5,6]. The research activity has been focused for those application where there is
the need of regulation of multiple and independent supply voltages , such as personal digital assistants (PDAs), small microcontrollers and digital components, etc. . Our attention has been
devoted to SIMO converters operating in in Continuous-Conduction Mode (CCM), where the accurate and independent control of each output requires sophisticated digital control architecture
so as to minimize cross-regulation problem. The adopted control includes a separate regulation of
common-mode and differential-mode output voltages. Moreover, variable gain of the differentialmode regulator and a non-linear evaluation of the common-mode voltage have been investigated in
order to improve the system dynamic response at different load conditions.
- Analysis of limit-cycle oscillations in digitally controlled dc-dc converters [7]. Digitally controlled dc-dc converters are affected by quantization effects on A/D converters and Digital PulseWidth Modulators (DPWMs) which may result in undesirable limit-cycle oscillations. Existing
static and dynamic models predict the existence of only a small part of limit cycle oscillations, so
that extensive time-domain simulations are usually needed in order to verify the presence of limitcycle oscillations under different load and input voltage conditions. We have proposed an aternative
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approach based on statistical model. The proposed approach gives additional and interesting design
criteria for digitally controlled dc-dc converters.
- Predictive digital control for Voltage Regulation Modules for the supply of the future generation of microprocessors.In [8] a predictive digital control technique for (VRM) is investigated. Due
to the Adaptive-Voltage-Positioning (AVP) of the VRM, the controlled variable includes a combination of output voltage and inductor current. Besides the predictive regulator, a disturbance
observer is used for compensation of input voltage variations and any other source of errors, such
as dead-times, parameter and model mismatches. Experimental investigation has been performed
using discrete components, implementing the digital control in a Field Programmable Gate Array
(FPGA). Experimental results on a synchronous buck dc-dc converter have verified the properties
of the predictive control.
[ 1 ] S. SAGGINI, G. GARCEA, M. GHIONI, P. MATTAVELLI, “Analysis of High-Performance
Synchronous/Asynchronous digital control for dc-dc boost converters”, IEEE Applied Power Electronics Conference (APEC) 05, Austin (TX), 6-10 March 2005.
[ 2 ] G. GARCEA, P. MATTAVELLI, K.LEE, F.C.LEE, “A Mixed-Signal Control for VRM applications”, 11th European Conference on Power Electronics and Applications (EPE 2005), Dresda,
September 2005.
[ 3 ] W. STEFANUTTI, P. MATTAVELLI, S. SAGGINI, M. GHIONI, “Autotuning of Digitally
Controlled Buck Converters Based on Relay Feedback”, IEEE Power Electronics Specialist Conferenze (PESC 2005), Recife, June, 2005.
[ 4 ] W. STEFANUTTI, P. MATTAVELLI, S. SAGGINI, M. GHIONI, “A PID Autotuning Method
for Digitally Controlled dc-dc Boost Converters”, 11th European Conference on Power Electronics
and Applications (EPE 2005), Dresda, September 2005.
[ 5 ] D. TREVISAN, P. MATTAVELLI, P. TENTI, “Digital Control of Single-Inductor DualOutput dc-dc Converters in Continuous-Conduction Mode”, IEEE Power Electronics Specialist
Conferenze (PESC 2005), Recife, June, 2005.
[ 6 ] D. TREVISAN, W. STEFANUTTI, P. MATTAVELLI, P. TENTI, “FPGA control of SIMO
dc-dc converters using load current estimation”, IEEE International Conference on Industrial Electronics, Control and Instrumentation, IECON’05, November 2005.
[ 7 ] S. SAGGINI, W. STEFANUTTI, D. TREVISAN, P. MATTAVELLI, G. GARCEA, “Prediction of Limit-Cycles Oscillations in Digitally Controlled DC-DC Converters using Statistical
Approach”, IEEE International Conference on Industrial Electronics, Control and Instrumentation, IECON’05, Roanoke, Virginia, USA, November, 2005.
[ 8 ] E. DELLA MONICA, W. STEFANUTTI, P. MATTAVELLI, E. TEDESCHI, P. TENTI,
S. SAGGINI, “Predictive Digital Control for Voltage Regulation Module Applications”, IEEE International Conferenze on Power Electronics and Drive Systems (PEDS 2005), Kuala Lumpur
(Malaysia), December, 2005.
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MODELING, DESIGN AND CONTROL OF UPS AND COMPENSATING
SYSTEMS
E. Tedeschi, P.Mattavelli, P. Tenti
The research activity is devoted to the modelling, design and control of high performance PWM
converters applied as Uninterruptible Power Supplies (UPS) and active power filters. In [1] we have
investigated the effects of an improved dead-beat control where a disturbance observer has been
proposed for the compensation of unmodeled dynamics. In [2] we have proposed an analog circuit
for selective harmonics compensation for active filters, UPS and Statcom. In [3] the torque ripple
in a PM drive has been reduced by means of a repetitive control, which introduces tuned filters
in the current loop, enabling zero steady state error on the selected harmonics. A similar concept
has been proposed in [5] for UPSs, where a combination of load current and inductor current is
adopted for the internal current control. In [4] we have investigated the use of the output stage of
UPSs for the harmonic compensation of distorting loads during UPS stand-by operation. Finally,
in [6] an optimization of hybrid power filters (a combination of active and passive filters) based on
a novel compensation theory has been investigated.
[ 1 ] P. MATTAVELLI, “An improved Dead-beat Control for UPS using Disturbance Observers”,
IEEE Transactions on Industrial Electronics, Vol. 52, No. 1, February 2005, pp. 206-212.
[ 2 ] J. LEYVA-RAMOS, G. ESCOBAR, P.R. MARTINEZ, P. MATTAVELLI, “Analog Circuits
to Implement Repetitive Controllers for Tracking and Disturbance Rejection of Periodic Signals”
IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 52, No. 8, August 2005, pp.
446-470.
[ 3 ] P. MATTAVELLI, L. TUBIANA, M. ZIGLIOTTO, “Torque-ripple reduction in PM drive using
repetitive current-control”, IEEE Transactions on Power Electronics, Vol. 20, No. 6, November
2005, pp. 1423-1431.
[ 4 ] F. POLO, P. MATTAVELLI, “Dynamic improvement in Active Power Filters based on the
output stage of Uninterruptible Power Supply”, International PCIM Conference 2005, June 7 9,
2005 in Nrnberg, Germany.
[ 5 ] G. ESCOBAR, A.A. VALDEZ, J. LEYVA-RAMOS, P. MATTAVELLI, “A Repetitive-based
controller for UPS using a combined capacitor/load current sensing”, IEEE Power Electronics
Specialist Conferenze (PESC 2005), Recife, June, 2005.
[ 6 ] P. TENTI, E. TEDESCHI, P. MATTAVELLI, “Optimization of Hybrid Filters for Distributed
Harmonic and Reactive Compensation”, IEEE International Conferenze on Power Electronics and
Drive Systems (PEDS 2005), Kuala Lumpur (Malaysia), December, 2005.
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DESIGN OF ANALOG DECODERS
A. Gerosa, A. Neviani, D. Vogrig
The analog approach to the implementation of iterative decoding algorithms (like those for
convolutional codes, Turbo codes, LDPC) has gained popularity thanks to some successful test
circuits in CMOS and BiCMOS technology that demonstrated a factor from 10 to 100 improvement
in power efficiency over their digital counterparts.
A new project is being carried on to explore efficient solutions to implement reconfigurable
decoders (i.e. with programmable block length and code rate) with a further increase in complexity
(i.e. maximum block length). Two viable approaches have been identified so far, the first based on
the use of the dual code, the second based on a sliding-window, discrete-time implementation of a
SISO decoder.
According to a feasibility study, the approach based on the dual code seems to be significantly
less robust than the sliding-window approach with respect to device mismatch. A prototype of a
sliding-window decoder in 0.18 µ m CMOS technology for a serially concatenated convolutional
code is being designed. The decoder is reconfigurable in both block length and code rate. An
interleaver size up to 2400 bit is considered. The decoder core implements a single SISO working
on a window of 300 trellis sections which is reused several times to decode the two constituent
codes. Therefore, the resulting decoder performs iterations, but is fully analog. A tape-out of the
prototype will take place by the end of the year.
[1] D. Vogrig, A. Gerosa, A. Neviani, A. Graell, G. Montorsi, S. Benedetto, ”A 0.35 µ m CMOS
analog turbo decoder for the 40-bit rate 1/3 UMTS channel code”, IEEE JOURNAL OF SOLIDSTATE CIRCUITS. vol. 40, pp. 753-762.
[2] A. Graell, S. Benedetto, G. Montorsi, D. Vogrig, A. Neviani, A. Gerosa, ”An analog turbo
decoder for the rate-1/3, 40 bit, UMTS turbo code”, IEEE International Conference on Communications - ICC 2005, vol. 1, pp. 663-667, 2005.
ULTRA WIDE BAND RECEIVERS
A. Bevilacqua, A. Gerosa, A. Neviani
Design, fabrication and testing of the analog front-end for receivers based on the multiband
OFDM approach with the full bandwith 3.1 - 10.6 GHz. A prototype of Low Noise Amplifier
(LNA) has been fabricated in a 0.18 um CMOS technology and successfully tested. A prototype
including LNA, downconversion mixer and notch filter to suppress interferers in the 5.4 GHz WLAN
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band has been designed and fabricated in a 0.13 um CMOS technology. A calibration algorithm
for the automatic tuning of the notch filter frequency in currently under investigation.
A dual-mode oscillator built around a transformer-based resonator has been studied. By making
use of this technique, a wideband VCO has been designed in a 0.13 um CMOS techology that
features a 69excellent 14.8 dB power-frequency-tuning-normalized figgure of merit, accounting of
-118.6 dBc/Hz phase noise at 1 MHz offset from the 4.6 GHz carrier at 1 mW power consumption
has been measured.
[1] A. Bevilacqua, F. Svelto, ”Statistical analysis of second-order intermodulation distortion in
WCDMA direct conversion receivers”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS
II. vol. 52, pp. 117 - 121, 2005.
ANALOG-TO-DIGITAL CONVERTERS
A. Bevilacqua, A. Gerosa, A. Neviani, A. Xotta
This activity is mainly concerned with the study and the design of analog-to-digital converters
for multistandard wireless receivers. During the year 2005 an architecture based on the cascade of
a single-bit 2-1 Sigma-Delta has been mapped in a modular implementation, which allows to easily
reconfigure modulator order, oversampling ratio and equivalent number of bits of the internal
quantizer. A prototype of an A/D converter base don this architecture has been designed with
the target to fulfill the requirement of a wide range of standards: GSM, Bluetooth, UMTS and
WLANa. Simulation results show a dynamic range of 85dB, 72dB, 62dB and 59dB for GSM,
Bluetooth, UMTS and WLANa, respectively. The corresponding power consumption is 4.6mW,
5.5mW, 7.4mW and 18.9mW. The chip has been fabricated in a 0.35 um CMOS technology and is
currently under test.
[1] A. Xotta, A. Gerosa, A. Neviani, ”A multi-mode Sigma-Delta analog-to-digital converter for
GSM, UMTS and WLAN”, IEEE International Symposium on Circuits and Systems - ISCAS 2005,
vol. 3, pp. 2551-2554.
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STUDY OF GATE DIELECTRICS FOR DEEP SUB-MICRON CMOS
TECHNOLOGIES AND BIOSENSORS
Leonardo Bandiera, Giorgio Cellere, Andrea Cester, Alberto Gasperin, Simone Gerardin, Alessandro Paccagnella
Scaling the gate oxide thickness in CMOS technologies is approaching its physical limit. While
the onset of a catastrophic (hard) breakdown event becomes less likely in the gate oxide, due to
the reduction of the supply voltage, new degradation phenomena appear, not necessarily involving
the generation of parasitic conduction paths across the oxide, following high field stresses. These
phenomena may produce, in parallel to the possible growth of the gate oxide leakage current,
a substantial modification (typically, a decrease) of fundamental MOSFET parameters, such as
the current driving capability and the transconductance. may occur well before the onset of any
breakdown We have studied and modeled through SPICE the dependence of such phenomena on
the MOSFET W/L ratio and on the stress type to which the device has been submitted, evaluating
the gate oxide defective region size in case of oxide breakdown. We have also performed the first
observations of the breakdown spot size and characteristics in ultra-thin oxides irradiated with
high energy heavy ions by using Atomic Force Microscopy. Our investigations have considered
the impact of electrical stresses not only on bulk CMOS components but also on SOI transistors,
clarifying the degradation processes active in those devices and affecting both gate and buried
oxides. We have studied the effect of plasma treatments on the gate oxide integrity, as these
processes are widely used for the fabrication of integrated circuits, and how plasma damage may be
affected by thermal treatments in deuterium gas. The use of alternative gate dielectrics has been
considered as well from the reliability viewpoint. Finally, we have continued our studies on the use
of MOS-based sensors for biological studies. In particular, we have investigated how the surface
preparation methods may affect the measurement of DNA hybridization by using ISFET sensors.
[1] G. Cellere, A. Paccagnella, A. Mazzocchi, M.G. Valentini: Influence of dielectric breakdown on
MOSFET drain current, IEEE Transaction on Electron Devices, vol. TED-52 (2005) pp. 211 217
[2] M. Porti, M. Nafra, X. Aymerich, A. Cester, A. Paccagnella, S. Cimino: ”Irradiation induced
weak spots in SiO2 gate oxides of MOS devices observed with C-AFM” IEE -Electronics Letters,
Vol. 41 (2005) pp.1-2
[3] S. Gerardin, A. Cester, A. Paccagnella, G. Ghidini: ”Impact of Fowler-Nordheim and channel
hot carrier stresses on MOSFETs with 2.2nm gate oxide Microelectronic Engineering, Vol. 80
(2005) pp. 178-181
[4] E. Miranda, A. Cester, J. Sue, A. Paccagnella, and A. Ghidini: Simulation of the TimeDependent Breakdown Characteristics of Heavy-Ion Irradiated Gate Oxides Using a MeanReverting Poisson-Gaussian Process IEEE Transactions on Nuclear Science, vol. TNS-52 (2005),
pp. 1462 1467
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[5] M. Porti, M. Nafria, X. Aymerich, A. Cester, A. Paccagnella, and S. Cimino: Electrical Characterization at a Nanometer Scale of Weak Spots in Irradiated SiO2 Gate Oxides IEEE Transactions
on Nuclear Science, vol. TNS-52 (2005), pp. 1457 1461
[6] A. Cester, S. Gerardin, A. Paccagnella, E. Simoen, and C. Claeys: ”Electrical Stresses on
Ultra-Thin Gate Oxide SOI MOSFETs after Irradiation” IEEE Transactions on Nuclear Science,
vol. TNS-52 (2005), pp. 2252- 2258
[7] Gerardin, S.; Cester, A.; Paccagnella, A.; Gasiot, G.; Mazoyer, P.; Roche, P.: ” RadiationInduced Breakdown in 1.7 nm Oxynitrided Gate Oxides” IEEE Transactions on Nuclear Science,
vol. TNS-52 (2005), pp. 2210- 2216
[8] G. Cellere, A. Paccagnella, M.G. Valentini, PE-CVD Induced Damage on Ultra Thin SiO2
layers (invited talk) Eighth International Symposium on Silicon Nitride and Silicon Dioxide Thin
Insulating Films and Other Emerging Dielectrics (at the 207th Meeting of The Electrochemical
Society), Quebec City, May 2005, pp. 74-85
[9] L. Bandiera, G. Cellere, A. Paccagnella, S. Cagnin, G. Lanfranchi, L. Lorenzelli, P. Schiavuta,
T. Cesca: Adsorption of poly(L-lysine) on Si3N4-gate of ISFET based DNA sensors Proceedings
of AISEM 2005, Firenze, 15-17 February 2005, p.85
[10] G. Cellere, A. Paccagnella, M.G. Valentini, M. Alessandri: Effect of deuterium anneal on thin
gate oxide reliability Proceedings of 2005 International Conference on IC Design and technology
(ICICDT), Austin TX, 9-11 May 2005, pp 139-142.
[11] L. Bandiera, G. Cellere, S. Cagnin, A. De Toni, A. Paccagnella, G. Lanfranchi, L. Lorenzelli:
A silicon nitride sensor for electrical detection of cDNA hybridization kinetic, Proceedings of XIX
Eurosensors2005, Barcelona, 11-14 September 2005, paper WPa56.
[12] A. Cester, S. Gerardin, A. Paccagnella, and G. Ghidini: ”Modeling MOSFET and circuit
degradation through SPICE” 35th IEEE - European Solid-State Device Research Conference ESSDERC 2005, Grenoble, France, September 13-15, 2005
[13] A. Cester, S. Gerardin, A. Paccagnella, E. Simoen, C. Claeys, A. Candelori: ”Heavy Ion
Damage in Ultra-Thin Gate Oxide SOI MOSFETs” Proceedings of RADECS 2005, 8th European
Conference on Radiation and its Effects on Components and Systems, Cap dAgde, 20-23 September
2005
[14] S. Gerardin, A. Cester, A. Paccagnella, G. Ghidini, A. Candelori, N. Bacchetta, D. Bisello, M.
Glaser: ”Impact of 24-GeV proton irradiation on 0.13 m CMOS devices”, Proceedings of RADECS
2005, 8th European Conference on Radiation and its Effects on Components and Systems, Cap
dAgde, 20-23 September 2005
[15] Cimino, S.; Pantisano, L.; Aoulaiche, M.; Degraeve, R.; Kwak, D.H.; Crupi, F.; Groeseneken,
G.; Paccagnella, A.: ”Hot carrier degradation on n-channel HfSiON MOSFETs: Effects on the device performance and lifetime” Proceedings of IEEE - International Reliability Physics Symposium
- IRPS 2005, San Jose, April 17-21, 2005, pp. 275-279
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IONIZING RADIATION EFFECTS ON SILICON DEVICES
Andea Cester, Giorgio Cellere, Alberto Gasperin, Simone Gerardin, Alessandro Paccagnella
Ionizing radiation studies on commercial CMOS components are of interest for the intrinsic
radiation tolerance of contemporary deep-submicron technologies, that make them more and more
appealing for space applications. One aspect that is seldom considered is the cumulative effect of
damage from ionizing radiation and electrical stresses, that has been demostrated to be a danger for
the lifetime of deep submicron devices and circuits. These studies are of relevant interest for future
development also of the big accelerators used in High Enenrgy Physics experiments, and we have
evaluated the sensitivity of a 90-nm bulk CMOS technology to the extreme radiation environment
expected in the SLHC scenario by using very high fluence irradiation with 24-GeV protons. Single
event effects produced by a single hitting energetic ion have been carefully investigated in case of
non-volatile memories, namely Floating Gate devices. By irradiating a large cell array a statistical
approach has been made possible to study the prompt and long-term radiation damage. Starting
from an accurate modeling, that has included a random defect generation in the tunnel oxide, we
have been able to evaluate the long-term charge loss from the floating gates through a multi-trap
assisted tunneling to the silicon channel. In parallel we have also investigated the sensitivity of
floating gate cell arrays to total ionizing radiation dose, improving our model capable by comparing
the effects of different radiation sources. A new aspect of Flash memory sensitivity to radiation
damage has been exploited, by considering their possible use as real time radiation monitors, for
instance in space environments. Finally, we have investigated the sensitivity to single event effects
of FPGAs. Reconfigurable devices such as FPGAs are attracting for uses on board of satellites, but
some problems must be overcome that limit their reliability in radiation harsh environments. In
fact, the most powerful and complex FPGAs exploit a SRAM based configuration memory, whose
tolerance to single event effects is typically rather poor. Even ions with relatively low Linear Energy
Transfer (LET) coefficient may easily upset a memory cell, driving the system into a functional
failure. We have continued analyzing the radiation response of Xilinx components, where the
configuration memory can be continuosly monitored to detect the onset of bit flip. The impact of
single event effects has been evaluated also by analyzing the configuration logic and the sensitivity
of the control FSM implemented in each FPGA.
[1] G. Cellere, A. Paccagnella: Comments on Flash memory under cosmic and alpha irradiation
IEEE Transaction on Device and Material Reliability, vol. TDMR-5 (2005) pp.296-297
[2] G. Cellere, A. Paccagnella, A. Visconti, M. Bonanomi, A. Candelori, S. Lora: Effect of different
TID sources on charge loss from programmed FG cells IEEE Transactions on Nuclear Science, vol.
TNS-52 (2005), pp. 2372- 2377
[3] G. Cellere, L. Larcher, A. Paccagnella, A. Visconti, M. Bonanomi: RILC in Floating Gate
Memory Cells IEEE Transactions on Nuclear Science, vol. TNS-52 (2005), pp. 2144- 2152
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[4] P. McNulty, K. Poole, M. Crisler, J. Reneau, G. Cellere, A. Paccagnella, D. Stroebel, M. Fennell,
R. Perez, M. Randall: Improvements in Resolution and Dynamic Range for FGMOS Dosimetry
IEEE Transactions on Nuclear Science, vol. TNS-52 (2005), pp. 2597- 2601
[5] Alderighi, M.; Candelori, A.; Casini, F.; D’Angelo, S.; Mancini, M.; Paccagnella, A.; Pastore,
S.; Sechi, G.R.: ”SEU Sensitivity of Virtex Configuration Logic” IEEE Transactions on Nuclear
Science, vol. TNS-52 (2005), pp. 2462- 2467
[6] G. Cellere, A. Paccagnella, A. Visconti, M. Bonanomi: Transient conductive path induced in
Floating Gate memories by single ions Proceedings of 2005 International Conference on IC Design
and technology (ICICDT), Austin TX, 9-11 May 2005, pp 29-32.
[7] G. Cellere, A. Paccagnella, A. Visconti, M. Bonanomi: Soft Errors induced by single heavy
ions in Floating Gate memory arrays Proceedings of IEEE International Symposium on Defect and
Fault Tolerance in VLSI Systems (DFT’05), Monterey, 3-5 October 2005, pp.275-283
[8] G. Cellere, A. Paccagnella, A. Visconti, M. Bonanomi, S. Beltrami: Single Event Effects in
NAND Flash memory arrays Proceedings of RADECS 2005, 8th European Conference on Radiation
and its Effects on Components and Systems, Cap dAgde, 20-23 September 2005
[9] G. Cellere, A. Paccagnella, A. Visconti, M. Bonanomi, P.J. McNulty: Single-ion dosimetry
based on Floating Gate memories Proceedings of XIV MICROS2005, International Symposium on
Microdosimetry, Venezia, 13-18 November 2005, paper R4
[10] P.J. McNulty: K.F. Poole, M. Crissler, J. Reneau, G. Cellere, A. Paccagnella, A. Visconti,
M. Bonanomi: Sensitivity and dynamic range of FGMOS dosimeters Proceedings of XIV MICROS2005, International Symposium on Microdosimetry, Venezia, 13-18 November 2005, paper
R15
[11] Alderighi,-M.; Candelori,-A.; Casini,-F.; D’Angelo,-S.; Mancini,-M.; Paccagnella,-A.; Pastore,S.; Sechi,-G.-R.: ”Effects on the device performance and lifetime Heavy ion effects on configuration logic of Virtex FPGAs ” Proceedings of 11th-IEEE-International-On-Line-Testing-Symposium.
IOLTS 2005, Saint Raphael, France, July 6-8, 2005, pp.49-53
[12] W. Adam, , A. Paccagnella, et al.: The effect of highly ionising particles on the CMS silicon
strip tracker, Nuclear Instruments and Methods A, A 543 (2005) pp.463-482
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Dipartimento di Ingegneria Elettrica, Elettronica e delle Telecomunicazioni - Universita’ di Palermo
Research topics
1) RECONFIGURABLE ARCHITECTURES FOR WIRELESS SYSTEMS
A. Di Stefano, G. Terrazzino, G. Fiscelli, C. Giaconia
Collaborations: STMicroelectronics, Universita’ di Roma Tor Vergata, Politecnico di Torino
Other sources of funding: MIUR, FIRB
2) DESIGN OF MOS CURRENT-MODE LOGIC CIRCUITS
G. Caruso
Collaborations:
3) TECHNOLOGIES FOR OPTOELECTRONICS
C. Arnone, A. C. Busacca, C. Cali’, G. Carini, A. Castiglia, M. Cherchi, P. Cusumano, G. Lullo,
M. Mosca, S. Riva Sanseverino
Collaborations: CRES - Centro per la Ricerca Elettronica in Sicilia, Monreale (PA); Dipartimento
di Ingegneria Elettronica - Universit Roma Tre; Dipartimento di Elettronica per l’Automazione,
Universit di Brescia; Dipartimento di Ingegneria, Universit di Ferrara
4) POWER MANAGEMENT SYSTEMS
G. Capponi, P. Livreri, G.M. Di Blasi, V.Boscaino
Other sources of funding: PRIN 2003, MIUR 60, STMicroelectronics
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RECONFIGURABLE ARCHITECTURES FOR WIRELESS SYSTEMS
A. Di Stefano, G. Terrazzino, G. Fiscelli, C. Giaconia
This research activity was mainly supported by the PRIMO FIRB project and was focused
on the implementation of efficient VLSI architectures for reconfigurable wireless terminals and
instrumentation. Motivation of this work can be found by observing that in a modern wireless
telecommunication scenario a number of different standards and technologies are routinely used,
often sharing the same frequency bands. Moreover the increasing demand for enhanced features
(higher data rate and Quality of Services, more important among others) pushes the publications
of new standard or amendments over short periods of time. Different standards usually addresses
particular applications; dedicated and optimized technical solutions are needed in order to cope
with new capabilities and performances. This complexity makes the implementation of multistandard transceivers in a single chipset impractical, hence separate hardware platforms are the
usual answer to various standards. Reconfigurable terminals represent one possible solution to
achieve wide interoperability and multi standard compliancy. In particular our research addressed
the implementation of a custom and reconfigurable IEEE 802.11 Medium Access Control (MAC)
and Physiscal (PHY) layer capable of extensive functional configuration (in term of custom access
methods, Quality of Service, cross layer capability and measurement functions) and multi standard
compliancy (Software Defined Radio). The implemented custom 802.11 MAC, described in [1], has
been designed using a System on Chip architecture and has been implemented in an FPGA. The
careful Hardware/Software partitioning and the designed architecture allowed either a reduced area
occupation, either to achieve a very wide configurability yet satisfying the stringent protocol time
constraints. The complete MAC behavior can be totally redefined by modifying the firmware, and
additional feature can also be added by dynamically reconfiguring the MAC hardware. This allowed
to implement and demonstrate some Quality of Service features and cross layer optimization for
H.264 video streming over 802.11 [2], and to precisely measure the channel access statistics on a real
wireless LAN scenario [3]. We also extended the reconfiguration capability to the PHY level, by
designing and implementing a multistandard baseband processor. By reconfiguring the hardware’s
processor description, implemented in an SRAM based FPGA, either an IEEE 802.11 (WiFi) or a
IEEE 802.15.4 (ZigBee) signals have been successfully received, realizing a first practical application
of the Software Defined Radio concept [4].
[1] A. Di Stefano, G. Terrazzino, C.G. Giaconia, ”FPGA Implementation of a Reconfigurable 802.11
Medium Access Control”, proc. of Wireless Reconfigurable Terminals and Platforms, Rome, 10-12
April, 2006. [2] A. Di Stefano, G. Terrazzino, C.G. Giaconia, M. Grangetto, ”A Reconfigurable
FPGA-based 802.11 Demonstrator Endowed with QoS, for Streaming Applications”, proc. of
Wireless Reconfigurable Terminals and Platforms, Rome, 10-12 April, 2006. [3] A. Di Stefano, et
al. ”On the Fidelity of IEEE 802.11 Commercial Cards”, IEEE 1st Intl. Conference on Wireless
Internet, Budapest, 10-14 July 2005. [4] G. Fiscelli, A. Di Stefano, G. Terrazzino, C. Giaconia, ”A
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Software Defined Radio Platform Implementing a WiFi and ZigBee Receiver”, proc. of Wireless
Reconfigurable Terminals and Platforms, Rome, 10-12 April, 2006.
TECHNOLOGIES FOR OPTOELECTRONICS
C. Arnone, A.C. Busacca , C. Cali’, G. Carini, A. Castiglia
M. Cerchi, P. Cusumano, G. Lullo, M. Mosca, S.Riva Sanseverino
The scientific activity was oriented to several areas of the electrical and optical technologies.
a) PROTON EXCHANGE OPTICAL WAVEGUIDES ON SURFACE PERIODIC POLED AND
DOPED FERROELECTRIC CRYSTALS. The fast growing of optical communication systems
requires all optical networks featuring devices like all optical switches, wavelength converters, compact tunable sources. Optical parametric interactions in ferroelectric Lithium Niobate (LN) crystals
have already been exploited for the realization of nonlinear devices suitable for all optical networks.
In particular proton exchange (PE) waveguide technology together with periodic poling of ferroelectric domains of LN make available very efficient frequency doublers that rely on quasi phase
matching (QPM) between the infrared (IR) pump and the generated second harmonic field. Our
attention has been focused on the combination of PE processes with surface periodic poling of
Lithium Niobate (SPPLN). With the SPP technique only a tens of microns thick layer is poled
and, on the other hand, it is possible to achieve very small periods with respect to standard bulk
poling. In fact submicron poling has been demonstrated which is needed in some parametric interaction schemes, still unexplored due to technological limits. The SPP technique was also applied
to Lithium Tantalate, while the reverse proton exchange waveguide fabrication was applied to
Neodymium doped LN (Nd3+:LN) for laser emission. In order to get good conversion efficiencies
high optical power densities are required along the whole path of nonlinear interaction between the
input pump radiation and the generated second harmonic radiation. This is why it is convenient
to fabricate the SPPLN structures on channel waveguides that confine optical power on an area
comparable with the square of the optical wavelength and are not affected by diffraction problems
when propagating over centimeters interaction lengths. The photolithographic masks for channel
waveguide fabrication were patterned silica films that we have deposited using the Ion Plating
Plasma Assisted (IPPA) technique on the -Z face of the ferroelectric samples. This same technique
was used for micron-scale periods patterning. For sub-micrometric patterning we have turned to
patterning of photoresist masks with the Lloyd mirror, an holographic technique that can reach
hundreds of nanometer period gratings. Our experimentation allowed to developed a technologic
process to ensure full compatibility between the PE waveguide fabrication technology on surface
periodic poled regions. In particular we have reached the world record of 400 nm poling period
gratings for LN, and a period of 3.6 micron in the very first experiments on LT. Submicron periods
are indispensable for the realization of integrated optical devices based on collinear propagation
of counter-propagating waves, such as the Backward Second Harmonic Generator or the CounterPropagating Parametric Amplifier. Actually these parametric interaction schemes to date have
not been explored in LN and LT due to technological limitations of the poling process. Nd3+:LN
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channel waveguides, fabricated by the reverse proton exchange technique were successfully pumped
in either sigma and pi-polarized configurations, obtaining thresholds of 12 mW and 4.3 mW and
slope efficiencies of 0.5 The research activity has been carried out in a team with the Center for
Electronics Research in Sicily (CRES) of Monreale (PA), Italy, and for some parts with the Departamento Fisica de Materiales, Universidad Autonoma de Madrid - Spain. [1, 2, 3, 4, 5, 6, 7]
b) APPLICATIONS OF NITRIDE-BASED SEMICONDUCTORS. Intersubband transitions in
group-III nitrides are of great interest for optical devices operating at telecommunication wavelengths. We reported the observation of mid-infrared intersubband absorption (3 ?m) in nearly
lattice-matched AlInN/GaN multiple-quantum-wells. Our results demonstrate that the AlInN/GaN
system is very promising to achieve crack-free and low dislocation density structures dedicated to
intersubband devices in the telecommunications wavelength range. Moreover, simple AlGaN heterostructures grown on sapphire by molecular beam epitaxy or chemical vapour deposition were
grown in order to fabricate solar blind detectors. Photovoltaic and photoconductor MSM and
Schottky detectors were processed and investigated. High performance devices have been obtained
thanks to an optimization of the material crystalline quality and of the process. The spectral
limitations of MSM detectors were shown to be dictated by intrinsic phenomena (such as internal
photoemission) and technological process. [8, 9, 10, 11, 12, 13, 14, 15]
c) LASER DEPOSITION Thin films have been produced by the ablation of a 0.1 per cent Nd
doped YAG laser quality crystal. The laser source was a Q-switched tripled Nd:YAG laser (Quantel mod. YG78C20) providing optical pulses of 6 ns duration and energy of 100-150 mJ/pulse at a
wavelength of 355 nm. The energy density was adjusted between 5 and 50 J/square-cm, by varying
the pulse energy and the focussing lens position. The ablation processes were carried out under
high vacuum and also introducing oxygen or argon in the vacuum chamber. Suitable substrates
and related temperatures to grow Nd:YAG crystalline films are under investigation. [16]
d) CHARACTERIZATION OF MATERIALS FOR THE DETECTION OF HIGH ENERGY RADIATION. This activity has been developed in tight collaboration with the Brookhaven National
Laboratory, Upton, NY (USA). It concerned the study of structure and lattice quality of CdZnTe
crystals. Such materials have a strategic relevance for the fabrication of solid state detectors for
high energy radiation. [17, 18]
e) ORGANIC MATERIALS AND DEVICES. The research activity is mainly focused on the the
deposition of doped organic thin films by vacuum thermal co-evaporation and their use in a range
of organic devices such as organic light emitting diodes (OLEDs), solar cells, etc. The doping is
accomplished by incorporating donor or acceptor molecules in the host material. As an example,
the use of doped organic films in OLEDs greatly improves their operational charactericstics. We
also study charge carrier mobility in thin films of doped or pristine organic materials such as N, N’diphenyl-N,N’-bis(3-methylphenyl) -1,1-biphenyl-4,4’-diamine (TPD) and tris(8-hydroxyquinolato)
aluminium (Alq3) and MEH-PPV polymers. Measurements are performed by the Time of Flight
(TOF) technique in free air or under vacuum varying the experimental parameters such as laser
pulse intensity and single shot irradiation. These measurements are important for the optimization
of organic optoelectronic devices.
[1] M. Domenech, G. Lifante, E. Cantelar, F. Cuss, A. C. Busacca, A. C. Cino, S. Riva Sanseverino, ”Polarization effects on the laser operation in RPE Nd3+:LiNbO3 channel waveguides”,
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OPTOEL 2005, 4 Runion Espagnola de Optoelectronica, Elx-Elche (Alicante, Spain), 13-15 July,
2005 [2] A. Busacca, M. Cherchi, S. Riva Sanseverino; A. C. Cino, A. Parisi; G. Assanto, M.
Cichocki; F. Caccavale, D. Calleyo, A. Morbiato, ”Surface Periodic Poling in Lithium Niobate
and Lithium Tantalate”, Proc. 4th IEEE/LEOS Workshop on Fibres and Optical Passive Components, Mondello (Palermo, IT), pp. 126-130, June 22-24, 2005 [3] A. C. Busacca, A. C. Cino, M.
Ravaro, G. Assanto, F. Caccavale, A. Morbiato, and S. Riva Sanseverino, ”Nano-domains definition in congruent lithium niobate by surface periodic electric-field poling”, Proc. 12th European
Conference on Integrated Optics (ECIO’05), Grenoble (France), 6-8 April 2005 [4] A. Busacca, M.
Cherchi, S. Riva Sanseverino, A. Parisi, A. C. Cino, M. Ravaro, G. Assanto, ”Short period Lithium
Niobate poling for nonlinear three waves interactions”, Proc. European WORKSHOP Photonic
Signal Processing for Defence Applications, Roma (Italy), Paper T6, 17-18 March 2005 [5] S. Riva
Sanseverino, A. C. Busacca, A. C. Cino, G. Assanto, ”Ingegnerizzazione dei domini ferroelettrici
nel niobato di litio per applicazioni nonlineari”, Proc. El Em ’05, Scientific Week on Microwave
Engineering, Orvieto (Italy), pp. 137-140, 12-16 April 2005 [6] M. Domenech, G. Lifante and F.
Cuss, A. Parisi, A.C. Cino and S. Riva Sanseverino, ”Fabrication and characterisation of reverse
proton exchange optical waveguides in Neodymium doped lithium niobate crystals”, Materials Science Forum, Vols. 480-481, pp. 429-436, (2005) [7] A.C. Busacca, A.C. Cino, S. Riva-Sanseverino,
M. Ravaro, and G. Assanto: Silica masks for improved surface poling of lithium niobate - Electronics Letters, Vol. 41, N.2, p. 92-94 (2005). [8] J.-Y. Duboz , N. Grandjean, F. Omns, J.-L.
Reverchon, M. Mosca: Solar Blind Detectors Based on AlGaN Grown on Sapphire - Physica Status
Solidi (c), 2 (2005) 964 [invited paper]. [9] J.-Y. Duboz, N. Grandjean, F. Omns, M. Mosca, J.-L.
Reverchon: Internal Photoemission in Solar Blind AlGaN Schottky Barrier Photodiodes - Applied
Physics Letters 86, 063511 (2005). [10] S. Nicolay, M. Tchernycheva, J.-F. Carlin, L. Nevou, E.
Feltin, R. Butt, M. Mosca, F.H. Julien, N. Grandjean, M. Ilegems: Mid-infrared intersubband
absorption in lattice-matched AlInN/GaN multiple-quantum wells - Applied Physics Letters 87,
111106 (2005). [11] J.-F. Carlin, J. Dorsaz, B. Faure, M. Mosca, P. Gilet, S. Bressot, H. Larheche,
P. Bove, F. Letertre: First InGaN/GaN thin Film LED using SiCOI engineered substrate - 6th
International Conference on Nitride Semiconductors (ICNS), Bremen (Germany) - August 28thSeptember 2nd, 2005 - Meeting Workbook: p. Tu-P-050. [12] M. Mosca, S. Nicolay, J.-F. Carlin,
E. Feltin, R. Butte’, N. Grandjean, M. Ilegems: Al(In)N/GaN Heterostructures for Intersubband
Transitions - 32nd International Symposium on Compound Semiconductors (ISCS), Rust (Germany) - September 18th-22th, 2005 - Meeting Workbook. [13] S. Nicolay, J.-F. Carlin, E. Feltin,
M. Mosca, R. Butte’, N. Grandjean, M. Ilegems: AlInN Based Quantum Wells for Intersubband
Transitions - 11th European Workshop on Metal-Organic Vapor Phase Epitaxy (EW-MOVPE),
Lausanne (Switzerland) - June 5th-8th, 2005 - Meeting Workbook: p. 391. [14] S. Nicolay, J.-F.
Carlin, E. Feltin, R. Butt, M. Mosca, N. Grandjean, M. Ilegems, M. Tchernycheva, L. Nevou, F. H.
Julien: AlInN/GaN quantum wells for intersubband transitions - 6th International Conference on
Nitride Semiconductors (ICNS), Bremen (Germany) - August 28th-September 2nd, 2005 - Meeting
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Workbook: p. Fr-OP7-1. [15] S. Nicolay, M. Mosca, J.-F. Carlin, E. Feltin, N. Grandjean, M.
Ilegems: Intersubband Transitions in Nitride Based Quantum Wells - Scientific Reports of Inst. of
Quantum Electr. and Photonics (Ecole Polytechnique Federale Lausanne) 2005, p. 90. [16] C.
Cali’ , P. Cusumano, G.C. Giaconia, G. Spallina, A. Di Lieto, M. Tonelli: Pulsed Laser Deposition
of Nd:YAG thin films - MMD Meeting , Genova - June 22th-25th, 2005 - Meeting Workbook: poster
sessions, pp. 298-299. [17] G. Carini, G. Camarda, Z. Zhong, D.P. Siddons, A.E. Bolotnikov, G.W.
Wright, B. Barber, C. Arnone, and R.B. James: ”High-energy X-ray diffraction and topography
investigation of CdZnTe”, Journal of Electronic Materials, 34, No.6, p. 804-810 (2005). [18] G.
Carini, A.E. Bolotnikov, G. Camarda, R.B.James, R. De Wames, J.K. Markunas, J.H. Dinan, J.
Zhao, S. Sivananthan, C. Arnone: ” Material quality characterization of CdZnTe substrates for
HgCdTe epitaxy”, The 2005 U.S. Workshop on the Physics and Chemistry of II-VI materials.
DESIGN OF MOS CURRENT-MODE LOGIC CIRCUITS
Giuseppe Caruso
MOS Current Mode Logic (MCML) is a logic style widely used in high-speed applications since
it can achieve high speeds while consuming less power than conventional CMOS circuits. Moreover,
it has been proved to be preferable to complementary CMOS in mixed signal environment. The
research activity has been focused on the design of MCML gates. The main result of this research
is an automated design methodology to minimize the power dissipation of a single level MCML
circuit for a given delay.
[1] G. Caruso, ”Design of MOS current mode logic gates - computing the limits of voltage swing
and bias current,” Proceedings of IEEE-ISCAS, pp. 5637-5640, Kobe, Japan, May 23-26, 2005.
POWER MANAGEMENT SYSTEMS
G. Capponi, P. Livreri, G.M. Di Blasi,V. Boscaino
The research activity regards both the study of digital control architecture for dc/dc power
conversion systems, oriented to IC implementation, and the design of a power management system
for an hybrid power supply. In past years, dc/dc power conversion systems have been realized
using very precise analogue ICs controllers with complex control technique to achieve the required
performances. Owing to analogue nature, these systems are difficult to be upgraded and modified.
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So, today, theres a growing interest on digital control thanks to its accuracy, robustness, flexibility
and high immunity to noise. In spite of these advantages, digital control produces limit cycle
effects and reduces system bandwidth, reverting back the designer to use analog control, accepting
its limitations. In order to meet both the steady-state and transient requirements taking, at
the same time, all the advantages of digital control, an innovative control technique, based on
a digital linear-non-linear control, has been designed. The linear-non-linear control loop reduces
the recovery time, limiting, at the same time, output voltage variations during transients and
cuts off the effects of limit cycle. The linear-non-linear technique has been implemented on a
four-module buck converter with interleaved technique, where current-sharing control is required
into each single module. Novel current-sensing technique has been implemented, with innovative
architecture. The research activity also regards the design of a rechargeable power supply for
portable applications, employing fuel cell. Modern portable devices require high current slew rate
and long life cycle and, moreover, its necessary to reduce the system area and cost. Actually, theres
a growing interest on fuel cells for portable applications, due to their high energy density, but, due
to their low power density, fuel cells are not the most suitable choice for supplying a pulsed load.
Usually, to meet all requirements, an hybrid power source is designed, connecting two elements:
one with high energy density, to ensure long life cycle, and one with high power density, to ensure
high dynamic performances. A digital still camera has been chosen as load device and a power
consumption model has been designed in Matlab/Simulink. A PEM fuel cell has been chosen as
high energy density component of the hybrid source and a circuital model has been designed. A
power management system has been designed for an hybrid source fuel cell/supercapacitor and
analog control techniques have been studied and implemented in order to obtain high steady state
and dynamic performances. These activities has been carried on in close cooperation with ST
Microelectronics (Catania site).
[1] V. Boscaino, G.M. Di Blasi, P. Livreri, M. Minieri, F. Marino ”A novel linear-non-linear digital
control for DC/DC converter with fast transient response” IEEE Applied Power Electronics Conference APEC’06, 19-23 March 2006. 2 G. Capponi, G.M Di Blasi,P.Livreri, F.Marino ”A new current
mode control for DC-DC converter” IEEE International Telecommunications Energy Conference
INTELEC’05 18-22 September 2005, also submitted and publishing at ACTA Press - International
Journal of Modelling and Simulation. 3G. Capponi, P. Livreri, M. Minieri, F. Marino, ”Modeling
and Simulation of new digital control for power conversion systems”, IEEE Power Electronics Specialist Conference PESC’02, 13-17 June 2002. 4 G. Capponi, P. Livreri, G.M. Di Blasi, F. Marino,
E. Cannella, ”A new analysis technique for fast transient power conversion system based on SigmaDelta modulator”, IEEE 25th International Telecommunications Energy Conference INTELEC’03,
19-23 October 2003. 5 G. Capponi, P. Livreri, G.M. Di Blasi, F. Marino, Architecture of a digital
PFM controller for IC implementation, IEEE The 9th Workshop on Computers in Power Electronics, COMPEL 2004, Urbana (Illinois - USA), 15-18 August 2004. 6 G. Capponi, P. Livreri, G.M.
Di Blasi, F. Marino, Digital Power Conversion System based on a Sigma-Delta Modulator Linear
Model, IEEE Power Systems Conference and Exposition, PSCE04, New York City (New York USA), 10-13 October 2004. 7 G. Capponi, P. Livreri, G.M. Di Blasi, F. Marino, A new model for
Sigma-Delta modulator oriented to digitally controlled DC/DC converter, submitted and publishing at ACTA Press - International Journal of Modelling and Simulation. 8G. Capponi, P.Livreri,
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G.M Di Blasi, F.Marino, M.Minieri ”Non-linear digital control for DC-DC Power Converter” Power
Electronics Technology Conference 2004 16-18 November 2004.
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DIPARTIMENTO DI INGEGNERIA DELL’INFORMAZIONE
Research topics
1) INTELLIGENT TECHNIQUES AND DEVICES FOR POWER ELECTRONICS
Alberto Bellini, Carlo Concari, Giovanni Franceschini, Emilio Lorenzani, Carla Tassoni, Andrea
Toscani, Paolo Cova
Collaborations: ASK Industries, SPAL, Lombardini motori, Analog Devices, Universitá di Padova,
Universitá di Bologna, Politecnico di Torino, University of Wisconsin - Madison (USA), Dipartimento di Ingegneria Industriale Università di Parma, POSEICO S.p.A. (Genova), CNR-IMEMMASPEC (Parma), CNR-IMM-LAMEL (Bologna), Integrated System Laboratory of the Swiss
Federal Institute of Technology (Zurich)
Other sources of funding: FIN, FIL MURST, POSEICO
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2) DESIGN OF ANALOG, ”MIXED-SIGNAL” AND RF INTEGRATED CIRCUITS
IN CMOS AND BICMOS TECHNOLOGIES
Andrea Boni, Davide Vecchi, Carlo Morandi, Giovanni Chiorboli, Roberto Menozzi, Cristiano
Azzolini, Silvia Dondi, Alessio Facen, Marco Bigi
Collaborations: AustriaMicroSystems, Univ. of Sevilla, Instituto de Microelectrnica de Sevilla
(IMSE),
Other sources of funding: convenzioni, PRIN2003
3) CHARACTERIZATION, MODELING AND RELIABILITY OF HIGH-FREQUENCY
AND HIGH-POWER DEVICES AND SYSTEMS
Giovanni Chiorboli, Paolo Cova, Nicola Delmonte, Roberto Menozzi, Giovanna Sozzi
Collaborations: CNR-IMEM Parma, M/A-COM Tyco Electronics, Istituto CNR-IMM sez.
Bologna, POSEICO SpA (Genova)
Other sources of funding: FIL MURST, PRIN 2004
4) CHARACTERIZATION, MODELING AND RELIABILITY OF SILICON DEVICES AND ADVANCED METALLIZATIONS
Paolo Ciampolini, Ilaria De Munari, Alessandro Marras
Collaborations: Istituto CNR-IMM sez. Bologna, ST–Microelectronics (Agrate, Milano), Università di Perugia–Dip. Ing. Elettronica e dell’Informazione, Università di Lecce–Dip. di Ing.
dell’Innovazione, Università di Modena e Reggio Emilia–Dip. di Scienze dell’Ingegneria, Università
di Udine, Dip. di Ingegneria Elettrica Gestionale e Meccanica, Università di Ferrara, Dip. di Ingegneria, Università di Bologna, Dip. di Informatica, Elettronica e Sistemistica, Laboratori LETI
(Grenoble, Francia)
Other sources of funding: FIL MURST
5) DESIGN AND TEST OF INTEGRATED RADIATION SENSORS FOR NUCLEAR PHYSICAL EXPERIMENTS AND MIXED SIGNAL INTEGRATED CIRCUITS
Paolo Ciampolini, Alessandro Marras, Guido Matrella, Andrea Boni, Giovanni Chiorboli, Carlo
Morandi
Collaborations: Unità GE di Perugia, INFN-PG, CERN
Other sources of funding: FIL, Progetto INFN-RAPS
6) DIGITAL ELECTRONIC SYSTEMS AND APPLICATIONS
Paolo Ciampolini, Ilaria De Munari, Guido Matrella, Andrea Ricci
Collaborations: Magneti Marelli (Torino), Wrap Spa (Fabriano, Ancona), Renesas Technology
(Milano), Laboratorio Anziani della Provincia di Parma)
Other sources of funding: Wrap Spa, Renesas Technology
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INTELLIGENT TECHNIQUES AND DEVICES FOR POWER ELECTRONICS
Alberto Bellini, Carlo Concari, Giovanni Franceschini,
Emilio Lorenzani, Carla Tassoni, Andrea Toscani
AI techniques are widely used in several fields of engineering, due to their capability to tackle
those issue where analytical models or empirical data are difficult to obtain. As for power electronics, the availability of intelligent techniques like Fuzzy Logic or Neural Networks allows to define
versatile system identification procedures useful for both diagnostics and control purposes. In this
framework, the research activity was directed to the definition of an automatic design flow for fuzzy
controllers and the associated hardware support, then a few application were analyzed in order to
apply the defined design flow. As for power electronics application signal processing techniques were
applied to the diagnosis of induction motors, and to their digital control¿Motion Control oriented
DSP were used to design novel sensorless control Strategy for AC machines, and dedicated power
stage for industrial drives, Were realized, relying on Intelligent Power Modules (IPM). Dedicated
modulation techniques based on chaos theory were also applied to the electric machines supply,
in order to reduce electromagnetic interference. As for audio, several algorithms were designed,
in order to obtain suitable dynamic model and to perform an effective compensation. Moreover,
a digital audio amplifier was designed with a hybrid combination of linear and switching output
stage. A proper power supply was realized for automotive applications. The prototypes were realized, and experiments were perfomed in commercial car relying on DSP based board in order to
validate the effectiveness of the equalization both from the objective and subjective point of view,
with measurements and listening tests.
[1] A. Bellini, G. Franceschini, C.Tassoni Monitoring of Induction Machines by Maximum Covariance Method for Frequency Tracking IEEE Transaction on Industrial Applications, Vol. 42 Issue
1 Jan.-Feb. 2006
[2] A. Affanni, A. Bellini, G. Franceschini, P. Guglielmi, C.Tassoni Battery Choice and Management
for new- generation Electric Vehicles IEEE Transaction on Industrial Electronics, Vol. 52 Issue 5
Oct. 2005
[3] A. Bellini, G. Franceschini, C.Tassoni, A. Toscani Assessment of Induction MAchines Rotor
Fault Severity by Different Approaches 32th IEEE Conference of Industrial Electronics Society
November 2005
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DESIGN OF ANALOG, ”MIXED-SIGNAL” AND RF INTEGRATED CIRCUITS
IN CMOS AND BICMOS TECHNOLOGIES
Andrea Boni, Davide Vecchi, Carlo Morandi, Giovanni Chiorboli,
Roberto Menozzi, Cristiano Azzolini, Silvia Dondi, Alessio Facen
High-speed low power A/D converters are increasingly required in telecommunications wireless
and magnetic or optical data storage equipments. A relevant project was the design of a 8-b,
2-GS/s, full-Nyquist ADC in full CMOS technology. The converter exhibits a reduced power consumption thanks to concurrent application of special techniques such as subranging, interpolation
and averaging. In particular the ADC is based on the fully differential flash architecture with
interpolation-averaging. Significant power saving is achieved by detection and rectification of the
polarity of the input signal. A calibration of the ladder mismatch and of the comparator mismatch
was also implemented [1],[2].
Another interesting activity in the field of A/D conversion concerns the design of a high-speed
(200MS/s) and high resolution (12-b) pipeline ADC in 0.35um SiGe BiCMOS technology, for
biomedical applications. The design was managed with a top-down approach, thus implementing a
high-level model of the converter in order to select the best architecture among the different choices
in terms of resolution partitioning and in order to achieve a table of specifications of the OTAs
used in the MDAC stages [3],[4].
In the pipeline A/D conversion field, a major design effort is carried-on about calibration
methodologies and high-level modeling. A novel foreground calibration agorithm was developed,
allowing time and hardware saving for the error measurement phase. Furthermore a background
shuffling calibration system, with mismatch noise cancellation (MNC) was also designed and implemented on an FPGA in order to allow the test of the errors correction algorithm. The performance
of a background calibration technique with digital cancellation of D/A converter noise, which has
been recently proposed for improving the performances of high-speed, high-resolution, pipelined
ADCs was analyzed [5],[6],[7]. A significant effort was concentrated on the high-level modeling
of pipelined A/D converters, producing a software that allows the complete characterization (bit
partitioning, OTA specifications , calibration strategy, simulation) of the converter. On the basis
of this model a design optimisation method was studied with reference to a 14-b pipelined ADC
[3],[8],[9]. The software provides also assistance in the design of the OTA, with topology selection
and first-step sizing of the transistors.
In the RF design field, the research unit was involved in the design of a tri-band multi-standard
transceiver for 5-6GHz WLANs (IEEE802.11a USA and Europe, Hiperlan-2). A completely integrated synthesizer was designed and implemented in 0.35 SiGe BiCMOS. The relatively large
tuning range required by the tri-band operation was achieved by means of a mixed analog/digital
control of the VCO. The PLL is therefore based on a dual loop control (A/D) [10]. In the same design framework the second down-conversion mixer of the receive chain was designed in 0.35-micron
BiCMOS technology. A fully differential double-balanced architecture with resistive pull-ups on
the IF outputs was adopted. The required linearity performance was obtained resorting to resistive
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emitter feedback and the ”multi-tanh” technique.
A further relevant research topic is the design of RFID tags operating in the UHF bands
(868MHz/902MHz).
[1] C. Azzolini, A. Boni, A. Facen, M. Parenti, D. Vecchi, ”Design of a 2-GS/s 8-b Self-Calibrating
ADC in 0.18m CMOS technology”, proceedings of Int. Symposium on Circuit and Systems (ISCAS), pp. 1386-1389, Kobe, Japan, May 2005. [2] C. Azzolini, A. Facen, A. Boni, D. Vecchi,
”A foreground Calibration Technique for an 8-b 2GS/s Flash ADC in 0.18-um CMOS technology”,
proceedings of IEE Advanced A/D and D/A conversion techniques and their applications (ADDA)
conference, pp. 69-84, Limerick, Ireland. [3] M. Parenti, D. Vecchi, A. Boni, G. Chiorboli,
”Modeling and design optimisation for high-resolution, high-speed pipeline ADC’s”, Measurement,
Elsevier, vol. 37, n. 4, June 2005. [4] C. Azzolini, A. Boni, P. Milanesi, D. Vecchi, ”Exploiting SiGe BiCMOS Technology in the Design of A 12-B 200Ms/s Pipeline ADC”, proceedings of
IEE Advanced A/D and D/A conversion techniques and their applications (ADDA) conference, pp.
189-194, Limerick, Ireland.
[5] G. Chiorboli, S. Dondi, C. Morandi: ”DAC calibration by weighting capacitor rotation in a
pipelined ADC”, Proc.s 3rd IASTED Int. Conference on CIRCUITS, SIGNALS AND SYSTEMS,
oct. 24-26, 2005, Marina del Rey, CA, USA, ACTA Press, P.O.Box 5124, Anaheim, CA92814-5124,
pp.31-35. [7]
[6] D. Vecchi, C. Azzolini, A. Boni, F. Chaahoub, L. Crespi, ”Design of a 14-bit, 100MS/s Pipelined
Analog-to-Digital Converter in 0.18um CMOS technology”, proceedings of IEE Advanced A/D and
D/A conversion techniques and their applications (ADDA) conference, pp. 93-98, Limerick, Ireland.
[7] D. Vecchi, C. Azzolini, A.Boni, F. Chaahoub and L.Crespi, ”100-MS/s 14-b Track-and-Hold
Amplifier in 0.18-µm CMOS” proceedings of European Solid-State Circuits Conference (ESSCIRC)
2005, pp. 259-262, Grenoble, France, September 2005.
[8] Chiorboli, C. Morandi, ”Code histogram test”, in ”Dynamic characterization of analogue to
digital converters”, D. Dallet and J. Machado da Silva Ed.s, Springer, ISBN-10 0-387-25902-3,
Kluwer Academic Publishers,2005, cap. 5, pp.105-156.
[9] G. Chioboli, C. Morandi, ”Step and transient response measurement”, ibidem, pp.243-254.
[10] G. Chiorboli, C. Morandi, ”Hysteresis measurement”, ibidem, pp.255-264.
[11] A. Boni, S. Dondi, A. Facen , ”A multistandard frequency synthesizer for 5-6 GHz WLAN
transceivers in 0.35m BiCMOS technology”, proceedings of IEEE Radio and Wireless Symposium,
pp. 455-458, San Diego, CA, January 2006.
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PARMA
CHARACTERIZATION, MODELING AND RELIABILITY OF
HIGH-FREQUENCY AND HIGH-POWER DEVICES AND SYSTEMS
Giovanni Chiorboli, Paolo Cova, Nicola Delmonte, Roberto Menozzi, Giovanna Sozzi
A) PHEMT Breakdown - A temperature-dependent on-state breakdown investigation has been
experimentally carried out on commercial PHEMTs, following the work carried out in previous years
on off-state breakdown characterization and reliability evaluation. The study of the temperature
dependence of the on-state breakdown voltage and leakage current allowed to identify channel
impact ionization as the primary source of the gate reverse current determining the breakdown.
The weak temperature dependence of the on-state breakdown voltage observed in our experiments
is due to the composition of the strained InGaAs channel being close to the transition point between
negative (GaAs) and positive (InAs) temperature coefficient of the impact-ionization rate.
B) Thermal characterization and modeling of high-frequency devices - New methods were developed and tested for the extraction of the thermal resistance of HBT and RF LDMOS transistors,
in cooperation with M/A-COM Tyco Electronics (Lowell, MA). The new techniques allow easy DC
measurement of the device thermal resistance, a key parameter for both large-signal modeling and
reliability estimation, and were tested on a number of HBTs and LDMOS transistors over a wide
range of periphery values. Numerical modeling of self-heating was also carried out in 2D and 3D
on GaAs-based Heterostructure FETs as well as HBTs.
C) Modeling of high-power devices and systems - A first field of activity, started in 2003, in
cooperation with POSEICO SpA, is focused on the thermal modelling of power devices. We developed a PC software tool, based on lumped-parameter models of the packaged devices, which
allows the user to design the optimum device-package-heat-sink configuration for any power cycle
that the specific application may impose. We also studied innovative silicon power resistors, mainly
focusing on the thermo-electrical simulation of the device. A second line of activity, again in cooperation with POSEICO, is the design of high-power diodes for welders. The devices are packaged
in an ultra-slim flat package, which allows very high heat sinking capability and current rating.
We developed a thermo-electrical model of the device that will be used both for the validation of
simpler lumped-element thermal models and the evaluation of new design solutions. The third line
of action is a cooperation with the Universities of Milano, Padova and Cassino, in the framework of
a PRIN 2003 national project, aimed at the development of an hybrid DC-DC resonant converter
for server-router applications. In particular, this group is involved in the thermo-mechanical study
of the system, by means of FE simulations and thermal measurements.
D) High-frequency characterization of dielectric layers - As a part of the European COST 528
project a lithography process has been developed for the fabrication of ceramics thin film test structures for dielectric spectroscopy at microwave frequencies. We also set-up a measurement bench,
based on a Vector Network Analyzer and coplanar probe station, for the microwave characterization of dielectric layers, as well as modeling tools for extracting the relevant dielectric parameters.
In cooperation with IMEM/CNR (Parma, Italy), Metal-Insulator-Metal test structures have been
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deposited to study the high-frequency dielectric properties of 70 nm-thick Strontium Bismuth Tantalate (SBT) film grown with a metal-organic deposition technique. Preliminary results show that
the SBT film is, if compared with others ferroelectric materials, not particularly attractive for the
use in analog microwave circuits (e.g. resonators and filters), because of low dielectric constant and
tuning range.
A) [1] P. Cova, N. Delmonte, R. Menozzi, “On state breakdown in PHEMTs and its temperature
dependence,” Microelectronics Reliability, vol. 45, pp. 1605-1610, 2005. B) [2] R. Menozzi, J.
Barrett, P. Ersland, A. Kingswood, “New methods for easy DC extraction of the thermal resistance
microwave bipolar and FET devices,” Proc. 2005 Workshop on Compound Semiconductor Devices
and Integrated Circuits (WOCSDICE 2005), Cardiff, UK, pp. 89-91, May 2005, ISBN 0863415164.
[3] R. Menozzi, A. C. Kingswood, “A new technique to measure the thermal resistance of LDMOS
transistors,” IEEE Trans. Device and Materials reliability, vol. 5, pp. 515-521, 2005.
[4] R. Menozzi, J. Barrett, and P. Ersland, “A new method to extract HBT thermal resistance
and its temperature and power dependence,” IEEE Trans. Device and Materials reliability, vol. 5,
pp. 595-601, 2005. C) [5] P. Cova, R. Menozzi, M. Portesine, M. Bianconi, E. Gombia, R. Mosca,
“Experimental and numerical study of H+ irradiated p-i-n diodes for snubberless applications,”
Solid-State Electronics, vol. 49, pp. 183-191, 2005.
[6] P. Cova, G. Sozzi, R. Menozzi, M. Portesine, P. Pampili, P. E. Zani, “A new silicon resistor
technology for very high power snubbers,” Proc. 11th European Conf. on Power Electronics and
Applications (EPE05), Dresden, Germany, 11-14 Sept. 2005, paper N. 0870, ISBN 9075815085.
[7] M. Silvestri, P. Cova, ”Reducing motion laws harmonic content: implementation and experimental results”,Proc. IADAT International Conference on Automation, Control and Instrumentation,
pp. 21-25, Bilbao (Spagna), 2-4 febbraio 2005. D) [8] N. Delmonte, B. E. Watts, L. Rosa, G.
Chiorboli, P. Cova, R. Menozzi, “Test pattern for microwave dielectric properties of SrBi2Ta2O9,”
Proc. 2005 PhD Research in Microelectronics and Electronics Conf., Lausanne, Switzerland, July
2005, ISBN 0780393457.
[9] N. Delmonte, B. Watts, F. Leccabue, P. Cova, G. Chiorboli, ”A study of the high frequency
dielectric properties of ferroelectrics”, III International Materiais Symposium, Aveiro (Portogallo),
20-23 marzo 2005.
286
PARMA
CHARACTERIZATION, MODELING AND RELIABILITY OF SILICON
DEVICES AND ADVANCED METALLIZATIONS
Paolo Ciampolini, Ilaria De Munari, Alessandro Marras
Electromigration phenomena in metallic lines have been studied by using a biased resistor
network model. The void formation induced by the electron wind has been simulated by a stochastic
process of resistor breaking, while the growth of mechanical stress inside the line has been described
by an antagonist process of recovery of the broken resistor. The model accounts for the existence
of temperature gradients due to current crowding and Joule heating. Alloying effects are also
accounted for. The predictions of the model are in excellent agreement with the experiments and
in particular with the degradation towards electrical break-down of stressed Al-Cu thin metallic
lines. The dependence of the TTFs on the length and width of the line have been also well
reproduced.
Gate currents are becoming a major concern for ULSI circuit designers. A standard circuit
design flow that takes into account such effects is needed in order to take advantage from nanometersized devices performance. Some suggestions on how to approach permeable-gate-device circuit
simulation, focusing on gate-current-related effects on circuit performance, have been elaborated.
A mixed-mode approach (using both physical and circuit simulations) has been used to evaluate
functional and performance indices of standard CMOS circuit depending on actual oxide thickness.
An extensive characterization of gate permeable devices provided by LETI laboratories (Grenoble,
France) is being performed, in order to evaluate both Direct Tunneling and Soft Breakdown impact
on device performance. An accurate physical model of such effects has been developed, calibrated
on actual measurements.
[1] C. Pennetta, E. Alfinito, L. Reggiani, F. Fantini, I. DeMunari, and A. Scorzoni, ”Biased resistor
network model for electromigration failure and related phenomena in metallic lines”, Phys. Rev.
B 70, 174305 (2004)
[2] Alessandro Marras, Ilaria De Munari, Davide Vescovi and Paolo Ciampolini, ”Performance
Evaluation of Ultrathin Gate-oxide CMOS Circuits”, Solid-State Electronics, vol. 48, iss. 4, pp.551559, 2004.
[3] Alessandro Marras, Ilaria De Munari and Paolo Ciampolini, ”Impact of gate-leakage currents
on CMOS circuit performance”, 24th Conference on Microelectronics (MIEL 2004), Nis (Serbia
and Montenegro), 16-19/05/2004.
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DESIGN AND TEST OF INTEGRATED RADIATION SENSORS FOR NUCLEAR
PHYSICAL EXPERIMENTS AND MIXED SIGNAL INTEGRATED CIRCUITS
Paolo Ciampolini, Alessandro Marras, Guido Matrella
This project aims at developing innovative radiation detectors, based on an active pixel architecture (Active Pixel Sensors - APS) in a standard CMOS technology. APS systems are used
extensively for low-cost visible light detectors applications (as in digital photo and video cameras).
Fabrication technologies, however, are often aimed at the optimisation of charge collection properties (high substrate resistivity, high bias voltages), which makes it difficult to integrate on the same
chip efficient electronic circuits (useful for signal processing and conditioning). In this activity,
instead, design and realization of radiation sensors is considered, fabricated by means of a deepsubmicron, standard CMOS technology. This would allow for the integration on the same chip
of transducers and high-performance and large integration scale circuits. The intrinsically worse
charge collection properties can be compensated by adopting active read-out and amplification circuitry. Manufacturing cost reduction and increasing radiation hardness (due to gate oxide thinning
imposed by scaling) are additional advantages of such an approach. The potentiality of integrating
single-chip complex system is exploited, implementing flexible and re-usable architectural blocks,
which could be used to assemble system oriented at different fields. A demo chip has been designed
and fabricated, optimized for high energy physics (HEP) applications. Other possible applications
include radiation detection for medical radiotherapy and microradiography.
[1] Daniele Passeri, Pisana Placidi, Leonardo Verducci, Paolo Ciampolini, Guido Matrella, Alessandro Marras, Gian Mario Bilei, ”Design and test of innovative CMOS pixel detectors”, Xth Vienna
Conference on Instrumentation (VCI 2004), Vienna (Austria), 16-21/02/2004
[2] Daniele Passeri, Pisana Placidi, Leonardo Verducci, Paolo Ciampolini, Guido Matrella, Alessandro Marras, Gian Mario Bilei, ”RAPS: an Innovative Active Pixel for Particle Detection Integrated
in CMOS Technology”, Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment, vol. 518, pp.482-484, Febr. 2004.
[3] Daniele Passeri, Pisana Placidi, Leonardo Verducci, Paolo Ciampolini, Guido Matrella, Alessandro Marras, Gian Mario Bilei, ”Design, fabrication and test of CMOS active-pixel radiation sensors”, IEEE Transactions on Nuclear Science, vol. 51, Iss. 3, pp. 1144-1149, June 2004.
[4] Alessandro Marras, Guido Matrella, Pisana Placidi, Marco Petasecca, Daniele Passeri, Paolo
Ciampolini, Gian Mario Bilei, Leonello Servoli: ”Advances in Radiation Active Pixel Sensors
(RAPS) Architectures”, Nuclear Science Symposium, Roma (Italia), 16-22/10/2004
[5] Daniele Passeri, Pisana Placidi, Leonardo Verducci, Paolo Ciampolini, Guido Matrella, Alessandro Marras, Gian Mario Bilei, ”Design and test of innovative CMOS pixel detectors”, Nuclear
Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors
and Associated Equipment, vol. 535, pp.421-423, Dec. 2004.
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DIGITAL ELECTRONIC SYSTEMS AND APPLICATIONS
Paolo Ciampolini, Ilaria De Munari, Guido Matrella, Andrea Ricci
Digital systems based on microcontrollers, microprocessors, DSP, programmable logics are developed in this context. Among the applications it is worth mentioning control systems for automotive applications and FPGA embedded systems. A laboratory dedicated to the study of home
and building automation is operative. Research in this field is carried out in collaboration with
industries as well as public and social agencies, with emphasys on assistive technologies for elder
and disabled people.
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PAVIA
Dip. di Elettronica, Dip. di Informatica e Sistemistica, Dip. di Ingegneria Elettrica
Research topics
1) INTERFEROMETRY
S. Donati, G. Giuliani, M. Norgia, E. Randone
Collaborations: Ecole des Mines de Nantes - F
2) DYNAMIC BEHAVIOUR OF FABRY-PEROT AND RING SEMICONDUCTOR
LASERS
S. Donati, G. Giuliani, M. Passerini, R. Miglierina, E. Randone
Collaborations: Tilab Torino, University of Glasgow - UK, Technische Universit Darmstadt - D
3) OPTICAL TECHNIQUES FOR MICROMACHINED DEVICES
V. Annovazzi Lodi, M. Benedetti, S. Merlo, M. Norgia
Collaborations: ST Microelectronics - Milano, Università di Pisa, Dipartimento di Meccanica Strutturale Università Pavia
4) OPTICAL TRANSMISSION
V. Annovazzi Lodi, S. Merlo, M. Norgia, M. Benedetti, B. Provinzano
Collaborations: European Network ’OCCULT’, Glaxo SpA
5) CMOS TRANSCEIVERS AND BUILDING BLOCKS FOR RF APPLICATIONS
M. Brandolini, R. Castello, G. Cusmai, A. Liscidini, M. Pisati, P. Rossi,
F. Svelto, P. Uggetti, C. Ghezzi.
Collaborations: DEIS Bologna, Politecnico di Milano, Università di Lecce, Università di Modena,
National Semiconductors, STMicroelectronics
Other sources of funding: National Semiconductors, STMicroelectronics, MIUR-FIRB 2002
6) CIRCUITS AND SYSTEMS TECHNIQUES FOR CMOS RF TRANSCEIVERS
AND A/D CONVERTERS
I. Bietti, G. Albasini, E. Sacchi, E. Temporiti, R. Cannizzaro, E. Depaoli, M. Bettini, R. Brama,
G. Bollati, M. Introini, G. Cesura, M. Fedeli, A. Panigada, A. Bosi, W. Audoglio, E. Zuffetti, R.
Massolini, M. Rossi, R. Castello
Other sources of funding: STMicroelectronics, MIUR-FIRB 2002
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7) DESIGN OF INTEGRATED CIRCUITS FOR SIGNAL PROCESSING
F. Borghetti, G. Boselli, A. Cabrini, V. Ferragina, N. Ghittori, L. Gobbi, V. Liberali, P. Malcovati,
F. Maloberti, A. Rossini, G. Torelli, G. Trucco, A. Vigna
Collaborations: ACCO Microelettronica, Austriamicrosystems, LABEN, National Semiconductors,
Siemens, STMicroelectronics, University of Extremadura, University of Guelph, University of Texas
at Dallas
Other sources of funding: ACCO Microelettronica, Austriamicrosystems, LABEN, National Semiconductors, STMicroelectronics, University of Pavia (FAR)
8) DESIGN OF A/D AND D/A CONVERTERS
F. Boi, F. Borghetti, C. Della Fiore, A. Fornasari, I. Galdi, N. Ghittori, P. Malcovati, F. Maloberti,
G. Torelli, A. Vigna
Collaborations: National Semiconductors, Oersted-DTU, Siemens, STMicroelectronics, Texas Instruments, University of Extremadura, University of Texas at Dallas
Other sources of funding: National Semiconductors, STMicroelectronics, University of Pavia (FAR)
9) DESIGN OF INTERFACE CIRCUITS FOR SENSORS
F. Borghetti, V. Ferragina, M. Grassi, P. Malcovati, F. Maloberti, A. Rossini
Collaborations: CNR-IMM Lecce, ESA, ETH Zurich, LABEN, Polytechnic of Milan, University of
Rome II
Other sources of funding: CNR, LABEN, MIUR, University of Pavia (FAR)
10) NONVOLATILE MEMORIES
D. Baderna, C. Boffino, E. Bonizzoni, A. Cabrini, L. Gobbi, A. Fantini, F. Maloberti, C. Resta, A.
Rossini, G. Torelli, D. Zella
Other sources of funding: STMicroelectronics, University of Pavia (FAR)
11) CMOS MONOLITHIC ACTIVE PIXEL SENSORS FOR CHARGED PARTICLE
TRACKING APPLICATIONS
C. Andreoli, M. Manghisoni, E. Pozzati, L. Ratti, V. Re, V. Speziali, G. Traversi
Collaborations: Università di Bergamo, INFN sez. di Pavia, Università di Pisa e Scuola Normale
di Pisa, Università di Trento, Istituto per la Ricerca Scientifica e Tecnologica di Trento, Università
di Trieste, Università di Torino, Università di Bologna, Politecnico di Milano, INFN sez. di Milano,
INFN sez. di Ferrara, INFN sez. di Roma III
12) CHARACTERIZATION OF DEEP SUBMICRON CMOS TECHNOLOGIES
C. Andreoli, E. Baldi, M. Manghisoni, E. Oberti, L. Ratti, V. Re, V. Speziali, G. Traversi
Collaborations: Università di Bergamo, STMicroelectronics, INFN sez. di Pavia
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13) DEVELOPMENT OF A DETECTOR COMPATIBLE MONOLITHIC
TECHNOLOGY FOR FRONT-END ELECTRONICS INTEGRATION ON
HIGH-RESISTIVITY SILICON
E. Baldi, M. Manghisoni, L. Ratti, V. Re, V. Speziali, G. Traversi
Collaborations: Università di Bergamo, Università di Pisa e Scuola Normale di Pisa, Università di
Trento, Istituto per la Ricerca Scientifica e Tecnologica di Trento, Università di Trieste, Università
di Modena
14) LOW-NOISE, MIXED-SIGNAL CMOS READOUT CHIPS FOR THE BABAR
AND THE BTEV SILICON STRIP DETECTORS
M. Manghisoni, E. Pozzati, L. Ratti, V. Re, V. Speziali, G. Traversi
Collaborations: Università di Bergamo, Fermi National Accelerator Laboratory, University of Clifornia at Santa Cruz, INFN sez. di Pavia
15) CHARACTERIZATION OF A SILICON ON INSULATOR BICMOS TECHNOLOGY FOR RADIATION TOLERANT APPLICATIONS
M. Manghisoni, E. Oberti, L. Ratti, V. Re, V. Speziali, G. Traversi
Collaborations: Università di Bergamo, STMicroelectronics, INFN sez. di Pavia
16) NOISE IN CIRCUITS AND SYSTEMS
G. Martini, V. Svelto
Other sources of funding: University of Pavia (FAR)
17) STUDY OF THE POSTURE OF A SUBJECT SIT ON OFFICE CHAIRS
G. M. BERTOLOTTI, R. GANDOLFI, R. LOMBARDI, M. TESTA, M. DE PAU
18) ARTIFICIAL TUFT FOR FOOTBALL PITCHES: BIOMECHANIC STUDIES
G.M. BERTOLOTTI, E. CASTELLINI, R. GANDOLFI, R. LOMBARDI, M. TESTA
19) FPGA BASED ACCELERATORS FOR INTENSIVE COMPUTING APPLICATIONS
G. DANESE, M. GIACHERO, F. LEPORATI, N. NAZZICARI, A. SARTORI
20) DISCRETE AND INTEGRATED POWER ELECTRONICS SYSTEMS
E. Dallago, G. Sassone, G. Venchi
Collaborations: ST Microelectronics, International Rectifier Co. Italia, Fondazione CNAO
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21) MAGNETIC SENSORS AND MICROSENSORS
E. Dallago, P. Malcovati, M. Marchesi, G. Venchi, F. Borghetti, A. Baschirotto
Collaborations: ST Microelectronics
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INTERFEROMETRY
G. Giuliani, S. Donati, M. Norgia, M. Passerini, E. Randone
Feedback of lightwave from a remote reflector into the laser cavity has been demonstrated in our
laboratory since 1977, and susequently developed as an original method to perform interferometric
measurements [1]. A He-Ne laser was used in the early implementations of the feedback interferometer, while more compact, reliable and rugged laser diode sources are now employed. Feedback
interferometry (also known as self-mixing interferometry) is attractive because it performs subwavelength resolution by a very simple optical configuration, since the beam is inherently self-aligned
and in most cases no optical elements are required but a collimating objective. A cooperation has
been carried out with Ecole des Mines de Nantes, and other academic and industrial partners, and
several prototypes of interferometers have been developed as prototypes for industrial applications,
based on the injection modulation. This activity has received funds from the European Community
(Brite-Euram Selmix
project). The research has produced a laser vibrometer performing a sensi√
tivity of 50 pm/ Hz and a measuring bandwidth of 70 kHz. A dynamic range of 300 micrometer
has been obtained by implementing a feedback loop acting on the laser current supply to lock the
interferometer to half fringe. Last, feedback interferometry has proven to be a useful tool for the
characterization of MEMS, as explained in another section.
[1] G. Giuliani S. Donati, ”Laser Interferometry”, in: ”Unlocking Dynamical Diversity - Optical Feedback Effects on Semiconductor Lasers”, ed by A.Shore and D.Kane, J.Wiley and Sons,
Chichester (2005), pp.217-255.
[2] S.Donati: ”Photomultipliers”, in: ”Encyclopedia of Biomedical Engineering”, edited by
C.Craig, J.Wiley and Sons, Chichester (2005), pp.1043-1055.
[3] M. Norgia, G. Giuliani, C. Svelto, S. Donati, ”Vibrometria laser differenziale a retroiniezione”,
Atti della Riunione Annuale GMEE, Palermo, 5-8 settembre 2005, pp. 312-317, relazione ad invito.
DYNAMIC BEHAVIOUR OF FABRY-PEROT AND RING SEMICONDUCTOR
LASERS
S. Donati, G. Giuliani, M. Passerini, R. Miglierina, E. Randone
In recent years, semiconductor lasers have been studied in their dynamical behaviour to unveil
new modes of operation as well as to understand more basic phenomena underpinned in this type of
optical source. In particular, we have studied the dynamical behaviour of mode-locked laser, either
operating in a linear, open-mirror, Fabry-Perot type cavity, or in the more innovative ring-laser
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cavity. Both types of lasers are the building block for optical generators providing fast pulses at
high repetition frequency, which can be used as the source to stimulate electro-optical circuits as
well as the input for photomixing in an ultrafast photodiode. We have operated in connection
with University of Glasgow to fabricate several specimen of laser diodes working in the normal
mode-locking regime, promoted by a saturable absorber placed next to one mirror, or in the more
innovative regime of colliding-piulse mode-locking, where the absorber is placed midway between
the mirrors, so as to trigger the coincidence of pulses coming from opposite directions - a feature
that doubles the effective frequency supplied by the device geometry. Another topic of interest
has been the study and experimental characterization of laser diode enhancement factor or alfafactor, a parameter affecting both the linewidth and hence the spectral purity of the oscillation,
but also important in the regime of modulation and locking between two coupled laser sources.
We have devised a new method, very easy to implement, for the measurement of alfa-factor. The
method is based on the properties of the amplitude modulation waveform that is observed when
the laser is subjected to a moderate-to-middle level of optical feedback. Third, we have measured
the linewidth and cross-correlation properties of large-radius semiconductor ring-lasers (fabricated
in GaAlAs/GaAs by the University of Glasgow) that can operate either in a bidirectional or a
unidirectional regime. The ring laser structure is attractive for its bistable directional operation,
that can be exploited for all-optical switching applications.
[1] G. Giuliani, R. Miglierina, M. Sorel, A. Scirè, ”Linewidth, auto-correlation, and cross-correlation
measurements of counterpropagating modes in GaAs/AlGaAs semiconductor ring lasers”, IEEE
Journal of Selected Topics in Quantum Electronics, vol. 11, n. 5, pp. 1187-1192, 2005.
[2] M. Passerini, G. Giuliani, M. Sorel, ”Effect of Optical Feedback on 60-GHz Colliding-Pulse
Semiconductor Mode-Locked Lasers”, IEEE Photonics Technology Letters, vol. 17, n. 5, pp.
965-965, 2005.
[3] G. Giuliani, S. Donati, W. Elsasser, ”Measurement of linewidth enhancement factor variations
in external cavity semiconductor lasers”, Proceedings of European Quantum Electronics Conference
2005, Munich, 12-17 June 2005, pp. 13.
[4] G. Giuliani, S. Donati, W. Elsasser, ”Investigation of linewidth enhancement factor variations
in external cavity and Fabry-Perot semiconductor lasers”, Proceedings of: Conference on Lasers
and Electro-Optics 2005, Volume 2, Baltimore, 22-27 May 2005, pp. 1014-1016.
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OPTICAL TECHNIQUES FOR MICROMACHINED DEVICES
V. Annovazzi Lodi, M. Benedetti, S. Merlo, M. Norgia
The research activity on MEMS (Micro-Electro-Mechanical-System) and MOEMS (Micro-OptoElectro-Mechanical-System) has been continued also during 2005, in collaboration with ST Microelectronics (STM), Milan, Italy, and Università di Pisa. In the framework of the MIUR-FIRB
MITE-TIV project, we have performed characterization measurements on the micromachined biaxial accelerometers fabricated by STM by means of diode laser feedback interferometry. This
optical method, based on a compact and flexible configuration, performs a direct monitoring of the
mass displacement in the horizontal plane. Following the research activity on MOEMS that was
carried on in the framework of a PRIN 2002,we have tested new optical microstructures, fabricated
using the planar, silicon micromachining technology, developed by STM for microsensors. These
microstructures, called Venetian blind micromirrors, consist in a variable blazed grating where the
reflecting sections can be tilted with respect to the plane of the substrate, by means of electrostatic
actuation. We have been involved, in particular, in the design and assembling of optical measuring
setups, for characterizing the static and dynamic behavior of Venetian blind reflective microstructures with double electrodes. A laser diode feedback interferometer, with external path in single
mode optical fiber, has been efficiently applied for dynamic and quasi-static measurements, when
high spatial resolution is required. Analyses of the diffraction patterns have been also performed.
In 2005, we have started new activities related to optical characterization measurements of one dimensional, vertical photonic crystals, fabricated by the Università di Pisa by photoelectrochemical
etching of silicon. Photonic band gaps, centered at a wavelength of 1550 nm, have been exeprimentally detected, thus demonstrating the potentiality of these materials as building blocks for passive
components, to be used in optical communication networks.
[1] S. Merlo, V. Annovazzi Lodi, M. Benedetti, B. Braghini, M. Norgia, Caratterizzazione di
microspecchi in silicio per commutazione ottica, Atti de Fotonica 2005-IX Convegno sulle Tecniche
Fotoniche nelle Telecomunicazioni, Trani, 31 maggio-2 giugno 2005, pp.177-180.
OPTICAL TRANSMISSION
V. Annovazzi Lodi, S. Merlo, M. Norgia, M. Benedetti, B. Provinzano
The activity of our research group on optical transmission includes several theoretical and experimental topics, such as optical amplification, noise in optical sources and amplifiers, all-fiber
passive components, MOEMS passive componente (see previous Section), optical chaotic cryptography and transmission via diffused radiation. Injection phenomena and chaos in semiconductor
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lasers is a research topic we started years ago, by considering the case of two coupled lasers, where
the power exchange is known to lead to phase locking. At very low levels of coupling, we had found
and described, the so-called injection modulation effects. At higher levels of coupling, by using the
Lang-Kobayashi rate equations to model the laser diode, we have been able to study the complete
evolution from the first locking region to bifurcation, multi-periodicity and chaotic regime. However, not only is the chaotic behaviour interesting for a better understanding of the source dynamic
properties, but it also leads to new potential applications. Among them, we are presently working
on secure transmission, and we have devised different schemes for cryptography of optical signals
using chaos. Basically, at the transmitter a master chaotic generator hides the signal waveform in
chaos, so that it cannot be recovered by standard methods, either in time or frequency domain. At
the receiver a slave system, synchronized to the master, is able to draw out the useful signal from
the otherwise unrecognizable waveform. This approach has been applied not only to mutual injecting lasers but also to a laser driven to chaos by back-reflection from an external mirror. In the last
year, experimental results on both chaos generation and chaos synchronization have been obtained,
using DFB lasers in a fiberoptics setup. It has been demonstrated that chaos can efficiently mask
a signal in the GHz range, and that robust synchronization, and signal extraction, can be achieved
by using a matched laser couple. On the other hand, signal decoding cannot be performed by a
laser with different parameters, which demonstrates the security of the approach. Both chaotic
masking and CSK (Chaotic Shift Keying) cryptographic transmission have been studied experimentally. This research, carried on in cooperation with a european network of universities and
research centers, has been funded by the European Community on the 5th Framework Programme
(Project OCCULT), and has lead to the construction of different demonstrators for transmission in
the GHz range of analog and digital signals, both in baseband and on a subcarrier. Transmission
of digital signals on a MAN located in Athens has been recently demonstrated by the consortium.
Transmission via diffused radiation has been studied in our research group for more than 20 years,
mainly for biological applications. In 1988-1995 different telemetry systems had been delivered to
Istituto Mario Negri, Milan, for polarographic measurements of catecholammines in the rat brain.
More recently, this research topic has been continued in cooperation with Glaxo-Wellcome SpA,
and a new more compact system has been developed, using today’s miniaturized components for
surface mounting. While in the earlier version a two-way system had been used to connect the
rat to the measuring instrument, in the new version all the electronic circuitry for stimulation and
sensing has been included in a transmitter on the rat. The receiver is then connected to a personal
computer for processing and displaying the measurement results. This solution greatly simplifies
previously encountered problems, such as channel cross-talk and damaging of the electrodes implanted in the brain because of occasional disturbances or fading of the channel (now dropped)
carrying the stimulation waveform. Finally, our activity on MOEMS for optical switching has been
described in the previous section.
[1] A. Argiris, D. Syvridis, L. Larger, Valerio Annovazzi Lodi, P. Colet, I. Fisher, J. Garcia-Ojalvo,
C. R. Mirasso, L. Pesquera, K.A. Shore, ”Chaos-Based Communicatins at High Bit Rates Using
Commercial Fibre-Optic Links”, Nature, Vol. 438/17, 17 Nov. 2005, pp.343-346.
[2] V. Annovazzi Lodi, M. Benedetti, S. Merlo, M. Norgia, B. Provinzano, ”Optical Chaos Masking
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of Video Signals”, IEEE Photonics Technology Letters, Vol.17, N.9, September 2005, pp.1995-1997.
[3] V. Annovazzi Lodi, S. Merlo, M. Benedetti, B. Provinzano, M. Norgia, ”Crittografia ottica
caotica”, Atti de Fotonica 2005-IX Convegno sulle Tecniche Fotoniche nelle Telecomunicazioni,
Trani, 31 maggio-2 giugno 2005, pp.73-78 (relazione ad invito).
[4] V. Annovazzi-Lodi, M. Benedetti, S. Merlo, M. Norgia, B. Provinzano, ”Trasmissione di messaggi con crittografia ottica caotica”, presentato alla Riunione annuale del Gruppo Elettronica,
Giardini Naxos (ME), 30 Giugno-2 Luglio 2005.
[5] M. Norgia, V. Annovazzi Lodi, C. Svelto, F. Crespi, ”Misure Voltammetriche di Sostanze
Neurochimiche”, Atti XXII Congresso Nazionale GMEE, 5-8 settembre 2005, Palermo, pp. 57-58.
CMOS TRANSCEIVERS AND BUILDING BLOCKS FOR RF APPLICATIONS
M. Brandolini, R. Castello, G. Cusmai, A. Liscidini, M. Pisati, P. Rossi
F. Svelto, P. Uggetti, C. Ghezzi.
During 2005, the group has continued to be involved in the National project FIRB ”Enabling Technologies for Reconfigurable Terminals”. The aim of the project is the realization of
a transceiver, able to process the signals belonging to several different standards: GSM, DCS-1800,
UMTS, IEEE 802.11 a, b and g, and Blue-Tooth. In this framework, experiments on realized protopypes have been carried on during the year. In particular, a study of Power Amplifiers reliability
has been carried on and a multistandard receiver front end for GSM, UMTS and WLAN has been
realized. Furthermore, in cooperation with National Semiconductors, the RF front end for an UWB
reciver has been relized. In this section the key ideas for each realized circuit are provided and the
results of the characterization are reported.
Power Amplifiers Reliability
The targets in the design of CMOS Radio-Frequency transceivers for wireless application is the
highest integration level, with a low power consumption, despite reliability issues of conventional
submicron MOSFETs, due to high RF voltage and current peaks. MOS reliability in RF conditions
has been only marginally addressed in the literature, although more and more important in deepsubmicron solutions. Mostly, MOS RF performance degradation due to hot carrier stress has been
studied, in some case taking into account also their effects on RF circuit performances. Despite
large peak voltages and currents, no researchs have focused specifically on oxide reliability under
RF stress, while only a few analyzed oxide breakdown effects together with hot carrier ones. In this
scenario, a class-E Power Amplifier was designed and tested to investigates gate-oxide breakdown
under RF stress.The results confirmed that maximum RF voltage peaks for reliable operation are
much larger than usual DC levels, and that the physical mechanism of oxide degradation is triggered
by the rms value of oxide field, and not by its maximum as usually believed. This finding do have
a tremendous impact on RF circuit designs, especially in MOSFET scaling perspectives.
Low Power RF Front-End Receivers
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In the never-ending quest for vanishing power consumption in battery-powered radio ICs, a
favored technique is current reuse across different functional blocks. A popular example is cascoding
the Gilbert mixer on top of the input stage of the LNA in a receiver front-end, while less frequent is
stacking VCO and mixer. A further development takes advantage of the fact that a Gilbert mixer
and a differential oscillator resemble very closely, since in both cases the differential-pair transistors
behave like switches. As it happens, mixer and VCO can be merged into a single block, referred to
as the self-oscillating mixer (SOM). During 2005 a new prototype of GPS receiver was developed
merging LNA-mixer and VCO sharing the same bias current in a single stage reducing significantly
the total power consumption.
The quadrature RF front-end receiver was realized for GPS application. The front-end is made
of two cross-coupled LMV cells generating the quadrature paths, together with two based band
output buffers and a PLL used to lock the frequency of the oscillator. The current signal at
the output of the mixers flows into a low-frequency virtual ground, realized with a super-cascode
structure, and is finally collected as a voltage at the output of the buffers. The total power
consumption is below 6mW exluding PLL (not optimized for this applicaition). The gain obtained
is 36 dB. The noise figure integrated over the IF band (3MHz to 5MHz) is 4.8dB. The IIP3
distortion is 19dBm, while the 1dB-compression point is 31dBm. The VCO phase noise, measured
at the output of the front end, is -104dBc/Hz at 1MHz offset frequency; the phase error between
the I and Q paths is lower than 5 degrees, good enough to avoid a deterioration of the overall noise
figure.
The dynamic range, required by wireless cell-phone terminals, makes the design of analog
circuits at the supply voltage available in deep submicron CMOS technologies so challenging that
researchers are investigating alternative methods to process the received signal. On the other hand,
several analog techniques, at RF in particular, have emerged in the recent past, improving both
linearity and noise performances of different building blocks, due to an in-depth understanding of
the underlying physical process. In this research a direct-conversion fully integrated RF front-end
was designed for GSM, using a common mode feedback loop to obtain a better linearity. Realized
in 90 nm CMOS, the chip operates at a supply voltage compatible with the 45 nm node and
demonstrates the following main performances: 3.5 dB NF integrated between 1 kHz and 100 kHz,
15 kHz 1/f noise corner, 51dBm minimum IIP2, at a supply voltage as low as 750 mV.
Ultra-Wide-Band Receivers
In 2002, the Federal Communications Committee (FCC) defined as Ultra-Wide-Band (UWB)
any signal occupying more than 500MHz frequency and having an average power spectral density
limit of -41.3 dBm/MHz, in the 3.1-10.6GHz range. The unlicensed band is intended to enable
several applications: ground penetrating radars, imaging and surveillance systems, safety/health
monitoring, and wireless home video data links, as examples. Spectrum spreading allows minimum
interference with existing standards lying in the 3.1-10.6GHz range. Reciprocally, UWB receivers
are required to handle strong nearby interferers, e.g. Wireless LAN (WLAN) signals in the 5-6GHz
range.
The realized front-end addresses the problem of interferer rejection in a receiver front-end,
operating in the 3.1-8GHz range according to the Multi-Band OFDM proposal. It employs a
direct conversion architecture, comprising a multi-resonance feedback LNA and quadrature mixers.
The device is intended to cover groups ]1 and ]3 while filtering out group ]2. The front-end,
drawing 10mA from 1.8V, achieves a 1dB gain desensitization with a -6.5dBm interferer power
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at 5.5GHz. Other measured performances are: 5.2dB and 7.7dB minimum and maximum NF,
-3.5dBm minimum IIP3 and +34.5dBm minimum in-band IIP2 and +21dBm out-of-band IIP2.
[1] P. Rossi, F. Svelto, A. Mazzanti, P. Andreani: “Reduced impact of induced gate noise on
inductively degenerated LNAs in deep submicron CMOS technologies”, Analog Integrated Circuits
and Signal Processing, Vol. 42 (1), Gennaio 2005, p.31.
[2] P. Rossi, A. Liscidini, M. Brandolini, F. Svelto: “A variable gain RF front-end, based on
a voltage-voltage feedback LNA, for multistandard applications”, IEEE Journal of Solid State
Circuits, Vol. 40, No.3, Marzo 2005, p. 690.
[3] M. Brandolini, P. Rossi, D. Manstretta, F. Svelto: “Towards multi-standard mobile terminals:
fully integrated receivers and architectures”, IEEE Trans. on Microwave Theory and Techniques,
Vol. 53, No.3, Marzo 2005, p.1026.
[4] A. Bevilacqua, F. Svelto: “Statistical Analysis of Second Order Intermodulation Distortion
in WCDMA Direct Conversion Receivers”, IEEE Trans. on Circuits and Systems-Express Briefs,
Vol.52, No.3, Marzo 2005, p.117.
[5] M. Brandolini, P. Rossi, D. Sanzogni, F. Svelto: “A CMOS direct down-converter with 78dBm
minimum IIP2 for 3G cell-phones”, Proc. of IEEE International Solid State Circuits Conference
(ISSCC), Febbraio 6-10, 2005, San Francisco, U.S.A., Dig. of Techn. Papers, p.320.
[6] D. Guermandi, E. Franchi, A. Gnudi, P. Rossi, F. Svelto, R. Castello: “A 2V 0.35-µm CMOS
DECT RF front-end with on-chip frequency synthesizer”, Microtechnologies for the New Millennium, Maggio 9-11 2005, Siviglia.
[7] G. Cusmai, M. Mazzini, P. Rossi, C. Combi, B. Vigna, F. Svelto: “A simple lumped electrical
model for an RF MEMS switch considering lossy substrate effects”, Sensors and Actuators, A
123124 (2005) p. 515.
[8] M. Pisati, C. Bazzani, F. Gatta, F. Svelto, R. Castello: “A 0.18 µm CMOS TIA Plus Limiting
Amplifier with a 5.3 GHz Overall Bandwidth for Fiber Optic Communications”, Analog Integrated
Circuits and Signal Processing, Vol. 45, No. 2, Nov. 2005, pp.27-31.
[9] M. Brandolini, P. Rossi, D. Sanzogni, F. Svelto: “A CMOS Direct Down-Converter with
Outstanding Dynamic Range Performances”, IEEE NEWCAS Conference Proceedings, Special
Session I - RF Integrated Circuits on Advanced Silicon Technologies, Giugno 19-22 2005, Quebec
City (Canada), dig. of techn. Papers, p. 5.
[10] G. Cusmai, M. Brandolini, P. Rossi, F. Svelto: “An interference robust 0.18 front-end for
UWB radio”, Proc. of IEEE Custom Integrated Circuits Conference (CICC), Settembre 18-21
2005, San Jos, U.S.A, p.157.
[11] A. Mazzanti, L. Larcher, F. Svelto: “Balanced CMOS LC-tank analog frequency dividers
for quadrature LO generation”, Proc. of IEEE Custom Integrated Circuits Conference (CICC),
Settembre 18-21 2005, San Jose, U.S.A, p.575.
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[12] A. Liscidini, M. Brandolini, D. Sanzogni, R. Castello: “A 0.13 µm CMOS front-end for
DCS1800/UMTS/802.11b-g with multi-band positive feedback low noise amplifier”, Symposium
on VLSI Circuits, June 16 - 18 2005, Kyoto, Japan, Dig. of Techn. Papers, pp. 406-409.
[13] A. Mazzanti, L. Larcher, R. Brama, F. Svelto: “A 1.4 GHz - 2 GHz wideband CMOS calss-E
power amplifier delivering 23 dBm peak with 67% efficiency”, Radio Frequency Integrated Circuits
(RFIC) Symposium, 2005, Digest of Technical Papers, p.38.
CIRCUITS AND SYSTEMS TECHNIQUES FOR CMOS RF TRANSCEIVERS
AND A/D CONVERTERS
I. Bietti, G. Albasini, E. Sacchi, E. Temporiti, R. Cannizzaro, E. Depaoli,
M. Bettini, R. Brama, G. Bollati, M. Introini, G. Cesura, M. Fedeli, A. Panigada, A. Bosi,
W. Audoglio, E. Zuffetti, R. Massolini, M. Rossi, R. Castello
During 2005 the research activity carried on within the RF and A/D gruop of the “Studio di
Microelettronica” has been mainly focused on the Italian National Program FIRB: ”Tecnologie
Abilitanti per Terminali Wireless Riconfigurabili”, in strong cooperation with University of Pavia
and University of Bologna. Its main goal was to study and realize a multistandard transceiver
prototype covering both cellular phone standards (GSM 900-1800, GSM-EDGE, DCS1800, UMTS)
and WLAN (IEEE 802.11a/b/g). Within the RF group of the Studio di Microelettronica the design
of the transmit side for both set of standards, the receiving chain for the WLAN and the frequency
synthesis for cellular standards has been carried out. Moreover a reconfigurable A/D converter
for both the WLAN and cellular standards has been realized, in order to complete the analog RX
chain; its architecture is based on non-specialized building blocks that can synthesize pipeline or
cyclic analog-to-digital converters.
The following prototypes have been designed and characterized:
• DCS1800 - Edge transmitter based on LINC + Direct Modulation architecture
• High efficiency class E power amplifiers
• Analog Front-end for IEEE802.11b based on transformer feedback LNA
• Analog Front-end for IEEE802.11a/b/g based on transformer feedback LNA
• Reconfigurable, 40 MHz, 6 tp 10 bits A/D converter for cellular standards and WLAN
• Receiver for IEEE802.11g (Analog Front-end + filter + A/D converter
• WLAN IEEE 811a/b/g upconversion mixer and Pre Power Amplifier
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In addition, some extra-FIRB activity has been carried out, mainly about the design of analog
front-end for radio FM, frequency synthesis for SATA applications, read/write preamp for hard
disk drive and pipeline A/D. In particular, about A/D, an important activity has concerned the redesign of a 14bit 80MS/s Pipeline ADC. In such a device (still under testing) two kind of algorithms
have been implemented: GNC to reduce the output non-linearity caused by inter-stage gain error
and DNC to reduce the output non-linearity caused by multi-bit DAC unit element mismatch.
[1] M. VALLA, G. MONTAGNA, R. CASTELLO, R. TONIETTO, I. BIETTI: “A 72-mW CMOS
802.11a direct conversion front-end with 3.5-dB NF and 200 kHz 1/f noise”, IEEE Journal of
Solid-State Circuits, vol. 40, April 2006, p.215.
[2] L. VANDI, P. ANDREANI, E. TEMPORITI, E. SACCHI, I. BIETTI, C. GHEZZI, R.
CASTELLO: “Toroidal inductors in CMOS processes”, NORCHIP Conference, 21-22 Nov. 2005,
p.14.
[3] A. Bosi, A. Panigada, G. Cesura, R. Castello: “An 80MHz 4x oversampled cascaded DeltaSigmapipelined ADC with 75dB DR and 87dB SFDR”, 2005 IEEE International Solid-State Circuits
Conference, Digest of Technical Papers, 6-10 Feb. 2005, pp.174-591.
DESIGN OF INTEGRATED CIRCUITS FOR SIGNAL PROCESSING
F. Borghetti, G. Boselli, A. Cabrini, V. Ferragina,
N. Ghittori, L. Gobbi, V. Liberali, P. Malcovati, F. Maloberti,
A. Rossini, G. Torelli, G. Trucco, A. Vigna
This research activity aims at different design targets. Generally speaking, it is focused on
design and modeling of analog and mixed analog-digital systems for signal processing purposes,
using either pure CMOS or BiCMOS technology.
In particular, we studied the design trade-offs for dimensioning the baseband blocks (DAC and
reconstruction filter) of a direct conversion transmitter for the UMTS standard. A Matlab model
performs a time domain analysis to evaluate the impact of each baseband block non-ideality on
the overall transmitter performance. The proposed approach has been used to design a 0.13 µm
CMOS test-chip implementing the DAC + filter blocks [1].
Moreover, we carried-out the analysis and the design in a 0.13 µm CMOS technology of a digital
interpolator filter for wireless applications [2]. The proposed block is designed to be embedded
in the baseband part of a reconfigurable transmitter (WLAN 802.11a, UMTS) to operate as a
sampling frequency boost between the digital signal processor (DSP) and the digital-to-analog
converter (DAC). In recent trends the DAC of such transmitters usually operates at high conversion
frequencies (to allow a relaxed implementation of the following analog reconstruction filter), while
the DSP output flows at low frequencies (typically Nyquist rate). Thus a block able to increase the
digital data rate, like the one proposed, is needed before the DAC. For example, in the WLAN case,
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an interpolation factor of 4 has been used, allowing the digital data frequency to raise from 20 MHz
to 80 MHz. Using a time-domain model of the TX chain, a behavioral analysis has been performed
to determine the impact of the filter performance on the quality of the signal at the antenna.
This study has led to the evaluation of the z-domain filter transfer function, together with the
specifications concerning a finite precision implementation. A VHDL description has allowed an
automatic synthesis of the circuit in a 0.13 µm CMOS technology (with a supply voltage of 1.2 V).
Post-synthesis simulations have confirmed the effectiveness of the proposed study.
We also developed a fully CMOS band-gap reference for extended temperature range (from −50
◦ C to 160 ◦ C) applications [3]. The proposed solution provides an output voltage of 798 mV with a
power supply as low as 1 V. The measured output voltage variations as a function of temperature
(−50 ◦ C to 160 ◦ C) and power supply (1 V to 2 V) are 6.64 ppm/◦ C and 248 ppm/V, respectively.
High accuracy is achieved by minimizing the operational amplifier offset. Power consumption is
approximately equal to 26 µW (supply voltage = 1 V). Silicon area is 0.02 mm 2 .
Moreover, we studied a new double polarity CMOS peak-and-hold circuit to be used in radiation
detection systems. When such detection systems have to be placed on a satellite, it becomes very
important to integrate the entire acquisition channel in a single ASIC, in order to reduce both the
size and the power consumption without loosing in performance [4]. To improve the flexibility of
the system, in order to use the same acquisition chain with different kind of detectors, a circuit
working with both polarities of the input signal is required. This new topology of peak-and-hold
circuit proposed is designed in a 0.8 µm CMOS technology, consumes 510 µW from a 5V power
supply and achieves 10 bits of resolution and linearity.
We also developed an approach for the analysis and the experimental evaluation of crosstalk
effects due to current pulses drawn from voltage supplies in mixed analog-digital CMOS integrated
circuits [5, 6]. A test chip has been integrated and mounted in different ways, in order to compare
the results of measurements on chips mounted in package and mounted on board. The chip has
been extensively simulated, using a realistic model of on-chip and off-chip parasitics, to study what
happens on the analog section when digital switching noise is injected. To this end, a model of
bonding and package parasitics has been derived to study digital switching noise injected through
bonding interconnections. Simulation results indicate that disturbances due to switching currents
in digital blocks propagate through interconnection parasitics, and affect analog voltages, degrading
circuit performance. Therefore, reduction of interconnection parasitics is essential in mixed-signal
high-frequency circuits, such as radio-frequency front-ends. Measurements on test-chips with and
without bondwires confirm simulation results.
We also designed a discrete-time chaotic signal generator for low-power embedded cryptosystems [7]. In these systems, an unpredictable source of random numbers is the key element to
ensure security. We show how to design and use an integrated chaotic circuit for random number
generation. The proposed circuit consists of a non linear function block, a S/H circuit, and a
comparator. It is designed in 0.18-µm CMOS process and operates with nominal 3 V supply with
a power dissipation of less than 100 µW at a 100 kHz frequency.
Moreover, we presented a CMOS amplifier input stage with extended input common-mode
voltage range, suitable for operation in extremely low-voltage environments [8]. The scheme is
based on a bulk-driven input differential pair, in which the gain and the gain-bandwidth product
are enhanced by means of a partial positive feedback loop. The bulk-driven input transistors
allow obtaining a very wide input voltage range, while the partial positive feedback leads to an
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effective transconductance improvement. The proposed input stage has been used to design a
1-V operational transconductance amplifier. Post-layout simulated results, obtained in 0.35-µm
standard CMOS technology, were provided.
In the frame of this activity, an effective approach to the design of large time constants implemented with switched-capacitor (SC) techniques for use in low-frequency signal processing applications, was also presented [9]. The proposed method utilizes a non-uniform sampling scheme, which
adds one degree of freedom in obtaining the time constant of SC integrators. As a result, capacitor
spread and total capacitor area is reduced and, hence, silicon area can be minimized. To prove the
feasibility of the presented approach, the design and the implementation of a second-order lowpass
notch SC filter were discussed. Experimental results from a 0.35-µm CMOS test-chip that operates
at 2-kHz sampling frequency were provided.
Bootstrapped switches are used in a variety of applications including DC-DC converters,
pipelined analog-to-digital converters and high voltage switches and drivers. Current work on
highly integrated power management applications often requires the ability to measure voltage
quantities that exceed the supply voltage in magnitude. This is primarily due to a basic need to
maximize efficiency by running the power management IC on as low supply voltage as possible,
while still maintaining the ability to sample and measure quantities from the surroundings that
could well exceed the battery voltage. We studied a new bootstrapped switch is presented. The
switch enables the precise sampling of input signals well greater than the chip supply voltage with
no static power consumption, and without activating on-chip parasitic body diodes. The bootstrapped switch, presented here, is designed to sample an input signal with a 0-5.5 V range at a
supply voltage of 2.75 V. Measurement data shows functionality for a 0-6 V input signal range with
a supply voltage as low as 1.2 V [10].
Moreover, we designed a high-efficiency class-E switched-mode power amplifier for a wireless
networked micro-sensor system. In this system, where each sensor operates using a micro-battery,
has local processing capability, and contains on the same chip integrated sensing elements and an
RF transmitter, most of the power is dissipated by the transmitter. The proposed amplifier achieves
92.4% maximum drain efficiency and can vary the transmitted power between −4.2 to −0.2 dBm
with almost constant efficiency. This last feature is obtained by controlling the modulation duty
cycle and by switching the capacitors’ values in the parallel circuit. The possibility of choosing
the transmitted power depending on the distance from a base station or other sensors and on
the charge level of the battery, combined with power aware network protocols, improves network
lifetime, reliability, and adaptability. The amplifier is designed in 0.18 µm CMOS process and
operates with a nominal 1.2 V supply [11].
The symbolic analysis of analog circuits and systems is made easy by the use of the SSA
tool. The input description of the system to be studied is done with a file description or, more
conveniently, using the Cadence or the Simulink graphic environments. Libraries of basic blocks
enable the description of complex systems, including high-order sigma-delta modulators. The
symbolic results produce various types of output depending on the kind of post-processing required.
Examples of use of the tool are provided [12].
Moreover, we studied a novel two-stage low dropout regulator (LDO) that minimizes output
noise via a pre-regulator stage and achieves high power supply rejection via a simple subtractor
circuit in the power driver stage. The LDO is fabricated with a standard 0.35 µm CMOS process
and occupies 0.26 mm2 and 0.39 mm2 for single and dual output respectively. Measurement showed
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PSR is 60dB at 10kHz and integrated noise is 21.2 µVrms ranging from 1kHz to 100kHz [13].
We also studied a new possibility of fully integrated fractional-N phase locked loop (PLL). The
approach uses switched-capacitor fully differential low pass filter (LPF) instead of huge continuoustime filter. The discrete-time operation has the potential to provide a phase noise enhancement
(PNE) block, variable gain, to improve noise. The circuit is implemented in 2.8 mm2 including
all capacitors and Σ∆ modulator using 0.25 µm CMOS process. The proposed PLL achieves a
phase noise of −102 dBc at 600 kHz and spur level of −80 dBc with mid-band frequency. Power
dissipation is 30 mW with a 3-V supply [14].
In addition we realized a fully differential switched-capacitor (SC) amplifier and integrator with
an accurate gain of 2. Both circuits are based on a novel capacitor mismatch compensation scheme
which uses the same capacitor as the charge sampling and summing element. Therefore, the gain
error which is linearly proportional to the capacitor mismatch in conventional SC circuits becomes
proportional to the square of the mismatch. In addition, the proposed scheme does not require
additional active blocks, and the valid output is generated within two clock cycles [15].
We studied also a novel method to obtain a digital control for PWM DC/DC switching regulator.
A passive sigma-delta modulator for which output is suitably processed obtains the PWM control
and makes the control loop. The output of the sigma-delta enables generating the discrete-time
PWM control. The proposed method has been extensively simulated at the behavioral level. Results
show that the method can be effectively employed in low power DC/DC converters [16, 17].
Finally, we designed a variable gain amplifier (VGA) to be used in a reconfigurable receiver for
wireless applications [18]. The gain of the block can be digitally programmed between 0 and 35
dB, with a uniform step of 2.5 dB, while satisfying the noise and linearity requirements of WLAN,
UMTS and GSM standards. The cutoff frequency of the system can be selected according to the
processed standard (15 MHz for WLAN and UMTS, 5 MHz for GSM). Special care is taken in
reducing the current consumption, which is limited to 4.3 mA in the maximum gain case. The
block has been implemented in a standard 0.25 µm CMOS technology and with a supply voltage of
2.5 V. Full transistor-level simulations confirm the effectiveness of the proposed design, resulting in
a SFDR of 83.6 dB and an OIP3 of 42 dBm when the WLAN operation mode and the maximum
gain are set.
[1] N. Ghittori, A. Vigna and P. Malcovati, “Behavioral analysis and dimensioning of UMTS
transmitters baseband blocks”, Proceedings of IEEE International Symposium on Circuits and
Systems (ISCAS ’05), Kobe, Japan, pp. 388-391, May 2005.
[2] V. Ferragina, A. Frassone, N. Ghittori, P. Malcovati and A. Vigna, “Behavioral study and
design of a digital interpolator filter for wireless reconfigurable transmitters”, Proceeding of SPIE
VLSI Circuits and Systems II, vol. 5837, pp. 270-277, June 2005.
[3] A. Cabrini, G. De Sandre, L. Gobbi, P. Malcovati, M. Pasotti, M. Poles, F. Rigoni and G. Torelli,
“A 1 V, 26 µW extended temperature range band-gap reference in 130-nm CMOS technology”,
Proceedings of IEEE European Solid-State Circuits Conference (ESSCIRC ’05), Grenoble, France,
pp. 503-506, September 2005.
[4] F. Borghetti, A. Rossini, R. Magni and P. Malcovati, “A double polarity CMOS peak-and-hold
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circuit for satellite radiation detection systems”, Proceedings of IEEE International Conference on
Electronics, Circuits and Systems (ICECS ’05), Gammarth, Tunisia, December 2005.
[5] V. Ferragina, N. Ghittori, G. Torelli, G. Boselli, G. Trucco and V. Liberali, “Analysis of
crosstalk effects on mixed-signal CMOS ICs with different mounting technologies”, Proceedings
of the IEEE Instrumentation and Measurement Technology Conference (IMTC ’05), vol. 3, pp.
1979-1984, May 2005.
[6] G. Boselli, V. Ferragina, N. Ghittori, V. Liberali, G. Torelli and G. Trucco, “Impact of package
parasitics on crosstalk in mixed-signal ICs”, Proceedings of SPIE, VLSI Circuits and Systems II,
vol. 5837, pp. 213-222, June 2005.
[7] A. Cabrini and S. Gregori, “CMOS discrete-time chaotic circuit for low-power embedded cryptosystems,” Proceedings of the IEEE Midwest Symposium on Circuits and Systems (MWSCAS
’05), pp. 1498 - 1501, August 2005.
[8] J. M. Carrillo, G. Torelli, R. Pérez Aloe and J. F. Duque-Carrillo, “1-V rail-to-rail bulkdriven CMOS OTA with enhanced gain and gain-bandwidth product”, Proceedings of European
Conference on Circuit Theory and Design (ECCTD ’05), vol. 1, pp. 261-264, August-september
2005.
[9] J. L. Ausı́n, M. A. Domı́nguez, G. Torelli, J. Ramos and J. F. Duque-Carrillo, “Non-uniform
sampling approach for improved capacitor area efficiency in SC circuits”, Proceedings of Conference
on Design of Circuits and Integrated Systems (DCIS ’05), pp. 8a.21-8a.24, November 2005.
[10] D. Aksin, M. A. Al-Shyoukh and F. Maloberti, “A bootstrapped switch for precise sampling
of inputs with signal range beyond supply voltage”, Proceedings of the IEEE Custom Integrated
Circuits Conference (CICC ’05), San Jose, USA, pp. 743-746, September 2005.
[11] D. Aksin, S. Gregori and F. Maloberti, “High-efficiency power amplifier for wireless sensor
networks”, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS ’05),
Kobe, Japan, vol. 6, pp. 5898-5901, May 2005.
[12] D. Aksin and F. Maloberti, “Symbolic small-signal analysis (SSA) tool”, Proceedings of IEEE
International Symposium on Circuits and Systems (ISCAS ’05), Kobe, Japan, vol. 3, pp. 3007-3010,
May 2005.
[13] S. K. Hoon, S. Chen, F. Maloberti, J. Chen and B. Aravind, “A low noise, high power supply
rejection low dropout regulator for wireless system-on-chip applications”, Proceedings of the IEEE
Custom Integrated Circuits Conference (CICC ’05), San Jose, USA, pp. 759-762, September 2005.
[14] Park Joohwan and F. Maloberti, “Fractional-N PLL with 90◦ phase shift lock and active
switched-capacitor loop filter”, Proceedings of the IEEE Custom Integrated Circuits Conference
(CICC ’05), San Jose, USA, pp. 329-332, September 2005.
[15] Lee Kye-Shin, Choi Yunyoung and F. Maloberti, “SC amplifier and SC integrator with an
accurate gain of 2”, IEEE Transactions on Circuits and Systems II, vol. 52, pp. 194-198, April
2005.
[16] Hoon Siew Kuok, N. Culp, Chen Jun and F. Maloberti, “A PWM dual-output DC/DC boost
converter in a 0.13µ CMOS technology for cellularphone backlight application”, Proceedings of the
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European Solid-State Circuits Conference (ESSCIRC ’05), Grenoble, France, pp. 81-84, September
2005.
[17] Hoon Siew Kuok, F. Maloberti and Chen Jun, “A low-power digital PWM DC/DC converter based on passive sigma-delta modulator”, Proceedings of IEEE International Symposium on
Circuits and Systems (ISCAS ’05), Kobe, Japan, vol. 4, pp. 3873-3876, May 2005.
[18] N. Ghittori, A. Vigna, P. Malcovati, S. D’Amico and A. Baschirotto, “Design of a low-power
variable gain amplifier for reconfigurable wireless receivers”, Proceedings of IEEE International
Conference on Electronics, Circuits and Systems (ICECS ’05), Gammarth, Tunisia, pp. 394-397,
December 2005.
DESIGN OF A/D AND D/A CONVERTERS
P. Boi, F. Borghetti, C. Della Fiore, A. Fornasari, I. Galdi,
N. Ghittori, P. Malcovati, F. Maloberti, G. Torelli, A. Vigna
Our research group studied various architectures for analog-to-digital (A/D) and digital-toanalog (D/A) conversion. The activity is focused on implementation, modeling and characterization of data converters for either low-frequency and high-resolution applications or high-speed
applications. In particular, we spent a lot of efforts on the design and optimization of sigma-delta
modulators.
In the frame of this research activity, we developed an extension of the behavioral models previously implemented in the Matlab/SimulinkT M environment [1]. This toolbox allows us to simulate
at behavioral level most of the switched-capacitor (SC) sigma-delta (Σ∆) modulator non-idealities,
such as sampling jitter, kT/C noise and operational amplifier limitations (finite bandwidth, finite
DC gain, slew rate and saturation). Although very effective in simulating wide-band, mediumresolution Σ∆ converters the lack of a model for flicker noise and multi-bit quantizers makes this
toolbox less attractive for simulating narrow band high resolution converters. The proposed extension not only fixes this limitation, but introduces a predictive model of the effect of capacitor
mismatch in the internal multi-bit D/A converter.
Moreover, we designed in a standard 0.13 µm CMOS technology a 1.2 V baseband block
(DAC+Filter), intended for wireless applications (UMTS, WLANs) [2]. A transimpedance stage is
placed between the two functional blocks to improve the static and dynamic linearity performance
of the current steering DAC with respect to a solution in which the DAC outputs are directly
connected to the following reconstruction filter. Transistor level simulations have been used to
evaluate the DAC DNL-INL and the dynamic linearity performance (OIP3) at the filter output. A
comparison with the simulated performance of an implemented block which does not use the DAC
output transimpedance stage confirms the effectiveness of the proposed solution.
We also studied the impact of technology scaling on the choice of A/D converters in telecom
receivers [3]. It is shown that the trend of diminishing feature size, together with better matching
of passive components, allows the use of A/D topologies traditionally confined to low-frequency,
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medium-resolution applications. The design of a 10 bit 20 MS/s ADC using the successive approximation algorithm is presented in order to validate the presented concepts. By using a deepsubmicron technology, the speed of the chosen architecture is pushed to meet the desired output
rate.
In addition, we developed a new method for the on-line calibration of the elements of the digitalto-analog converter (DAC) used in the feedback loop of multi-bit sigma-delta (Σ∆) modulators
[4]. The proposed method, with an extremely limited amount of additional circuitry, allows the
mismatches among the elements of the DAC to be accurately measured and corrected in the digital
domain, thus improving the linearity performance of the modulator. A switched-capacitor (SC)
4-bit Σ∆ modulator has been implemented to validate the proposed solution. The experimental
results confirm that this method allows us to achieve an improvement in the spurious-free dynamic
range as large as 26 dB.
Moreover, we implemented a DAC+filter in a 0.13 µm CMOS technology to operate in a
multistandard (WLAN/UMTS) transmitter [5, 7]. The 0.8mm2 device allows programming the
8 bit DAC sampling frequency (100MHz/50MHz) and the 4th-order low-pass filter bandwidth
(11MHz/2.11MHz) to satisfy the 8 bit WLAN/9 bit UMTS standards, consuming 11mW/8.4mW
from a single 1.2V supply. For both standards the OIP3 is larger than 29dBm and the SFDR is
54dB for WLAN, 61dB for UMTS.
We also studied a technique for synthesizing any noise shaping transfer function (NTF) starting
from an N-Path Sigma Delta architecture. The proposed method uses cross-coupled paths to obtain
missing terms in the NTF. The limitations due to zeros located out of the band of interest, as it
happens for conventional N-Path Σ∆ modulators, are avoided. Specific NTFs are synthesized and
behavioural simulations verify them [6].
We also carried out a theoretical analysis of the spurious free dynamic range (SFDR) of digitalto-analog converters (DAC). Starting from the study of the quantization noise of a quantized
sinusoidal signal, we derive an expression for the theoretical SFDR achievable with an ideal N
bit DAC. The effect of the ratio between the conversion frequency and the signal frequency is
investigated, together with the effect of the zero-order-hold introduced by the DAC [8].
The impact of mismatches in the fabricated components over the linearity of pipeline analog-todigital converters (ADCs) was also addressed [9]. In this area, a mismatch shaping technique that
significantly mitigates this problem in pipeline ADCs with low oversampling ratio, was proposed.
The use of a sigma-delta coder results in a beneficial noise shaping of the in-band distortion introduced by capacitor mismatches. As a simulation example, the proposed technique was applied to
a pipeline ADC with a nominal accuracy of 14 bits. Through this example, we demonstrated that,
in the presence of component matching limitations, the technique can improve the ADC linearity
without appreciable hardware complexity.
The offset of an ADC is one of the main limitations for interleaved architectures. We studied a
method that enables a precise measurement of the offset while the ADC operates and introduces
a minimum disturb to the output result [10]. The method exploits a random modulation by +1 or
−1 of the input signal. The modulating signal is the wide-band output of a Chua circuit passed
through a comparator. The resulting spread spectrum can be easily distinguished by the dc offset
and reconstructed in the digital domain with a synchronous demodulation. The use of a digital
accumulator extracts the offset. The accumulation time can be many clock periods (like 10 6 ) thus
permitting an excellent accuracy in the offset measurement. Simulations of the proposed approach
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at the behavioral level confirm the effectiveness of the method. It is shown that the offset of a
12-bit ADC can be measured with a 0.1 LSB accuracy.
We also studied a method that reduces the number of operational amplifier used in sigma delta
modulators. The approach together with the double sampling method permits the designer to
obtain very low figure of merits (and low power) as required by portable wireless applications. The
proposed technique is applied to second and third order architectures. The limits due to capacitor
mismatches make the approach useful for medium resolution and low over-sampling ratios. A case
study meeting typical WCDMA specification is given [11].
Multi-bit sigma-delta modulators are widely used in analog-to-digital conversion especially in
the modern deep-submicron CMOS process. As the quantizer resolution of Σ∆ modulators increases, the SNR performance improves. However, the feedback DAC has to maintain high linearity.
The general practice to achieve that is to use dynamic element matching (DEM). The methodology
studied will greatly reduce the complexity or even avoid usage of DEM for multi-bit Σ∆ modulators
[12, 13]. The proposed methodology-truncation error shaping and cancellation-reduces the feedback
DAC levels for multi-bit quantizers. A prototype was designed in a standard CMOS 90-nm process
to demonstrate the proposed methodologies. It achieved targeted performance without DEM at
low power consumption with small silicon area.
Moreover, we developed a 14-bit 2OMSPS switched-capacitor pipelined ADC that employs
digital background calibration to correct capacitor mismatch. The calibration concept is amenable
to implementation in SOC because it is digital in nature. The calibration concept is demonstrated
offline though in principle it can be included on-chip. The calibration can also be performed
periodically, thus it is inherently able to track the operating VDAC conditions of the device.
Implementation is in a complimentary bipolar process. The prototype exhibits typical INL of ±2.0
LSB, DNL of ±0.4 LSB, SNR of 73 dB and SFDR of 85 dB with a 2 MHz input signal. Analog
power is about 500 mW with 5 V supply [14].
We also developed a bandpass MASH (multi-stage noise shaping) sigma-delta (Σ∆) modulator
[15]. A SNR (signal to noise ratio) of at least 85 dB (equivalent to a resolution of 14 bits) has
been achieved over a 5 MHz band around an intermediate frequency (IF) of 20 MHz using a clock
frequency of 80 MHz. This performance is obtained using a sixth order bandpass Σ∆ modulator
followed by a 10 bit pipeline converter. The proposed circuit has been extensively simulated, both
at behavioral and at circuit level, and results are reported.
Finally, we developed design strategies for ultra low-power analog cells [16]. It is assumed that
the circuits are used in sampled-data systems with only capacitors and switches. The operation
requires large currents to quickly charging or discharging capacitors and, after a transient, a very
small quiescent current. The proposed strategy uses dynamically controlled bias current that leads
to a very low average power consumption while the slew-rate and frequency response is good
enough. Two categories of circuits are discussed: low-voltage OTA and comparators. For both
circuits, simulation results confirm the validity of the basic idea and show good performances with
average currents in the sub micro-ampere range.
[1] A. Fornasari, P. Malcovati and F. Maloberti, “Improved modeling of sigma-delta modulator non
idealities in SIMULINK”, Proceedings of IEEE International Symposium on Circuits and Systems
(ISCAS ’05), Kobe, Japan, pp. 5982-5985, May 2005.
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[2] N. Ghittori, A. Vigna, P. Malcovati, S. D’Amico and A. Baschirotto, “Low-distortion 1.2 V
DAC+Filter for transmitters in wireless applications”, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS ’05), Kobe, Japan, pp. 776-779, May 2005.
[3] J. Hammel Nielsen, P. Andreani, P. Malcovati and A. Baschirotto, “Technology scaling impact
on embedded ADC design for telecom receivers”, Proceedings of IEEE International Symposium
on Circuits and Systems (ISCAS ’05), Kobe, Japan, pp. 4614-4617, May 2005.
[4] A. Fornasari, F. Borghetti, P. Malcovati and F. Maloberti, “On-line calibration and digital
correction of multi-bit sigma-delta modulators”, IEEE VLSI Circuit Symposium (VLSI ’05) Digest
of Technical Papers, Kyoto, Japan, pp. 184-187, June 2005.
[5] N. Ghittori, A. Vigna, P. Malcovati, S. D’Amico and A. Baschirotto, “A low-power, low-voltage
(11mW/8.4mW, 1.2V) DAC+Filter for multistandard (WLAN/UMTS) transmitters”, IEEE VLSI
Circuit Symposium (VLSI ’05) Digest of Technical Papers, Kyoto, Japan, pp. 334-337, June 2005.
[6] F. Borghetti, C. Della Fiore, P. Malcovati and F. Maloberti, “Synthesys of the noise transfer
function in N-path sigma delta modulators”, Proceedings of Advanced A/D and D/A Conversion
Techniques and Their Application (ADDA ’05), Limerick, Ireland, pp. 171-176, July 2005.
[7] N. Ghittori, A. Vigna, P. Malcovati, S. D’Amico and A. Baschirotto, “A low-voltage, lowdistortion (1.2V, 29.5dBm OIP3) reconfigurable baseband block for mobile applications”, Proceedings of IEEE Ph.D. Research in Microelectronics and Electronics (PRIME ’05), Lausanne,
Switzerland, vol. 1, pp. 25-28, July 2005.
[8] N. Ghittori, A. Vigna and P. Malcovati, “Analysis of the ideal SFDR limit for an N-bit digitalto-analog converter”, Proceedings of IEEE International Conference on Electronics, Circuits and
Systems (ICECS ’05), Gammarth, Tunisia, pp. 87-90, December 2005.
[9] J. L. Ausı́n, G. Torelli and J. F. Duque-Carrillo, “Linearity enhancement of oversampled
pipeline A/D converters using sigma-delta modulation”, Proceedings of European Conference on
Circuit Theory and Design (ECCTD ’05), vol. 2, pp. 59-62, August-September 2005.
[10] A. Cabrini and F. Maloberti, “Use of nonlinear Chua’s circuit for on-line offset calibration
of ADC”, Proceedings of the European Conference on Circuit Theory and Design (ECCTD ’05),
Cork, Ireland, vol. 1, pp. 297-300, August 2005.
[11] C. Della Fiore and F. Maloberti, “Design of Σ∆ modulators with reduced number of operational
amplifiers”, Proceedings of the European Conference on Circuit Theory and Design (ECCTD ’05),
Cork, Ireland, vol. 1, pp. 205-208, August 2005.
[12] Yu Jiang and F. Maloberti, “A low-power multi-bit Σ∆ modulator in 90-nm digital CMOS
without DEM”, IEEE Journal of Solid-State Circuits, vol. 40, pp. 2428-2436, December 2005.
[13] Yu Jiang and F. Maloberti, “A low-power multi-bit Σ∆ modulator in 90nm digital CMOS
without DEM”, IEEE International Solid-State Circuits Conference Digest of Technical Papers
(ISSCC ’05), San Francisco, USA, pp. 168-591, February 2005.
[14] M. Kinyua, F. Maloberti and W. Gosney, “A 14-Bit 20-Msamples/S Pipelined A/D Converter
with Digital Background Calibration”, Proceedings of the IEEE Dallas/CAS Workshop on Architecture, Circuits and Implementtation of SOCs (DCAS ’05), Dallas, USA, pp. 219-223, October
2005.
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[15] S. Marabelli, A. Fornasari, P. Malcovati and F. Maloberti, “An 80-MHz, 14-bit bandpass mash
sigma-delta/pipeline A/D converter with 5 MHz bandwidth for third generation mobile communication systems”, Measurement, vol. 37, pp. 320-327, June 2005.
[16] I. Galdi, P. Boi, and F. Maloberti: ”Design of ultra low-power analog cells with dynamic
current biasing”, Proceedings IEEE International Conference on Electronics, Circuits and Systems
(ICECS ’05), Gammarth, Tunisia, December 2005.
DESIGN OF INTERFACE CIRCUITS FOR SENSORS
F. Borghetti, V. Ferragina, M. Grassi, P. Malcovati, F. Maloberti, A. Rossini
This research activity is focused on design and implementation of interface circuits for integrated
sensors. In a number of these electronic systems, the sensor and the circuitry are realized on the
same chip, using standard integrated circuit (IC) technologies. The sensor is typically obtained with
additional fabrication steps before or after the completion of the CMOS or bipolar process (pre- or
post-processing steps). These processing steps, obviously, should not degrade the performance of
the conventional IC devices on the chip [1].
In the frame of this research activity, we developed a flexible high-precision wide-range frontend for resistive sensors [2, 4, 6, 7]. The output of a programmable continuous-time transresistance
stage is processed by a differential switched-capacitor incremental A/D converter. A digital signal
processor reconfigures the interface leading to a resolution of 0.1% over a range of 5 decades, as
required by pattern recognition algorithms for sensors arrays in environmental nosing applications.
Particular care has been taken in reducing the power consumption. As shown in measurements
the worst case resolution is near to 0.1% over a range of 5.3 decades [100Ω-20MΩ] thanks to a
calibration technique which cancels offset and gain error mismatch between scales. The chip has
been designed in 0.35µm CMOS technology and characterized together with actual gas sensors.
Moreover, we studied a Wilkinson type A/D converter as well as all the digital logic required
for reading-out a 16×16 array of X-ray detectors [3]. The proposed A/D converter architecture and
read-out strategy allows us to handle an event rate as large as 10 6 event/s over the whole array
and 104 event/s over the single row of the array with a resolution of 10 bits, consuming only 77
mW from a 3.3 V power supply. The A/D converter and the logic are embedded in an ASIC to
be bump-bonded on top of the detector, which includes also the front-end electronics required for
processing the sensor output signals. This work was done in the framework of an ESA research
activity.
Finally, we developed a general model for magnetic sensors to be used in portable systems.
The model, written using the VERILOG-A language, enables the simulation of fully integrated
solution [6]. Physics and magnetic features of sensors are accounted for including second order
effect like temperature, parasitic capacitance and contact resistance. The behavioral model obtains
first magnetization and cycles completely customizable for the hysteresis calculation. The accuracy
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is very good without requiring heavy computation. The behavioral model describes magnetoresistances, magneto-inductances, flux-gate and Hall devices. The model is verified by computer
simulations in the Cadence-Spice environment.
[1] P. Malcovati and F. Maloberti, “Interface circuitry and microsystems”, in J. Korvink and
O. Paul, ed., MEMS: A Practical Guide to Design, Analysis and Applications, William Andrew,
Norwich, USA, pp. 901-942, 2005.
[2] M. Grassi, P. Malcovati and A. Baschirotto, “Flexible high-accuracy wide-range gas sensor interface for portable environmental nosing purpose”, Proceedings of IEEE International Symposium
on Circuits and Systems (ISCAS ’05), Kobe, Japan, pp. 5385-5388, May 2005.
[3] V. Ferragina, P. Malcovati, F. Borghetti, A. Rossini, F. Ferrari, N. Ratti and G. Bertuccio,
“Implementation of a novel read-out strategy based on a Wilkinson ADC for a 16x16 pixel X ray
detector array”, Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS
’05), Kobe, Japan, pp. 5569-5572, May 2005.
[4] M. Grassi, P. Malcovati and A. Baschirotto, “A 0.1% accuracy 100Ω -20MΩ dynamic range
integrated gas sensor interface circuit with 13+4 bit digital output”, Proceedings of IEEE European
Solid-State Circuits Conference (ESSCIRC ’05), Grenoble, France, pp. 351-354, September 2005.
[5] A. Rossini, F. Borghetti, P. Malcovati and F. Maloberti, “Behavioral model of magnetic sensors
for SPICE simulations”, Proceedings of IEEE International Conference on Electronics, Circuits and
Systems (ICECS ’05), Gammarth, Tunisia, December 2005.
[6] P. Malcovati, M. Grassi, F. Borghetti, V. Ferragina and A. Baschirotto, “Design and characterization of a 5-decade range integrated resistive gas sensor interface with 13-Bit A/D converter”,
Proceedings of IEEE International Conference on Sensors (Sensors ’05), Irvine, USA, pp. 472-475,
October 2005.
[7] M. Grassi, P. Malcovati and A. Baschirotto, “A high-precision wide-range front-end for resistive
gas sensors arrays”, Sensors and Actuators B, vol. 111-112, pp. 281-285, November 2005.
NON VOLATILE MEMORIES
D. Baderna, C. Boffino, E. Bonizzoni, A. Cabrini, L. Gobbi, A. Fantini, F. Maloberti
C. Resta, A. Rossini, G. Torelli, D. Zella
The activity in this field has been focused on Flash memories and Phase Change memories,
addressing design and characterization aspects. Particular emphasis was devoted to advanced
fabrication technology and low-voltage low-power issues.
Manufacturing yield and circuit reliability are becoming more and more dependent on interconnects (contacts, vias, and metal lines). These elements are therefore considered to represent one
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of the main limits to the future scaling down of integration processes. In this area, we presented a
test methodology, and the corresponding test structure, based on a suitable array of contacts and
vias, which allows the contribution of interconnects to reliability and manufacturing yield degradation in new-generation CMOS technologies to be evaluated [1, 2]. The test structure has been
conceived to measure the statistical distribution of open failures in contacts and vias. In addition,
by using the proposed solution, it is possible to detect the physical location of interconnect faults,
thus allowing a subsequent physical failure analysis. The proposed test methodology also allows
the statistical occurrence of resistive C/Vs and their reliability to be easily evaluated. The test chip
was integrated in 130 nm CMOS technology and experimentally evaluated. Experimental results
demonstrate the usefulness of the proposed approach (i.e., test structure and methodology).
On-chip voltage elevators are key circuits in non-volatile memories, which require voltages higher
than the supply voltage for correct operation. Integrated voltage elevators are generally based on
the charge pump approach. A basic drawback of charge pump circuits is represented by undesired
power losses, that must be reduced as much as possible, in particular for portable applications. A
control structure conceived to reduce the power consumption of voltage elevators based on Dickson
charge pump topology was proposed [3]. To evaluate the effectiveness of the proposed control
scheme, a new definition of power efficiency was introduced. The presented solution provides an
effective power management, thus ensuring an efficiency improvement of about 40% during standby.
Moreover, a comparison between two of the most popular charge pump structures, namely,
Dickson scheme and the cascade of voltage doublers, was presented [6]. The comparison has been
carried out considering power efficiency as the main parameter of interest. The discussion was
supported by theoretical analysis and experimental results. To compare the two topologies, two
voltage elevators were designed and integrated in a triple-well 0.18-µm CMOS technology. The two
charge pumps were designed with the same operating clock frequency, the same storage capacitance
per stage, and the same number of stages (and, thus, approximately the same area). The comparison
showed that the voltage doubler has a power efficiency higher by about 13%.
The heap charge pump represents an attractive voltage multiplier scheme in integrated circuits
where only low-voltage devices are available. A performance optimisation of the heap charge
pump achieved by using a tapered architecture was presented [7]. The proposed optimisation
allows improvements on the order of 30% in terms of maximum output voltage as compared to
the conventional heap charge pump. A mathematical description of both the conventional and
the proposed structure was developed. MATLABT M -based simulation results demonstrate the
effectiveness of the proposed scheme.
A study of the theoretical performance of CMOS integrated charge pumps was also carried
out [9]. The study is based on a behavioural model of the charge pump and a mathematical
manipulation of power efficiency definition, and allows determining the charge pump theoretical
limits in terms of both power efficiency and maximum driving capability. The basic idea is to analyze
the performance of any charge pump only considering the voltage gain, the output resistance, the
number of capacitors, and parasitic capacitances. Experimental results validate the theoretical
analysis.
In the frame of this activity, we also presented a sense amplifier scheme for low-voltage embeddable NOR Flash memory applications [4]. The architecture of the proposed sense amplifier is
based on a folded cascode configuration which allows the bit-line voltage to be regulated even in
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the case of a power supply of about 1.08 V. The proposed scheme was designed using low-leakage
transistors for a 0.13-µm Flash CMOS technology. Simulation showed a read time of 16 ns and 11
ns for the worst-case and the best-case condition, respectively.
Program pulse characterization in an 8-Mb BJT-selected Phase-Change Memory (PCM) test
chip was also carried out [5]. Experimental results of the impact of the bit-line resistance over
programming pulse efficiency were provided. Furthermore, in order to compensate for spreads in
cell physical parameters in an array portion, a non-conventional staircase-down program pulse was
proposed and experimentally evaluated.
Moreover, a µtrench Phase-Change Memory cell with MOSFET selector and its integration in
a 4-Mb experimental chip fabricated in 0.18-µm CMOS technology were presented [8]. A cascode
bitline biasing scheme allows read and write voltages to be fed to the addressed storage elements
with the required accuracy. The high-performance capabilities of PCM cells were experimentally
investigated. A read access time of 45 ns was measured together with a write throughput of 5 MB/s,
which represents an improved performance as compared to NOR Flash memories. Programmed cell
current distributions on the 4-Mb array demonstrate an adequate working window and, together
with first endurance measurements, assess the feasibility of PCMs in standard CMOS technology
with few additional process modules.
[1] A. Cabrini, D. Cantarelli, P. Cappelletti, R. Casiraghi, D. Iezzi, A. Maurelli, M. Pasotti, P. L.
Rolandi and G. Torelli, “A failure analysis test structure for deep sub-micron CMOS copper interconnect technologies”, Proceedings of International Conference on Microelectronic Test Structures
(ICMTS ’05), pp. 245-249, April 2005.
[2] A. Cabrini, D. Cantarelli, P. Cappelletti, R. Casiraghi, D. Iezzi, C. Lombardi, A. Maurelli, M.
Pasotti, P.L. Rolandi and G. Torelli, “Novel test strategy for statistical evaluation of defect density
and reliability of contacts and vias”, Proceedings of the Annual IEEE International Reliability
Physics Symposium (IRPS ’05), pp. 678-679, April 2005.
[3] C. Boffino, A. Cabrini, O. Khouri and G. Torelli, “High-efficiency control structure for CMOS
Flash memory charge pumps”, Proceedings of the IEEE International Symposium on Circuits and
Systems (ISCAS ’05), vol. 2, pp. 121-124, May 2005.
[4] D. Baderna, A. Cabrini, G. De Sandre, F. De Santis, M. Pasotti, A. Rossini and G. Torelli, “A
1.2 V sense amplifier for high-performance embeddable NOR Flash memories”, Proceedings of the
IEEE International Symposium on Circuits and Systems (ISCAS ’05), vol. 2, pp. 1266-1269, May
2005.
[5] F. Bedeschi, E. Bonizzoni, G. Casagrande, R. Gastaldi, C. Resta, G. Torelli and D. Zella, “SET
and RESET pulse characterization in BJT-selected phase-change memories”, Proceedings of the
IEEE International Symposium on Circuits and Systems (ISCAS ’05), vol. 2, pp. 1270-1273, May
2005.
[6] D. Baderna, A. Cabrini, G. Torelli and M. Pasotti, “Efficiency comparison between doubler
and Dickson charge pumps”, Proceedings of the IEEE International Symposium on Circuits and
Systems (ISCAS ’05), vol. 2, pp. 1891-1894, May 2005.
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[7] R. Arona, E. Bonizzoni, F. Maloberti and G. Torelli, “Heap charge pump optimisation by a
tapered architecture”, Proceedings of the IEEE International Symposium on Circuits and Systems
(ISCAS ’05), vol. 2, pp. 1903-1906, May 2005.
[8] F. Bedeschi, R. Bez, C. Boffino, E. Bonizzoni, E. C. Buda, G. Casagrande, L. Costa, M.
Ferraro, R.Gastaldi, O. Khouri, F. Ottogalli, F. Pellizzer, A. Pirovano, C. Resta, G. Torelli and M.
Tosi, “4-Mb MOSFET-selected µtrench phase-change memory experimental chip”, IEEE Journal
of Solid-State Circuits, vol. 40, pp. 1557-1565, July 2005.
[9] A. Cabrini, L. Gobbi and G. Torelli, “A theoretical discussion on performance limits of CMOS
charge pumps”, Proceedings of the European Conference on Circuit Theory and Design (ECCTD
’05), vol. 2, pp. 35-38, August-September 2005.
CMOS MONOLITHIC ACTIVE PIXEL SENSORS FOR CHARGED PARTICLE
TRACKING APPLICATIONS
C. Andreoli, M. Manghisoni, E. Pozzati, L. Ratti, V. Re, V. Speziali, G. Traversi
Monolithic active pixel sensors (MAPS) in CMOS technology are considered very promising as
a replacement or a valid competitor with CCD detectors in many applications. The main reason for
the ever growing interest in CMOS MAPS lies in the opportunity of integrating analog and digital
processing electronics together with the sensor array in the same substrate, taking advantage of the
large scale of integration and low power dissipation available through commercial, low-cost CMOS
processes. In the last few years, many efforts were made to extend the application field of CMOS
MAPS to high-granularity particle detection in high energy physics experiments. The interest of
the particle physics community for monolithic active pixel sensors stems from them being a possible solution to the material budget issue put forward by the experiments to be run at the future
colliders. This research activity is concerned with the feasibility study of a new implementation
of CMOS monolithic active pixel sensors (MAPS) for applications to charged particle tracking.
As compared to standard three MOSFET MAPS, where the charge signal is read out by a source
follower, the proposed front-end scheme relies upon a charge sensitive amplifier (CSA), embedded
in the elementary pixel cell, to perform charge-to-voltage conversion. The area required for the
integration of the front-end electronics is mostly provided by the collecting electrode, which consists
of a deep n-type diffusion, available as a shielding frame for n-channel devices in deep submicron,
triple well CMOS technologies. Based on the above concept, a chip, which includes several test
structures differing in the sensitive element area, has been fabricated in a 0.13 µ m CMOS process.
Tests with laser and radioactive sources have demonstrated that the sensor is capable of detecting
ionizing radiation. A new chip, addressing noise and gain issues which were reised by the first prototype, has been designed and submitted. The chip, besides a number of single cell test structures,
also includes an 8 by 8 pixel matrix, which will be useful to study the charge collection properties
of the device.
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[1] L. Ratti M. Manghisoni, V. Re, V. Speziali, G. Traversi, S. Bettarini, G. Calderini, R. Cenci, M.
Giorgi, F. Forti, F. Morsani, G. Rizzo, “Monolithic pixel detectors in a 0.13 µm CMOS technology
with sensor level continuous time charge amplification and shaping”, presented at the 10 th European
Symposium on Semiconductor Detectors, Wildbad Kreuth, Germany, 12-16 June 2005.
[2] L. Ratti, M. Manghisoni, V. Re, V. Speziali, G. Traversi “Non-standard approach to charge
signal processing in CMOS MAPS for charged particle trackers”, 2005 IEEE Nuclear Science Symposium Conference Record, Volume 2, October 23-29, 2005, pp. 969-973.
[3] G. Rizzo, S. Bettarini, G. Calderini, R. Cenci, M. Giorgi, F. Forti, F. Morsani, M. Manghisoni,
L. Ratti, V. Re, V. Speziali, G. Traversi, “A Novel Monolithic Active Pixel detector in 0.13 µm
CMOS Technology with Sensor Level Analog Processing”, presented at the Pixel 2005 International
Workshop on Semiconductor Pixel Detectors for Particles and Imaging, Bonn, Germania, 5-8 Sept.
2005.
[4] G. Rizzo, G. Batignani, S. Bettarini, L. Bosisio, M. Carpinelli, G. Calderini, R. Cenci, F. Forti,
G. Giacomini, M.A. Giorgi, L. Lanceri, A. Lusiani, M. Manghisoni, G. Marchiori, F. Morsani, N.
Neri, E. Paoloni, I. Rachevskaia, M. Rama, L. Ratti, V. Re, G. Simi, V. Speziali, G. Traversi, J.
Walsh, L. Vitale, “Triple well CMOS active pixel sensor with in-pixel full signal analog processing”,
2005 IEEE Nuclear Science Symposium Conference Record, Volume 3, October 23-29, 2005, pp.
1485-1489.
[5] S. Bettarini, G. Calderini, R. Cenci, M. Giorgi, F. Forti, F. Morsani, G. Rizzo, M. Manghisoni,
L. Ratti, V. Re, V. Speziali, G. Traversi,“Monolithic Active Pixel detector in 0.13 µm triple well
CMOS Technology”, presented at the Vertex 2005, Chuzenji Lake, Nikko, Giappone, 8 Nov. 2005.
[6] G. Traversi, M. Manghisoni, L. Ratti, ”Sensori monolitici a pixel attivi in tecnologia CMOS
da 0.13 µm con elettronica di lettura integrata”, presented at the Riunione Nazionale Gruppo
Elettronica, Giardini Naxos (ME), Italia, 30 giugno - 2 luglio 2005.
CHARACTERIZATION OF DEEP SUBMICRON CMOS TECHNOLOGIES
C. Andreoli, E. Baldi, M. Manghisoni, E. Oberti, L. Ratti, V. Re, V. Speziali, G. Traversi
Deep submicron CMOS technologies are today widely used in mixed-signal front-end systems.
They provide the required integration density and are very promising in terms of radiation hardness. This observation is related to the thickness reduction of both the gate and isolation dielectric
layers, making them less susceptible to ionization damage. As far as analog performances are concerned, the trend toward device scaling brings along the need of understanding the noise properties
of transistors with channel length of a few tenth of a micron. In the framework of this research
program, an accurate model for the noise behavior of deep submicron CMOS devices has been
developed, paying particular attention to short-channel effects and to parasitic contributions from
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gate and substrate resistance. The model has been assessed through an extensive comparison with
experimental results. Devices belonging to a BiCMOS process with minimum channel length of
0.35 µm and to CMOS processes with minimum length of 0.25, 0.18 and 0.13 µm were characterized. Noise measurements have been carried out by means of a purposely developed wide band
transimpedance amplifier. Furthermore, the study of the experimental noise data relevant to P and
N-channel MOSFETs operated in weak and moderate inversion was used to extract design criteria
for low-noise, low-power analog blocks. Special attention is given to the bheavior of white and 1/f
components in the noise voltage spectrum.
An interesting point is to verify if standard open structure devices can be safely used in rad-hard
circuit without implementing any special readiation hard tecnique. CMOS transistors belonging
to the mentioned technologies were irradiated with γ-rays from a 60 Co source and with 10 keV
X-rays; subsequent changes in static, signal and noise parameters have been monitored. The results demonstrated that gate oxide thinning brings about improved radiation hardness as far as
ionization damage is concerned.
[1] M. Manghisoni, V. Re, L. Ratti, V. Speziali, G. Traversi, “0.13 µm CMOS Technologies
for Analog Front-end Circuits in LHC Detector Upgrades”, Proceedings of the 11 th Workshop on
Electronics for LHC Future Experiments, pp. 42-46, Heidelberg (Germany), 12-16 Sep. 2005.
[2] M. Manghisoni, L. Ratti, V. Re, V. Speziali, G. Traversi, “Noise Performances of 0.13 µm
CMOS Technologies for Detector Front-end Applications”, 2005 IEEE Nuclear Science Symposium
Conference Record, Volume 2, October 23-29, 2005, pp. 955-959.
[4] V. Re, M. Manghisoni, L. Ratti, V. Speziali, G. Traversi, “Design criteria for low noise frontend electronics in the 0.13 µm CMOS generation”, presented at the 10 th European Symposium on
Semiconductor Detectors, Wildbad Kreuth, Germany, 12-16 June 2005.
[5] V. Re, M. Manghisoni, L. Ratti, V. Speziali, G. Traversi, “Total Ionizing Dose Effects on the
Analog Performances of a 0.13 µm CMOS Technology”, Proceedings of the Radiation Effects Data
Workshop, 2005. IEEE, pp. 122-126, 11-15 luglio 2005.
DEVELOPMENT OF A DETECTOR COMPATIBLE MONOLITHIC
TECHNOLOGY FOR FRONT-END ELECTRONICS INTEGRATION ON
HIGH-RESISTIVITY SILICON
E. Baldi, M. Manghisoni, L. Ratti, V. Re, V. Speziali, G. Traversi
Monolithic integration of detectors and front-end electronics on the same chip can greatly improve the mechanical stability of readout systems, as well as enhance their noise performance by
minimizing the stray capacitance due to the connections between detectors and preamplifiers. Fabrication of multichannel chips with integrated sensors, providing analog signal processing, data
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sampling and multiplexing and output serialization might be useful to simplify the wire bonding
step and relax the constraints relevant to the bonding pad size. Moreover, in a present-day complex
detection apparatus, monolithic integration of radiation sensors may provide the required mechanical stability and reliability. This research program aims to fabricate strip detectors with integrated
electronics on high resistivity silicon, for imaging applications and charged particle tracking in high
energy physics experiments. The activity is focused on the design and the experimental characterization of readout electronics. Static, small signal and noise characteristics of JFET test structures
with different gate length and width, fabricated by the Istituto per la Ricerca Scientifica e Tecnologica (IRST) Trento, have been measured. Charge preamplifiers, featuring different reset techniques
in the feedback network were characterized from the standpoint of equivalent noise charge. The
pre-existing fabrication process has recently been modified to enhance circuit noise behavior. The
experimental characterization of devices from this new process has shown a sizeable improvement
in their noise performances, demonstrating the feasibility of low-noise analog readout electronics
on high resistivity substrate.
Radiation tolerance has also been evaluated through irradiation tests with 60 Co γ-rays and 27 MeV
protons. Devices and circuits were proven to be extremely radiation hard, as far as small signal
and static parameters are concerned (with the exception of the gate current). Appearance of a
Lorentzian contribution was detected in the low frequency range of the noise spectrum in γ irradiated JFETs. Exposure to protons instead was found to cause a sizeable increase in the 1/f noise
component of the spectrum. Comparison of the effects of γ-rays and protons on the gate current
of JFETs has been used to demonstrate that lattice atom displacement in the device bulk is the
main damage mechanism also in γ irradiated transistors.
[1] G.F. Dalla Betta, M. Boscardin, C. Piemonte, P. Gregori, L. Ratti, N. Zorzi, “An improved
fabrication process for Si-detector-compatible JFETs”,presented at the 10 th European Symposium
on Semiconductor Detectors, Wildbad Kreuth, Germany, 12-16 June 2005.
[2] G.F. Dalla Betta, M. Boscardin, A. Candelori, F. Fenotti, L. Pancheri, C. Piemonte, L. Ratti, N.
Zorzi, “An Improved Fabrication Technology for Silicon Detectors with Integrated JFET/MOSFET
Electronics”, 2005 IEEE Nuclear Science Symposium Conference Record, Volume 3, October 23-29,
2005, pp. 1422-1426
LOW-NOISE, MIXED-SIGNAL CMOS READOUT CHIPS FOR THE BABAR
AND THE BTEV SILICON STRIP DETECTORS
M. Manghisoni, E. Pozzati, L. Ratti, V. Re, V. Speziali, G. Traversi
The readout chip for the microstrip detector of the BaBar experiment has been designed in
a Honeywell rad-hard CMOS technology. The circuit has been developed in the frame of a collaboration between the University of Pavia, the Lawrence Berkeley National Laboratory and the
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University of California at Santa Cruz. The chip includes 128 analog processing channels, and
a digital section for the data storage and sparse readout. The analog section, besides low-noise
preamplification and shaping, implements an analog-to-digital conversion system based on the
Time-over-Threshold (ToT) technique. The chip was proven to stand up to 2.4 Mrad integrated
dose of 6 0Co γ rays (equivalent to a ten year worst-case operation in the BaBar beam line), without
showing any sizable performance degradation. The complete readout system was installed in the
beam line at the Stanford Linear Accelerator Center (USA) at the beginning of 1999 and the BaBar
experiment began taking data in May 1999. New radiation damage studies have been performed
recently, confirming that the chip can be operated at the high luminosity levels of the PEP-II
collider. The BaBar SVT is contributing in a significant way to the system tracking capabilities,
allowing CP-violation detection and other precision measurements to be performed.
The front-end processing of the signals from the silicon strip detector in the BTeV experiment
at the Fermi National Accelerator Laboratory (Fermilab) will be performed by custom-designed
ICs. The readout chip has been developed in the frame of a collaboration between the University
of Pavia, the Istituto Nazionale di Fisica Nucleare and the Electrical Engineering Department of
the Particle Physics Division at Fermilab. The Fermilab Silicon Strip Readout (FSSR) chip is a
mixed-signal circuit with an area of 7.27×4.46 mm2 . The analog section of the FSSR core consists
of 128 channels, each connected to a detector strip. The signals from the strips, after amplification and shaping, are compared to a preset threshold, generating a logic 1 at the output if a
signal exceeding the threshold is detected. A symmetric baseline restorer is included to achieve
baseline shift suppression but it can be bypassed by a programmable switch. An additional 3 bit
information is provided by a flash-ADC. The charge sensitivity of the channel can be programmed
either to 100 mV/fC or 150 mV/fC by acting on the preamplifier feedback capacitance and the
peaking time of the signal at the shaper output can be selected among three values (60 ns, 85 ns,
125 ns). In this way the noise performances of the chip can be optimized according to the signal
occupancy, preserving the required efficiency. The chip was designed and fabricated in the TSMC
CMOS 0.25 µm technology. The analog section of the chip was simulated and optimized from
the standpoint of noise, comparator threshold dispersion and sensitivity to variations of process
parameters. The first FSSR prototype was submitted in July 2003 and a second version of the
chip, the FSSR2, has been submitted at the end of 2004. During 2005 this second version has been
thoroughly characterized through charge scan tests for equivalent noise charge (ENC) and threshold
dispersion measurements. Results were found to be in agreement with the design specifications. In
order to investigate whether the circuit is suitable to be operated in harsh radiation environment,
some sample of the FSSR2 were exposed to γ-rays from a cobalt 60 source. Irradiation did not
seem to affect to any extent the properties of the circuit confirming the extremely high radiation
tolerance featured by the FSSR2 chip.
[1] L. Ratti, V. Re et al., “Lessons learned from BaBar silicon vertex tracker, limits, and future
perspectives of the detector”, IEEE Trans. Nucl. Sci., vol. 52, pp. 787-792, Jun. 2005.
[2] L. Ratti, V. Re et al., “New Effects Observed in the BaBar Silicon Vertex Tracker: Interpretation
and Estimate of Their Impact on the Future Performance of the Detector”, IEEE Trans. Nucl.
Sci., vol. 1, pp. 73-77, Oct. 2005.
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[3] L. Ratti, V. Re et al., “Radiation damage studies for the BaBar Silicon Vertex Tracker”, Nucl.
Instrum. Methods, vol. A549, pp. 11-15, 2005.
[4] L. Ratti, V. Re et al., “What can be learned from the BABAR Silicon Vertex Tracker running
experience”, Nucl. Instrum. Methods, vol. A552, pp. 224-231, 2005.
[5] R. Yarema, J. Hoff, A. Mekkaoui, M. Manghisoni, V. Re, P.F. Manfredi, L. Ratti, V. Speziali,
“Fermilab Silicon Strip Readout Chip for BTeV”, IEEE Trans. Nucl. Sci., vol. 52, pp. 799-804,
Jun. 2005.
[6] L. Ratti, M. Manghisoni, V. Re, G. Traversi, A. Candelori, “Radiation hardness test of FSSR,
a multichannel, mixed signal chip for microstrip detector readout”, presented at the 8 th European
Conference on Radiation and Its Effects on Components and Systems, Palais des Congr., Cap
d’Agde, France, 19-23 September 2005.
[7] V. Re, M. Manghisoni, L. Ratti, J. Hoff, A. Mekkaoui, R. Yarema, “FSSR2, a Self-Triggered
Low Noise Readout Chip for Silicon Strip Detectors”, 2005 IEEE Nuclear Science Symposium
Conference Record, Volume 2, October 23-29, 2005, pp. 896-900.
CHARACTERIZATION OF A SILICON ON INSULATOR BICMOS
TECHNOLOGY FOR RADIATION TOLERANT APPLICATIONS
M. Manghisoni, E. Oberti, L. Ratti, V. Re, V. Speziali, G. Traversi
Silicon on insulator (SOI) technologies are considered very promising as far as monolithic circuit
scaling is concerned. They ensure virtually perfect isolation through dielectric separation of transistors, which results in higher integration density compared to that achieved in conventional bulk
processes. Moreover, fabrication of the devices on an insulating layer improves their speed because
of the reduced amount of stray capacitance and can enhance single event effect (SEE) tolerance,
which is of particular interest to digital applications (but also, albeit to a much lesser degree, to
analog ones). On the other hand, silicon on insulator technologies cannot guarantee any higher
resistance to total dose effects, which represent a major concern to analog systems, than standard
production processes. In order to prevent radiation induced drift of analog circuit parameters from
determining circuit malfunction or ending up in catastrophic failure of the entire system, total dose
testing has to be considered mandatory whenever radiation-hard applications are envisioned. The
radiation tolerance of bipolar junction transistors and CMOS devices belonging to a BiCMOS SOI
process was studied by exposing the sample devices to 60 Co γ-rays and monitoring the behavior
of the main static and small signal parameters. Bipolar transistors were also exposed to 27 MeV
protons at the SIRAD facility in Legnaro, at the INFN National Laboratories. Final integrated
doses and fluences are compatible with operation in the space environment and in high energy
physics experiments involving moderately high radiation levels. The issue of enhanced low dose
rate sensitivity (ELDRS) has been addressed by a thorough characterization of transistors exposed
to 60 Co sources with different activities. Low dose rate sensitivity effects have to be taken into
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account when testing semiconductor devices for radiation tolerance. As a matter of fact, irradiating
transistors and circuits with higher dose rates than those encountered in the actual applications
they are designed for, might lead to underestimating the effects of radiation on the technology
under investigation. Besides degrading static and signal parameters, operation in harsh radiation
environment may impact on the noise performances of devices and circuits. Therefore, parallel
and series noise spectrum referred to the device base were measured, with the aim of studying the
effects of radiation on the most sensitive parameters, namely 1/f noise in the base current.
[1] M. Manghisoni, E. Oberti, L. Ratti, V. Re, V. Speziali, G. Traversi, G. Fallica, R. Modica, “Response of SOI bipolar transistors exposed to γ-rays under different dose rate and bias conditions”,
IEEE Trans. Nucl. Sci., vol. 52, no. 4, pp. 1040-1047, Aug. 2005.
NOISE IN CIRCUITS AND SYSTEMS
G. Martini, V. Svelto
Noise in VCO and PLL
Noise properties of VCO and PLL, key components of modern telecommunication systems, have
been studied. Noise due to internal white noise sources in steady-state oscillators is well described
by random walk phase noise, that causes zero-crossing jitter, plus amplitude noise, that is usually
negligible in applications. In VCO, the control voltage does affect not only the frequency, but noise
sources too; starting from this observation, accounting for the intermodulation between control
signal and noise sources, a model for phase noise in VCO when a time varying control signal is
applied has been developed and tested with simulations. Preliminary results regarding square wave
modulation are available for now.
Noise figure control in LNA
Continued in 2005 the cooperation with the RF Group on the study of noise figure control techniques
in LNA, mainly for cellular phones and portable terminals. In the context of re-configurable
multistandard, multi-frequency applications, the portable terminal should adapt itself, in addition
to changes in the frequency band of operation, to other time-varying RF environmental conditions,
such as signal strength and blockers strength. Aiming at power consumption reduction, the frontend, and the LNA in particular, should not be designed to operate always at minimum noise figure,
since noise figure is almost always reduced at the cost of higher power consumption. Significant
power saving can be achieved by allowing noise figure to rise, without affecting the quality of the
received information, when certain signal strength and blockers strength combinations are met, e.g.
strong signal and weak blockers. Publication of the results is expected in 2006.
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STUDY OF THE POSTURE OF A SUBJECT SIT ON OFFICE CHAIRS
G. M. BERTOLOTTI, R. GANDOLFI, R. LOMBARDI, M. TESTA, M. DE PAU
The study of the posture of a subject sitting on a chair during his/her office activity is one of
the most analysed ergonomic topics on literature. The need to be seated for several hours at a
PC or a workstation makes this aspect mandatory to keep correct and healthy working consitions
within an office. Our work aims to study the influence of different materials by which chairs
are realised, on the operator posture, analysing the surface electromiography and designing an
innovative instrument for the characterisation of the subject’s spinal column.
[1] G. M. BERTOLOTTI, R. GANDOLFI, R. LOMBARDI, M. TESTA, M. DE PAU Studio della
postura su sedie per ufficio Proc. of ”L’ERGONOMIA TRA INNOVAZIONE E PROGETTO,
Sistemi di lavoro e stili di vita”, VIII National Congress of Societ Italiana Ergonomia, Politecnico
di Milano - Facolt del Design, february 9th-11th 2006.
ARTIFICIAL TUFT FOR FOOTBALL PITCHES: BIOMECHANIC STUDIES
G.M. BERTOLOTTI, E. CASTELLINI, R. GANDOLFI, R. LOMBARDI, M. TESTA
In last years articial tuft is frequently emplyoed in football pitches on which amateur teams
play composed by young people whose muscular and skeletal system is growing. In literature only
very few studies analyse if these picthes are better or not than ”natural” ones, if they are more
tiring, what are the effects on football players, which shoes are required and so on. None of these
studies, anyway, is exhaustive. The Italian National Amateur League (LND/FIGC) commissioned
us a research activity to try to answer to these questions.
[1] G.M. BERTOLOTTI, E. CASTELLINI, R. GANDOLFI, R. LOMBARDI, M. TESTA Campi
da calcio in erba sintetica: studi biomeccanici Proc. of ”L’ERGONOMIA TRA INNOVAZIONE E
PROGETTO, Sistemi di lavoro e stili di vita”, VIII Congresso nazionale Societ Italiana Ergonomia,
Politecnico di Milano - Facolt del Design, 9-11 febbraio 2006.
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FPGA BASED ACCELERATORS FOR INTENSIVE COMPUTING
APPLICATIONS
G. DANESE, M. GIACHERO, F. LEPORATI, N. NAZZICARI, A. SARTORI
Single chip smart cameras have recently begun to appear and reach the market. These devices
are complete System-on-Chip [SoC] capable of acquiring images at high speed and performing all
the computation required to give users a set of high-level informations about the scene. The attractiveness of these devices comes from their low-cost, small-size and high-speed characteristics,
making them particularly suitable for consumer applications (such as providing supplemental informations to drivers when installed on a car) where the user must not be aware of the computational
aspect. Our goal is to deeply analyze the architecture of the VISoc, a SoC developed by NeuriCam,
exploiting its weaknesses, and improving it to achieve better performances.
[1] G. DANESE, M. GIACHERO, F. LEPORATI, N. NAZZICARI, A. SARTORI EFFICIENT
DATA FEEDING FOR SMART VISION SYSTEM Proc. of Work in Progress Session Euromicro
Coneference on Digital System Design (DSD05), Porto, Settembre 2005, pp. 30-32. ISBN: 3902457-09-0.
DISCRETE AND INTEGRATED POWER ELECTRONICS SYSTEMS
E. Dallago, G. Sassone, G. Venchi
Power electronics basically deals with converting and controlling the electrical energy that flows
from a source to a load. The amount of energy required by the load varies over a wide range, going
from a fraction of W in portable applications to hundreds of kW in electrical drives. As a result,
many different solutions, techniques and approaches have been developed to ensure the qualities of
efficiency, power density and flexibility required by various applications. When efficiency is a key
requirement and a switching converter needs to be adopted, soft switching topologies are widely
employed.
The research activity focused on topics which were started in the previous years and on new
subjects.
A current-mode switching power stage, based on the Sigma-Delta modulation technique, for
audio applications has been realized. Experimental characterization of a discrete prototype shows
interesting features in terms of linearity, noise and power efficiency. The study and the experimental
results are reported in paper [1].
Another chance to apply Sigma-Delta Modulation in power electronics circuits came from the
control of a switched mode current loop designed to drive the Voice Coil Motor (VCM) in Hard
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Disk Drive (HDD) applications. Started a few years ago, this mid-term project delivered a fully
integrated switching power stage and control, replacing the linear stage presently used in HDDs.
In the proposed system the power stage is a zero voltage transition full bridge which is driven by a
current loop. The implementation of a Sigma-Delta modulator to drive the power stage switches,
because of its variable switching frequency operation, allowed us to decrease the likelihood of
interference with the channel circuitry. Furthermore, working at a fixed clock is suitable for driving
a resonant power stage. Different output slopes were tested. It was demonstrated that quite a high
output voltage slope (up to 500 V/µs) can be used without affecting the original performance.
Issues concerning loop stability, the characteristics of the current sensing stage, its optimization
in general and in this application have also been discussed. The results presented in [2] indicate that
the filter and current sensing stage needed for the application does not have critical specifications.
A high frequency, soft switching buck converter using IGBTs was studied. The proposed topology exploits an auxiliary IGBT and two saturable reactors to obtain fully soft switching behaviour
for both the main and the auxiliary switches. This property allows IGBTs to be used at switching
frequencies between 80 and 100kHz, having an overall efficiency above 90% in a 300V in, 80V out,
800W output power converter. This study is currently being completed with a small signal analysis of the converter, in order to explain an open loop oscillating behaviour which was observed
experimentally in an output current range.
A research activity about pulsed power supplies to be used in a medical synchrotron was started
with CNAO foundation (Centro Nazionale di Adroterapia Oncologica). In particular the power
supply for the beam chopper system was investigated. It is used to energize four magnets connected
in series for blanking the beam during both during routine operation and for emergency.
Most of the activities described required the support of thermal analyses and measurements.
These skills form part of expertise that has been accumulated over the years in the course of a
variety of research activities.
[1] Dallago, E.; De Leo, G.; Sassone, G.; ”A current-mode power sigma-delta modulator for audio
applications”, IEEE Transactions on Industrial Electronics, Vol. 52, Issue 1, Feb. 2005, pp.236-242.
[2] E. Dallago, G. Venchi: ”Sigma-delta switching power system to drive voice coil motor in hard
disk drives”, IEE Proceedings Circuits, Devices and Systems, Vol. 152, n. 6, 9 Dec. 2005, pp.
673-681.
MAGNETIC SENSORS AND MICROSENSORS
E. Dallago, P. Malcovati, M. Marchesi, G. Venchi, F. Borghetti, A. Baschirotto
Research activity into low power magnetic field sensors has continued. The target application
for the studied sensor was an electronic compass that had to detect a magnetic field (±60µT fullscale). The activity focused on fluxgate magnetometers because they represented the best trade-off
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between cost and performance. While the basic fluxgate geometry is based on a wound core, planar
structures that are particularly suitable for integration have been presented in literature.
A PCB double axis Fluxgate magnetic sensor has been realized and analyzed with a software
tool based on the finite element method. The simulations showed a good agreement with the
experimental results, therefore the same software has been used to evaluate the performance of
a micro-integrated version of the double axis Fluxgate. The simulation results predict that the
micro-integrated sensor will have enough sensitivity for sensing the Earths magnetic field, with a
power consumption two orders of magnitude lower than the PCB version. The accurate use of the
simulation tools allows 75% area saving for the IC version with respect to the direct scaling of the
PCB version, as well as a strong reduction of the power consumption [2].
A complete micro-integrated magnetometer (Fluxgate magnetic sensor and readout circuitry)
was realized [1], [3]. The ferromagnetic core for the sensor, realized as a post-processing step with
the DC magnetron sputtering deposition, has been characterized, showing that the properties of
the material after deposition are still suitable for the correct operation of the device. Moreover,
the integrated readout circuitry has been realized and characterized.
[1] A. Baschirotto, E. Dallago, P. Malcovati, M. Marchesi, G. Venchi, ”Micro-integrated double
axis planar fluxgate”, presented paper at the conference AISEM 2005, Firenze 15 - 17 February
2005, to be published by World Scientific Press.
[2] A. Baschirotto, E. Dallago, P. Malcovati, M. Marchesi, G. Venchi, ”From a PCB Fluxgate to
an integrated micro Fluxgate magnetic sensor”, Proceedings of Instrumentation and Measurement
Technology Conference (IMTC-2005), Ottawa (Canada) 17 - 19 May 2005, pp. 1756-1760.
[3] A. Baschirotto, F. Borghetti, E. Dallago, P. Malcovati, M. Marchesi, E. Melissano, G. Venchi
and P.Siciliano, ”Fluxgate magnetic sensor and front-end circuitry in a micro-integrated system”,
Proceedings of EUROSENSORS XIX Conference, Barcelona (Spain), 11-14 September 2005.
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PERUGIA
Dipartimento di Ingegneria Elettronica e dell’Informazione (DIEI)
Research topics
1) SENSORS AND MICROSYSTEMS
F. Alimenti, L. Bissi, M. Cicioni, N. Cirulli, E. Morganti, D. Passeri, M. Petasecca, M. Piccioni,
G. U. Pignatel, P. Placidi, L. Roselli, A. Scorzoni
Collaborations: Unità GE di Parma, CNR-IMM Sez. di Bologna, Unità GE di Bari, INFN-PG,
INFN-FI, INFN-TS, CERN-CH, IRST-TN, ISS-Roma
Other sources of funding: MIUR, INFN, CNR, European Commission
2) HIGH FREQUENCY ELECTRONIC CIRCUITS AND SYSTEMS DESIGN
F. Alimenti, V. Palazzari, F. Placentino, L. Roselli, A. Scarponi, A. Scorzoni
Collaborations: Unità GE di Parma, Unità GE di Pisa, Unità GE di Modena e Reggio Emilia
Other sources of funding: MIUR, WiS s.r.l.
3) SIMULATION AND MEASUREMENTS OF SILICON AND SILICON CARBIDE
DEVICES
F. Moscatelli, D. Passeri, M. Petasecca, G. U. Pignatel, A. Scorzoni
Collaborations: CNR IMM-Sez. di Bologna, Unità INFN di Perugia, Bologna, Firenze, Milano,
CERN-CH
Other sources of funding: INFN, CNR-IMM Sez. di Bologna
4) FAST ELECTROMIGRATION TESTS
A. Scorzoni
Collaborations: CNR IMM-Sez. di Bologna, STMicroelectronics
Other sources of funding: STMicroelectronics
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SENSORS AND MICROSYSTEMS
F. Alimenti, L. Bissi, M. Cicioni, N. Cirulli, E. Morganti, D. Passeri, M. Petasecca,
M. Piccioni, G. U. Pignatel, P. Placidi, L. Roselli, A. Scorzoni
This design activity has been mainly focused on the following issues.
i) CMOS Radiation Active Pixel Sensors
[Motivations] The suitability of CMOS sensors for the detection of radiations of different energies
has been recently investigated. Actually, the fundamental characteristic of CMOS radiation sensors,
which make these sensors versatile, is the possibility to locally couple the single sensing element
(typically featuring a reverse-biased pn junction of reduced dimensions and realized on CMOS substrate) with a certain number of active devices (transistors) that typically act as amplifiers/buffers
of the electric signal generated from an incident radiation. This approach has turned out particularly interesting for the detection of ionising particles in high-energy physics experiments and/or
for various imaging applications.
[Description of the activity] CMOS Active Pixel Sensor (APS) systems have been designed and
fabricated in a commercial 0.18 micron CMOS technology. TCAD tools have been thoroughly
exploited during the design phase to optimize the geometrical features of the sensing element,
in terms of signal to noise ratio at the pixel output. Innovative active pixel architectures have
been introduced, specifically tailored for triggering applications and sparse read-out schemes. In
particular, self-reset and event triggered operation modes have been devised and implemented.
[Objectives and results] Preliminary test results have shown satisfactory response of the sensor
to alpha, beta, gamma x-rays and IR stimuli, with promising performance in terms of signal to
noise ratio. Extensive test of the second chip prototypes are under way: statistical characterization,
dynamic performance and radiation damage tolerance are being evaluated, allowing for applicationoriented next generation chip design.
ii) Electronic circuts devoted to control and to process information acquired by sensors
[Motivations] Detection of gases or vapors in air is becoming important mainly in the context of
environment control and safety. Nowadays, a great effort is devoted to low-cost, compact instruments that can detect the presence of chemical compounds and pollutants. Gas sensors deposited
on micromachined substrates are widely used in environmental gas sensing applications, being suitable for the detection of volatile organic compounds, CO, NO2 and other pollutant species. They
typically exploit a modification of the resistance of a semiconducting metal oxide in the presence
of specific oxidizing or reducing gases. On the other hand, the sensitivity and selectivity of the
sensing element strongly depend on its temperature, which is usually determined by a microheater
integrated in the sensor’s structure.
[Activity and results] A microcontroller-based system designed for detecting ambient pollutant
species through an array of gas sensor has been developed. The management of the system basically
follows the IEEE 1451 directives. The system is based on a microcontroller local network, an
advantage of this architecture is the modularity of the system. A multisensor system is preferred
because a single sensor does not react selectively to a singular target gas inside a mixture, but also
to other interfering gases, therefore sensor redundancy helps in improving the performance of the
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gas detector. The Smart Transducer Interface Module (STIM) controls and acquires data from an
array of gas sensors, it is composed of a central controller connected via I 2 C (Inter-IC bus) interface
to up twelve ‘monosensor’ subsystems. Each ‘monosensor’ subsystem detects the concentration of
a particular kind of gas and is based on a microcontroller called satellite. The main functions of
the satellites are i) to control the sensor operating temperature T op , by applying a programmable
voltage reference (Vref ), ii) to measure the resistance of the sensitive element, iii) to execute a selfcalibration procedure and iv) to communicate the measured values to the controller. To simplify
the communication between the STIM and the Network Capable Application Processor (NCAP)
the RS232 serial interface has been used to emulate the complex Transducer Independent Interface
(TII), defined in the IEEE 1451.2 standard. An NCAP module emulator is realized through a
LabView Development SystemTM Virtual Instruments (VI) on a personal computer featuring an
RS232 serial interface communication.
iii) MEMS design
[Motivations] Diffusion of Microelectromechanical Systems (MEMS) in the daily-life is ever increasing. In fact MEMS are used in ink-jet printers, in air-bags, in the rear-projection TVs and
in the field of the sensors. MEMS are realized by exploiting micromachining techniques. Their
small dimensions entail remarkable advantages, above all in the fluidic field. In this case, in fact,
only fluid laminar motions are considered and so the fluid behaviour can be predicted with high
precision. For these reasons microfluidic systems are widely utilized in medicine. In this field in
fact it is necessary to control and to use small amounts of liquid. Moreover the Microsystems can
be implanted in the human body and they can be used in the treatment of particular pathologies
like the hydrocephalus, the diabetes or cardiac problems.
[Activity] The aim is to design microfluidic systems, in particular micropumps with high flow-rate.
The micropump is constituted essentially by an actuator and a mobile membrane, that causes the
fluid contained in a pump chamber to move. Two or more valves are used for the introduction
and the expulsion of the fluid. We particularly focused on micropumps actuated by piezoelectric
ceramics. In fact, using the same physical dimensions and the same power operating conditions,
piezoelectric micropumps yield higher actuation forces and better performance. We preferred valves
without moving parts because they are easier to manufacture and because they can be used with
fluids featuring particles in suspension that could hinder the membrane or cantilever movement. We
extracted an equivalent electrical circuit of the micropumps with lumped elements whose values have
been calculated from the physical characteristics of the system. This circuit is useful to estimate
the micropump performances in terms of flow-rate. Then, a finite elements analysis (FEA), made
with ANSYS, allowed us to visualize the mechanical behaviour of the micropump and its critical
aspects as the membrane deflection, the resonance frequency and the experienced stress.
[Results] Using these instruments, we designed a structure with a flow-rate up to 250 µl/s. We
also designed the micropump layout. A first prototype will be realized with the technologies made
available at the SensoNor of Oslo in the framework of an Europractice Multi Project for MEMS.
iv) RF Identification techniques for the logistic chain
[Motivations] In recent years automatic identification procedures have become very popular in
many service industries, purchasing and distribution logistics, industry, manufacturing companies
and material flow systems, goods and products in transit. The traditional barcode labels are being
found to be inadequate in an increasing number of cases. The technically optimal solution would
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be the storage of data in a silicon chip with a contactless data transfer between the data-carrying
device and its reader. In the ideal case, the power required to operate the electronic data-carrying
device would also be transferred from the reader using contactless technology. This kind of system
will be very important in the traceability of foods, in fact the integration of sensors in the flexible
substrate and the possibility to store data in the tag are key issues for continuously monitoring
products quality. The aim of WP6 of the EU GoodFood IP project is to realize a flexible transponder
with sensing capabilities for the logistic chain.
[Activity] Enabling technologies for the realization of sensing systems on flexible substrates have
been studied. A 5-turn, credit card size flexible antenna has been simulated, designed and realized.
Constraints for MOX sensor integration on battery powered flexible tags are: i) Low power consumption; ii) High mechanical stability; iii) Integration and encapsulation must allow the gas to flow
to the sensor. For this purpose, new ultra-low power (ULP) consumption, front-side silicon bulk
micromachined hotplates have been simulated using a finite element simulator. The microhotplates
process masks has been defined and suitable fabrication masks have been designed. Depending on
the required capabilities, the tags may be active (battery powered) or completely passive (RFID
powered).
[Results] The first prototypes of RFID antennas on flexible substrate and front-end circuits were
realized. Design studies and FEM simulations of ULP MOX sensor hotplates have been performed.
Main features of the designed hotplates are: i) Small chip dimensions (0.5 × 1.0 mm 2 for a 4-sensor
array); ii) Very low power consumption (target value ¡ 5 mW for operation at 400 ◦ C). The first
prototypes of sensing RFID tags will be available by the end of the year. Optimization of the
flexible tag approach will allow to address different applications, ranging from food quality tracing
in the logistics chain to security and hazard control in critical environments.
v) Sensor systems for medical imaging applications
In the framework of a national research project funded by the Ministry of University and
Research (MIUR), a prototype sensor consisting of 8 × 8 matrixes of silicon PIN detectors has been
designed. The sensor is optimized for detecting Gamma-rays emitted by a radioactive biological
tracer (99Tc-Tecnetium) at an energy of 140keV. The final goal of the project is to realize a
small gamma-camera for medical imaging applications, like scinti-mammography or small animal
functional imaging.
The detector arrays have been realized at the Institute for Research and Technology (ITCIRST) of Trento, and a first prototype has been assembled under responsibility of the research
unit of Perugia. The whole system includes multi-channel ASIC front-end chips and digital data
acquisition. These parts have been developed by the other partner of the project (namely Poli-BA
and Uni-TS). Preliminary results have been presented to some international conferences.
[1] A. Marras, D. Passeri, G. Matrella, P. Placidi, M. Petasecca, L. Servoli, G.M. Bilei,P. Ciampolini
(2005), ”Advanced Active Pixel Architectures in Standard CMOS Technology”, Nuclear Science,
IEEE Transactions on Volume 52, Issue 5, Part 3, Oct. 2005 Page(s):1869 - 1872 (Digital Object
Identifier 10.1109/TNS.2005.856620).
[2] A. Marras, D. Passeri, P. Placidi, G. Matrella, M. Petasecca, L. Servoli, G.M. Bilei,
P. Ciampolini (2005), ”CMOS-APS for HEP Applications: Design and Test of Innovative Ar-
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chitectures”, Nuclear Science Symposium Conference Record, 2005 IEEE, Volume 3, October 23 29, 2005, Page(s): 1427 - 1430.
[3] L. Bissi, P. Placidi, M. Piccioni, M. Cicioni, A. Scorzoni, L. Roselli, L. Masini, I. Elmi, S. Zampolli and G. C. Cardinali, “A Multi Processor Control System For A Gas Sensing Array”, Proc.
AISEM 2005, February 15-17, 2005, Firenze, Italy.
[4] L. Bissi, P. Placidi, M. Piccioni, M. Cicioni, A. Scorzoni, L. Roselli, L. Masini, I. Elmi, S. Zampolli and G. C. Cardinali, “A Multi Processor Control System For A Gas Sensing Array”, MMDMeeting Matter, Materials and Devices, June 22-25, 2005, Genova, Italy.
[5] L. Bissi, A. Scorzoni, P. Placidi, L. Marrocchi, M. Bennati, S. Zampolli, L. Masini, I. Elmi
and G. C. Cardinali, “Low-cost Distributed Measurement System based on Gas Smart Sensors
for Environmental Monitoring”, 1st International Conference on Sensing Technology (ICST 2005),
November 21-23, 2005, Palmerston North, New Zealand.
[6] E. Morganti, I. Fuduli, A. Montefusco, M. Petasecca and G.U. Pignatel, “Spice modelling
and design optimization of micropumps”, INTERNATIONAL JOURNAL of ENVIRONMENTAL
ANALYTICAL CHEMISTRY (IEAC), Vol.85 (2005) pp.687-698.
[7] E. Morganti, I. Fuduli, M. Petasecca, G.U. Pignatel, “Design of high performance piezoelectric
micropumps”, PROCEEDINGS of the 16th MicroMechanics Europe Workshop (MME05), Goteborg, Sweden, 4-6 September 2005, pp.330-333. ISBN 91-631-7553-3
[8] E. Morganti, G.U. Pignatel, “Microfluidics for the treatment of Hydrocephalus”, PROCEEDINGS of the ”1st International Conference on Sensing Technology” (ICST’05), 21-23 November
2005, Massey University, Palmerston North, New Zealand, pp.483-487. ISBN 0-473-10504-7
[9] S. Zampolli, I. Elmi, G.C. Cardinali, M. Severi, B. Mazzolai, V. Raffa, V. Mattoli, P. Dario,
M. Cicioni, F. Alimenti, L. Roselli, A. Scorzoni, “Flexible Tag Gas Sensing Systems for Food
Logistics Applications”, MMD-Meeting Matter, Materials and Devices, June 22-25, 2005, Genova,
Italy.
[10] Stebel L., Tommasi M., Carrato S., Cautero G., Cirulli N., Pignatel G., Marzocca C., Tauro
A., Dragone A., Corsi F., DallaBetta G., “Development of a prototype detector for use in scintimammography imaging”, PROCEEDINGS of the ”1st International Workshop on Advances in
Sensors and Interfaces” 19-20 April 2005, Bari, Italy. (IWASI-2005) pp.126-130. Editors: D. De
Venuto, B. Courtois - ISBN 88-8231-323-9
[11] Cirulli N., Pignatel G.U., Dalla Betta G.F., Boscardin M., Piemonte C., Zorzi N., Fazzi A.,
“Development of silicon pixel detectors for radio-isotopic molecular imaging”, PROCEEDINGS of
the ”28th International Convention - Conference on Microelectronics, Electronics, and Electronic
Technologies” (MEET-MIPRO 2005), May 30 - June 3, 2005, Opatija, Croatia, pp.65-67 (2005).
ISBN 953-233-011-9
[12] L.Stebel, S.Carrato, G.Cautero, N.Cirulli, G.Pignatel, C.Marzocca, A.Tauro, A.Dragone,
F.Corsi, G.F.Dalla Betta, A.Fazzi, V.Varoli, F.Cusanno, F.Garibaldi, N.Zorzi, “A modular prototype detector for scintimammography imaging”, PROCEEDINGS of the IEEE Nuclear Science
Symposium and Medical Imaging Conference (NSS-MIC-2005), Puerto Rico, 22-29 October 2005,
IEEE Nuclear Science Symposium Conference Record J03-73, pp.3027-3031.
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HIGH FREQUENCY ELECTRONIC CIRCUITS AND SYSTEMS DESIGN
F. Alimenti, V. Palazzari, F. Placentino, L. Roselli, A. Scarponi, A. Scorzoni
[Motivations] The activity carried-out by the research group has mainly been focused on two topics,
namely the design of Radio-Frequency Integrated Circuits (RFIC) in Si/SiGe BiCMOS technology
and the development of a low-cost Doppler radar sensor.
[Activity] With respect to the first topic (RFIC design), a fully integrated transmitter for 5GHz
WLAN applications has been designed and tested, in cooperation with the University of Modena and Reggio-Emilia. The transmitter is constituted by a Gilbert-cell mixer, used for the upconversion of the signal from 1.1GHz to 5.5GHz, a band-stop filter to reject the 3.3GHz frequency
component (difference between LO and IF) and a driver power amplifier, featuring gain variation capability, exploited as output stage. This circuit has been fabricated in the frame of an EuroPractice
mini@sic MPW, using the 0.35 micron Si/SiGe BiCMOS process available at the Austriamicrosystem foundry. The second topic concerns the development of a 24GHz Doppler radar sensor for
automotive (traffic control) applications (traffic control, speed detection and vehicle classification).
In order to reduce the industrial cost as much as possible, technology and manufacturing processes
have been carefully selected before beginning the design flow. As a first point, a discrete component
technology, based on plastic packaged Hetero-Junction FET, SMT Schottky diodes and passive devices, have been adopted in all the active circuitry of the front-end. In this way an automated pick
and place process can be used for the board assembly, with the advantages of a high production
yield at a similar cost of that needed for a low-frequency or digital PCB. The second point is the
choice of a fiberglass reinforced microwave substrate, along with a single layer microstrip technology, to implement all the distributed circuits of the front-end and antennas. The cost of this kind
of substrates, indeed, is less than that of PTFE materials, moreover they can be easily inserted
in a consumer fabrication process, typically tuned for FR4 substrates. From the manufacturing
point of view, the main advantage of fiberglass materials is a superior yield of the via-ground, as a
consequence of a high finishing quality of the drilled-holes.
[Results] The basic building blocks of the integrated transmitter have been initially tested, as separate cells, at wafer-level. Differential measurements have been carried-out using GSGSG probe
tips with 150 micron pitch with external baluns and bias-tees. As a result, the intrinsic mixer
features a conversion gain of 0dB an input 1dB compression point of 0dBm and an input intercept
point of 10dBm. The main figures of merit of the driver power amplifier are: gain equal to 13dB,
output 1dB compression point of 6dBm and output intercept point equal to 16dBm. The gain
control range is about 20dB. In order to characterize the fully integrated transmitter, the chip
has been wire-bonded on a test FR4 board, simulating a real-world application environment (i.e.
packaging and PCB assembly). The tested prototypes exhibit an overall gain of 13.4dB, an input
1dB compression point of -3dBm, and a third-order intercept point of +7dBm. The overall DC
power consumption is 150mW. The doppler radar sensor exploits a Dielectric Resonator Oscillator
characterized by an output power of +9dBm at 24.35GHz, a phase noise of -65dBc/Hz at 10kHz
offset from carrier and a power consumption of 30mA at 3V supply. The receiver is based on a
I/Q homodyne arcitecture with two singly-balanced (rat-race) mixers featuring a conversion loss of
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16dB with a +2dBm cal oscillator drive. A 6dB gain low-noise amplifier is adopted to reduce the
overall receiver noise figure. Outdoor experiments have been made on a first prototype resulting
in a detection range in excess of 100 meters.
[1] V. Palazzari, S. Pinel, M. M. Tentzeris, L. Roselli, J. Laskar and F. Alimenti, “Design of
WLAN Filters in LTCC and LCP System-On-Package Technologies,” in German Microwave Conference, Ulm, (D), Apr. 2005. [2] F. Alimenti, M. Borgarino, R. Codeluppi, V. Palazari, M. Pifferi,
L. Roselli and A. Scorzoni, “Building Blocks for a 5GHz WLAN Transmitter in 0.35 µm Si/SiGe
BiCMOS Technology,” in TARGET Workshop on RF Power Amplifier, Orvieto, (I), Apr. 2005,
vol. 1, pp. 11-14. [3] F. Alimenti, V. Palazzari, L. Roselli and A. Scorzoni, “A 3V Variable Gain
Amplifier in Si/SiGe BiCMOS Technology for 5GHz WLAN Applications,” in International Journal of RF and Microwave Computer-Aided Engineering, Aug. 2005, pp. 412-422. [4] L. Roselli,
F. Alimenti, V. Palazzari, F. Placentino,“Nonlinear Harmonic-Balance (HB) and Finite Difference
Time Domain (FDTD) Co-Simulation of a Low-Cost 24GHz DRO,”in 6th International Workshop
on Computational Electromagnetics in Time Domain, Atalanta, (USA), Sep. 2005, vol. 1, pp.
107-109. [5] L. Roselli, F. Alimenti, M. Comez, V. Palazzari, F. Placentino, N. Porzi, A. Scarponi,“A Cost Driven 24GHz Doppler Radar Sensor Development for Automotive Applications,” in
2nd European Radar Conference, Paris, (F), Oct. 2005, pp. 335-338. [6] F. Alimenti, M. Borgarino, R. Codeluppi, V. Palazzari, M. Pifferi, L. Roselli, A. Scorzoni, F. Fantini,“Design of RFIC
in 0.35 µm Si/SiGe BiCMOS Technology for a 5GHz Domotic Transmitter,” in 8th European Conference on Wireless Technology, Paris, (F), Oct. 2005, pp. 411-414.
SIMULATION AND MEASUREMENTS OF SILICON AND SILICON CARBIDE
DEVICES
F. Moscatelli, D. Passeri, M. Petasecca, G. U. Pignatel, A. Scorzoni
[Motivations] Radiation hardness is a critical design concern for present and future silicon detectors
in high energy physics. Tracking systems at the CERN Large Hadron Collider (LHC) are expected
to operate for ten years and to receive fast hadron fluences equivalent even above 10 16 cm−2 . The
radiation hardness of the current silicon detectors is unable to cope with such an environment.
In particular, during recent years silicon carbide (SiC) has been considered as a potential alternative to Si for the realisation of dosimeters, spectrometers and charge-particle detectors in high
energy physics experiment. As an alternative, silicon could still be used, provided it is kept at low
temperature during operation or if thin detectors are adopted.
In particular, thinned detectors have been proposed to investigate the possibility to limit the full
depletion voltage and the leakage current of the heavy irradiated silicon devices used in the sLHC
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high energy physics experiments. Through new developments in the micromachining technologies
thin detectors (50-100 µm thick) have been produced, representing a radiation hard alternative to
the standard, 300 µm thick silicon detectors.
More recently, in the framework of the RD50 Collaboration (CERN, CH), p-type Magnetic
CZ silicon has been indicated as a more radiation tolerant material. More attention is currently
devoted to this material as an alternative to conventional n-type FZ silicon.
[Activity] As far as silicon carbide detectors are concerned, SiC diodes were fabricated at the IMM
Bologna facility. They underwent irradiation at the Ljubiana facility (Slovenia) with neutrons
featuring fluences between 1014 and 1016 (1 MeV) neutrons/cm2 . The irradiated diodes have been
characterized through the following measurements: I-V, C-V and Charge Collection Efficiency
(CCE) with 90Sr source.
As far as silicon thin detectors are concerned, in order to investigate the performances of these
structures at very high fluencies, simulations have been carried out using the SYNOPSIS DESSIS
device simulator. We consider a 7×1011 cm−3 n-doped substrate (in agreement with the assumption
of a high resistively substrate). All the structures are composed of a 40 µm diode contact and a 15
µm wide guard ring. Radiation damage is described by a three-level model based on V2, V2O, CiOi
deep levels. We simulate the behaviour of the depletion voltage and leakage current as a function
of fluence. Charge collection efficiency simulations are also performed.
Regarding p-type silicon detectors, an activity concerning the development of a radiation damage model based on SRH statistics has been initiated in the framework of a national research project
called SMART.
[Results] As far as silicon carbide detectors are concerned, ¿From forward direction I-V measurements and C-V measurements we noted that the neutrons caused a significant trap density that
compensate the initial doping even for fluences of 1014 n/cm2 . The material behaves as if it was
intrinsic. The reverse current at 500 V in irradiated diodes is less than that in the virgin samples.
This is a noticeable advantage with respect to Si-diodes that show a noticeable increase of the
reverse current after irradiation.
Through CCE measurements we found that the collected charge is very good till fluences of the
order of some 1014 n/cm2 (2800 e− out of 3100 e− after a fluence of 1014 n/cm2 , with a CCE=90%),
while it decreases noticeably for fluences greater than 1015 n/cm2 (800 e− after a fluence of 1.5×1015
n/cm2 ). The material is strongly compensated and the charge collection occurs as an effect of the
electric field. For high fluences the trapping due to defects cause a significant decrease of the
collected charge which results very low for fluences of some 1015 n/cm2 (300 e− and 100 e− for
fluences of 3 × 1015 n/cm2 and 1016 n/cm2 , respectively). The samples also underwent thermal
cycles at 80◦ C to verify if a damage recovery occurs in irradiated samples, as in the case of silicon
samples. The current furtherly dicreases, while the charge collection efficiency slightly increases
but not enough (from 1330 e− to 1400 e− for a fluence of 7 × 1014 n/cm2 after 4000 minutes at
80◦ C).
As far as silicon thin detectors are concerned, in the framework of the CERN RD50 Collaboration we compared simulation results with experimental data obtaining a good agreement both for
the depletion voltage and leakage current as a function of the fluence and for the Charge Collection
Efficiency for fluencies up to 2.5 × 1014 neutrons/cm2 .
Regarding p-type silicon detectors, a preliminary damage model has been implemented, which
gives fairly good results in terms of the simulation of full depletion voltage, leakage current, and
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charge collection efficiency up to fluencies of 2 × 1015 neutrons/cm2 . The model is based on
two acceptors and one donor levels, analogously with what previously reported for n-type silicon
material.
[1] F. Moscatelli, A. Scorzoni, A. Poggi, M. Bruzzi, S. Lagomarsino, S. Mersi, S. Sciortino, M. Lazar,
A. Diplacido and R. Nipoti, “Measurements of Charge Collection Efficiency of p+/n Junction SiC
Detectors”, Material Science Forum, Vol. 483-485, pp. 1021-1024 (2005).
[2] F. Moscatelli, A. Scorzoni, A. Poggi, M. Canino and R. Nipoti, “Ni-silicide contacts to 6HSiC: contact resistivity and barrier height on ion implanted n-type and barrier height on p-type
epilayer”, Material Science Forum, Vol. 483-485, pp. 737-740 (2005).
[3] F. Moscatelli, A. Scorzoni, A. Poggi, M. Bruzzi, S. Lagomarsino, S. Mersi, S. Sciortino and
R. Nipoti, “Measurements and Simulations of Charge Collection Efficiency of p+/n Junction SiC
Detectors”, Nuclear Instruments and Methods A-Accelerators Spectrometers Detectors And Associated Equipment, Vol. 546 (1-2), pp.218-221 (2005).
[4] Petasecca M., Moscatelli F., Pignatel G.U., “Analysis and simulation of Charge Collection
Efficiency in silicon thin detectors”, NUCLEAR INSTRUMENTS and METHODS in PHYSICS
RESEARCH (2005) Vol.A-546, pp.291-295.
[5] M.Moll, et al. (on behalf of the RD50 Collaboration) including F.Moscatelli, D.Passeri,
M.Petasecca, G.U.Pignatel, et al., “Development of radiation tolerant semiconductor detectors for
the Super-LHC”, NUCLEAR INSTRUMENTS and METHODS in PHYSICS RESEARCH (2005)
Vol.A-546, pp.99-107. Work presented at the ”6th Int’l Workshop On Radiation Imaging Detectors”
(IWORID-2004), Glasgow - UK, 25-29 July 2004.
[6] Petasecca M., Moscatelli F., Passeri D., Pignatel G.U., Scarpello C., Caprai G., “A comprehensive numerical simulation of heavily irradiated p-type and n-type silicon detectors”, PROCEEDINGS of the IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS-MIC-2005),
Puerto Rico, 22-29 October 2005, IEEE Nuclear Science Symposium Conference Record N37-6,
pp.1490-1493.
FAST ELECTROMIGRATION TESTS
A. Scorzoni
[Motivations] As the copper damascene technology has gained widespread use for ULSI interconnections, a renewed interest arises on fast wafer level reliability (WLR) measurements to evaluate
electromigration (EM). In fact, the standard package level reliability (PLR) tests, used in the
semiconductor industry, are very expensive when applied to Cu metallizations, in comparison with
Al-based structures, due to the considerable cost of the high temperature environmental chambers
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required (a typical stress temperature is 350◦ C) and to the time (months) required to perform
some characterizations. In this scenario it is fundamental to achieve the best correlation between
the PLR and WLR tests. Many works, in recent period, were devoted to this problem, with a
general agreement that the Isothermal method (ISOT) is the most suitable method. In fact the
ISOT assumes a uniform temperature around the structure, close to the situation achieved in the
moderately accelerated PLR tests.
[Activity] In this work an improved feedback algorithm is proposed for the ISOT method to reduce
the resistance instabilities observed in the stress phase, when the copper structures are approaching
the failure. The new algorithm is based on a different calculation
p of the stress current to be applied
during the next step. The current is now calculated as Ii = Ptest /Ri where Ri is the expected
value of the resistance at the i-th iteration. Moreover we suggested to increase the integration time
of the ISOT system voltmeter with respect to what specified in the ISOT standard, thus filtering
out the possible resistance glitches.
[Results] A figure of merit was defined to compare the results, i.e. the ratio η BE between the amount
of time, when the temperature was out of the permitted band BE, and the total elapsed time in
the stress phase. The better stability approaching the failure is evident from the average value of
the ratio ηBE , which decreases from 2.12% to 0.98%. Preliminary results have been presented at
the IRW International workshop.
[1] M. Impronta, S. Farris, A. Ficola and A. Scorzoni, “Resistance Instability in Cu-damascene
Structures during the Isothermal Electromigration Test”, Int. Integrated Reliability Workshop
Final Report 2005, IEEE05TH8799, refereed poster No.18, South Lake Tahoe, CA, USA, October
17-20, 2005.
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PISA
Dipartimento di Ingegneria dell’Informazione:
Elettronica, Informatica, Telecomunicazioni
Research topics
1) ELECTRONIC SYSTEMS FOR AUTOMOTIVE, AREOSPACE & ASTROPHYSICS
F. Baronti, F. D’Ascoli, L. Fanucci, F. Iozzi, D. Lunardini, C. Marino, T. Ramacciotti, R. Roncella,
R. Saletti, L. Serafini, P. Terreni, M. Tonarelli
Collaborations: Vanderbilt University, Nashville - TN, USA; Cesvit Microelettronica, Prato, Italy;
Galileo Avionica, Sesto Fiorentino, Italy; Piaggio, Pontedera, Italy; AustriaMicroSystems, Navacchio, Italy; Politecnico of Milan, Italy, Kaiser, Livorno, Italy
2) LOW POWER VLSI ARCHITECTURES
L. Fanucci, F. Iozzi, M. Melani, S. Saponara, P. Terreni
Collaborations: SensorDynamics, Navacchio, Italy; STMicroelectronics, Agrate, Italy
3) VLSI ARCHITECTURES FOR WIRELESS COMMUNICATIONS
P. Ciao, L. Fanucci, N. E. L’Insalata, F. Rossi, M. Rovini, S. Saponara, L. Serafini, P. Terreni
Collaborations: Politecnico of Torino, Italy; STMicroelectronics, Agrate, Italy; STMicroelectronics,
Grenoble, France; European Space Agency (ESTEC), Noordwijk, The Netherlands, University of
Parma, Parma
4) ANALOG AND MIXED SIGNAL DESIGN
F. Baronti, F. De Bernardinis, L. Fanucci, F. Iozzi, D. Lunardini, C. Marino, P. Nuzzo, R.Roncella,
R. Saletti, S. Saponara, P. Terreni, F. Vincis
Collaborations: ST Microelectronics, Pavia, Italy; University of California, Berkeley, USA; Sensor
Dynamics, Navacchio, Italy
5) CIRCUITS AND SYSTEMS FOR MULTIMEDIA PROCESSING
M. Casula, L. Fanucci, N. L’Insalata, M. Melani, S. Saponara, P. Terreni
Collaborations: University of Aachen, Germany; University of Trieste, Italy; Politecnico of Torino,
Italy; STMicroelectronics, Agrate, Italy; Fondazione Scuola San Giorgio-CNR, Venice, Italy
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6) ANALOG INTERFACES FOR INTEGRATED SENSORS
P. Bruschi, N. Nizza, M. Piotto
7) FLOW SENSORS FOR SPACE APPLICATIONS
P. Bruschi, M. Piotto, A. Diligenti
Collaborations: STMicroelectronics,LABEN SpA
8) EFFECT OF PAULI BLOCKING IN THE NOISE OF RESONANT TUNNELING
DIODES
G. Basso, I.A. Maione, M. Macucci, G. Iannaccone, B. Pellegrini
Collaborations: Scuola Normale Superiore, University of Cambridge, LPN-CNRS
9) SIMULATION OF TECHNIQUES FOR ELECTRON FLUX MAPPING
P. Marconcini, M. Macucci
Collaborations:
10) ANALYSIS OF CASCADED MESOSCOPIC CAVITIES AND OF THE POWER
DISSIPATION IN QUANTUM CELLULAR AUTOMATON CIRCUITS
P. Marconcini, L. Bonci, M. Macucci
Collaborations:
11) EMERGING RESEARCH DEVICES
G. Curatola, G. Fiori, G. Iannaccone, M. Pala
Collaborations: Università di Roma 3, IFN-CNR, SNS
12) SILICON NANOELECTRONICS
G. Curatola, G. Fiori, G. Iannaccone, M. Lisieri, G. Mugnaini
Collaborations: SINANO NoE, Philips Research, SILVACO
13) NON-VOLATILE SEMICONDUCTOR MEMORIES
G. Fiori, G. Iannaccone, L. Perniola, A. Campera
Collaborations: SINANO NoE, LETI, IMM, Universita’ della Calabria
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14) RFID SYSTEMS
L. Bacciarelli, G. De Vita, S. Di Pascoli, L. Fanucci, G. Iannaccone, F. Nardi, B. Neri, D. Puntin,
D. Zito
Collaborations: DTU Lyngby
15) RADIO-FREQUENCY AND MICROWAVE INTEGRATED CIRCUITS
L. Fanucci, A. Fonte, R. Massini, B. Neri, D. Pepe, D. Zito
Collaborations: Universities of Parma, Perugia, Modena, Ancona and Messina; CNIT, Pisa; STMicroelectronics, Catania and Crolles (France)
16) ELECTROCHEMICAL ETCHING OF SILICON FOR APPLICATIONS TO SENSORS AND MICROMACHINING
G. Barillaro, P. Bruschi , A. Diligenti, A. Nannini, L. M. Strambini
17) MICROELECTROMECHANICAL SYSTEMS
A. Molfese, A. Nannini, D. Paci, F. Pieri, P. Toscano
Collaborations: STMicroelectronics, Univ. di Pavia, CNR:IFS
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ELECTRONIC SYSTEMS FOR AUTOMOTIVE, AREOSPACE &
ASTROPHYSICS
F. Baronti, F. D’Ascoli, L. Fanucci, F. Iozzi, D. Lunardini, C. Marino, T. Ramacciotti,
R. Roncella, R. Saletti, L. Serafini, P. Terreni, M. Tonarelli
A significant part of the 2005’s research activity in this field was focused on the development
of new design methodologies in order to face the ever-increasing complexity of electronic systems
for automotive and aerospace applications. The aim of this work was to improve performance and
flexibility of designed systems, as well as to increase reusability and reduce time-to-market in the
design process. First of all, we developed a PC based CAN-LabVIEW platform for designing and
fine-tuning the Vehicle Management System (VMS) of hybrid vehicles, which is a very demanding
task since it requires several steps to be performed by means of repeated software generation and
tests carried out on the real system. The proposed platform implements a ”Hardware-In-the-Loop”
simulation logic in which the hardware is the whole vehicle, and the simulated component is the
VMS and makes it possible to finalize the VMS software in a very easy, flexible, and rapid way,
also before the hardware implantation of the VMS. The effectiveness of the proposed methodology
was shown by two different case-studies, represented by two real-life vehicles, presently under test
at University of Pisa Laboratories [1].
Furthermore, a new platform-based methodology was developed for designing sensor conditioning systems for a broad range of sensors used in automotive applications. The platform consists
of a wide set of high reconfigurable and high performance analog, digital and software IPs, which
can be extracted for fast implementation of optimum and reliable sensor interface circuits for the
target automotive application. Therefore, the significant advantage of this platform-based design
approach is to provide a framework for the design of complex and ad-hoc sensor conditioning systems, reducing development risks, design efforts, power consumption, costs and time-to-market.
This methodology was applied to design a so called Intelligent Sensor Interface suitable for capacitive sensors (such as gyroscopic angular rate sensor implemented utilizing MEMS), resistors, to
perform measurements of voltages and low currents (for example to measure car battery leakage
current) and many other applications. The whole system was fabricated in a 0.35µm BCD process
by STMicroelectronics allowing us to verify the performance of each developed IP [2], [3].
As far as the aerospace topic is concerned, we investigated the employment of dynamically
reconfigurable FPGA (D FPGA) approach in space application. developing a dedicated novel
design methodology and software tools inside the framework of an European Community funded
project. The application taken into consideration consisted in the re-design, by using a D FPGA
with an embedded microcontroller, of the control electronics of a scientific space experiment module
initially based on an One Time Programming (OTP) FPGA. The case-study application aimed at
demonstrating the benefit achieved from the design of complex systems based on the dynamic reconfiguration of SRAM based FPGA. Adopting a D FPGA approach we obtained a performance
improvement in terms of silicon area, power reduction and a decrease of the development time/costs
[4]. Another activity in this research area consisted in the development of an electronic platform for
the acquisition of neurophysiological data from scorpions in microgravity conditions. The system
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was also in charge to generate visual stimulus to the animals and to acquire and store images from
a mini video camera. This work was carried out in the framework of the ESA-SCOT project and
was successfully employed in the FOTON-M2 space mission [5].
Finally, a novel imaging sensor and the related conditioning and processing electronics was
developed with the collaboration of the Politecnico of Milan. The system is very promising in two
fields of astronomy: Adaptive Optics (AO) applications and detection of Fast Transient Phenomena
(FTP), such as supernova explosion, offering some advantages compared to conventional CCDs. On
the one hand, the sensor consists of a monolithic circular array of 60 Single Photon Avalanche Diodes
(SPADs), which operate as photon-counter [6]. On the other hand, the acquisition system features
a 60 channel counter array, which is able to capture events with a rate of up to 20 MHz, and allows
a continuous long term data acquisition, lasting up to several hours, with a time resolution downto
few tenths of microseconds at the same time. The system is based on a Commercial Off The Shelf
(COTS) single board, allocating an FPGA and a DSP, connected by means of an IEEE 1394 high
speed serial link to a Linux box, which implements a TCP/IP server. Therefore, the acquisition
parameters, as well as the collected data, can remotely be accessed through a LabView interface
running on a different PC. A proof of concept demonstration was realized and the experimental
results showed both the high performance of the sensor and the full functionality of the data
processing system [7].
[1] M. Ceraolo, P. Capozzela, F. Baronti, “CAN-LabView based Development Platform for finetuning Hybrid Vehicle Management Systems,” Proc. IEEE conference on Vehicle Power and
Propulsion, pp 433-438, Sept. 2005.
[2] L. Fanucci, A. Gianbastiani, F. Iozzi, C. Marino, A. Rocchi, “Platform Based Design for
Automotive Sensor Conditioning,” Design Automation and Test in Europe Conference (DATE
2005), Designers’ Forum, pp. 186-191, Munich, Germany, 7-11 March, 2005.
[3] F. D’Ascoli, M. Tonarelli, A. Giambastiani, L. Fanucci, “Intelligent Sensor Interface for Automotive Applications,” ICECS 2005, Gammarth, 11-14 December, Tunisia.
[4] T. Ramacciotti, L. Serafini, L. Fanucci, S. Baldacci, “A Novel Approach Based on Dynamic
Reconfiguration for Process Controls with FPGA,” PRIME 2005, pp. 141-145, July 25-28, 2005,
Lausanne, Switzerland.
[5] L. Serafini, T. Ramacciotti, W. Vigan, A. Donati, M. Porciani, V. Zolesi, D. Schulze-Varnholt,
P. Manieri, “SCORPI And SCORPI-T: Neurophysiological Experiments on Animals in Space,”
ESA ISGP Joint Life Science Conference ’Life in Space for Life on Earth’, Jun. 26-July 1, 2005,
Cologne, Germany.
[6] F.Zappa, S.Tisa, S.Cova, P.Maccagnani, R.Saletti, R.Roncella, “Single-Photon Imaging at
20,000 frame/s,” OPTICS LETTERS, no. 22, vol. 30, pp. 3024-3026, 2005.
[7] F.Baronti, D.Lunardini, R.Roncella, R.Saletti, F.Zappa, “60-channel High-resolution Counter
Array For High-speed Continuous Long-term Data Acquisition,” Proc. of the 12th IEEE Int. Conf.
on Electronics, Circuits and Systems, vol. 1, pp. 361-364, Gammarth (Tunisia) 2005.
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LOW POWER VLSI ARCHITECTURES
L. Fanucci, F. Iozzi, M. Melani, S. Saponara, P. Terreni
To easy the design of reusable VLSI macrocells, low-power CMOS design techniques have been
investigated at high abstraction levels: algorithm and RTL architecture. Target applications refer to the implementation of both electronic control unit (ECU) for embedded control system or
computational-intensive digital signal processing (DSP) techniques, particularly for video systems.
The research has been partially supported by national (PRIN 2003 and FIRB PRIMO) projects
and by the NEWCOM FP6 network of excellence. The power optimization of a microcontroller
core for embedded ECU is presented in [1,2]. Commercially available microcontroller IP cells, as
the 8051 family, typically adopt power saving techniques which entail a reduction of the performances: e.g. in power down and/or idle modes power is saved if the microcontroller is not used.
Proposed optimizations aim at increasing power efficiency without performance loss. Clustered
clock gating, state encoding and operand isolation techniques have been examined and applied to
the original source RTL code. Proposed approaches preserve the IP functionalities and reusability
and provide a power saving of about 40 with slight area and max. frequency overheads when implementing the original and the modified IP cell in CMOS technology. The main result is the new
clustered gating approach where the cluster organization is derive taking into account macrocell
complexity and activity. The technique has been compared to automated clock gating insertion in
Synopsys and with known clustering techniques proving its higher power optimization efficiency.
The 8051 macrocell has been used for the design of an integrated circuit for sensor interfacing and
conditioning in automotive applications. As far as low-power DSP is concerned, [3] and [4] present
algorithmic/architectural solutions for the implementation of context-aware coprocessors in realtime, low-power embedded video systems. The main idea is adding a low-complexity context-aware
controller to a conventional exhaustive search video coprocessor. While the basic coprocessor is
working, the context-aware controller extracts from the intermediate processing results information
related to the input signal statistics in order to automatically configure the coprocessor itself to
avoid unnecessary computations and memory accesses. The achieved complexity saving factor is
up to 25 depending on the input signal statistics while keeping unaltered algorithmic performance.
The increased efficiency is exploited both for (i) processing time reduction in case of software implementation on a programmable platform; (ii) power consumption reduction in case of dedicated
hardware implementation in CMOS technology.
[1] L. Fanucci, S. Saponara, A. Morello, “Power optimization of an 8051 compliant microcontroller,”
IEICE TRANSACTIONS ON ELECTRONICS, vol. E88-C, n. 4, pp. 597-600, 2005
[2] F. Iozzi, L. Fanucci, S. Saponara, A. Morello, “8051 CPU core optimization for low power at
register transfer level,” IEEE PRIME 2005, vol. 2, pp. 178-181, Lausanne, Switzerland, July 2005.
[3] S. Saponara, M. Melani, L. Fanucci, P. Terreni, “Self-adaptive algorithmic/architectural design
for real-time and low-power video systems” IEICE Transactions on Information and Systems, vol.
E88-D, n. 7, pp. 1538-1545, 2005.
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[4] M. Melani, S. Saponara, L. Fanucci, P. Terreni, “ ”Algorithmic/architectural design for
H.264/MPEG-4 AVC low power video codec,” IEEE PRIME 2005, vol. 1, pp. 209-212, Lausanne,
Switzerland, July 2005.
VLSI ARCHITECTURES FOR WIRELESS COMMUNICATIONS
P. Ciao, L. Fanucci, N. E. L’Insalata, F. Rossi, M. Rovini, S. Saponara, L. Serafini, P. Terreni
In 2005, the research activity on algorithms/architectures for communications has focused on
two main areas: channel codes decoding, with emphasis on low-density parity-check (LDPC) codes,
and automatic synthesis of FFT/IFFT processors.
In [1] an automated environment for the generation of high performance Fast Fourier Transform (FFT/IFFT) macrocells is presented. It is based on circuit-level VHDL and system-level
C++ models of a parametric cascade architecture supporting different types of arithmetic (BFP,
CBFP, fixed-point). Various test signals can be generated and a rapid processor accuracy analysis
configuring architecture parameters and type of arithmetic can be carried out. After high-level
analysis a VHDL database is generated for logic synthesis and gate-level design/test. As case
studies, FFT/IFFT cells for UWB and xDSL applications are generated assessing their flexibility,
reusability and good hardware performances vs. state-of-art.
The second area of research in telecommunication systems relates to channel coding techniques,
with particular emphasis on Low-Density Parity-Check codes [2]-[5]. A big effort of the scientific community is focused onto the definition of effective decoder architectures, capable of high
throughput and with low-complexity, suitable for mobile applications.
A new class of codes known as Turbo Gallager Codes has been considered in [5]. Particularly,
this work considers a code with codeword length of 2048 bit and rate 1/2. The related decoder, fully
parallel, can support up to 1 Gbit/s code rate and performs up to 48 decoding iteration ensuring
at the same time high throughput and good coding gain. In order to evaluate the performance
and the gate complexity of the decoder VLSI architecture, it has been synthesized in a 0.18 µm
standard-cell CMOS technology.
In [2] and [3] is reported the design of a multi rate decoder compliant with the LDPC codes
first proposed by the WWiSE consortium for high-throughput IEEE 802.11n. The architecture
described is an enhancement of other state-of-the-art solutions, and is suitable for use with a family
of structured LDPC codes very popular in the LDPC world. Thanks to the peculiar code definition
and to the envisaged architecture featuring memory paging, the decoder is very flexible, and the
support of different code rates (1/2, 2/3, 3/4 and 5/6) is achieved with no significant hardware
overhead. A top-down design flow of the decoder is reported in [2] and [3], starting from the
analysis of the system performance in finite-precision arithmetic, up to the VLSI implementation
details of the elementary modules. The synthesis of the whole decoder on 0.18µm standard cells
CMOS technology showed remarkable performances: small implementation loss (0.2 dB down to
BER = 10−8 ), low latency (less than 6.0 µs), high useful throughput (up to 565.1 Mbps) and low
complexity (about 375 Kgates).
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The premises for [2] and [3] can be found in [4], where a very accurate analysis of the effects of
finite precision (or quantisation) on the system performance (error rate) is studied. Along with this,
a systematic and general quantisation methodology is proposed always in [4]. Statistical analysis is
completed with Monte Carlo simulations to deploy the basics of the quantisation problem: crucial
to this methodology is the independent study of channel reliability and extrinsic messages. As a
case example, a short block, structured LDPC code is considered, and the results in terms of BER
curves are shown. The use of different LDPC codes confirms our observations on the impact of
signal dynamic range and number of bits on BER performance loss. In addition, this study is useful
to explore the trade-off between system performance and hardware complexity and can be easily
extended to other applications.
To conclude this area, [5] presents the results achieved with a new powerful class of codes known
as Turbo Gallager Codes. Particularly, this work considers a turbo code with codeword length of
2048 bit and rate 1/2 and design the related decoder as an application of the message passing
algorithm. The use of a fully parallel architecture, offers a throughput as high as 1 Gbit/s with up
to 48 decoding iterations. This ensures high throughput and good coding gain at the same time.
In order to evaluate the performance and the gate complexity of the decoder VLSI architecture, it
has been synthesized in a 0.18 µm standard-cell CMOS technology.
[1] S. Saponara, L. Serafini, L. Fanucci, P. Terreni, “Automated design of FFT/IFFT processors
for advanced telecom applications,” IEEE Inter. Symposium on Signals, Circuits and Systems
(ISSCS), pp. 103-106, Iasi, Romania 2005
[2] L. Fanucci, M. Rovini, N.E. L’Insalata, F. Rossi, “High-Throughput Multi-Rate Decoding
of Structured Low-Density Parity-Check Codes,” IEICE Transactions on Fundamentals, No.12,
Vol.E88-A, pp. 3539-3547, 2005
[3] M. Rovini, N. E. L‘Insalata, F. Rossi, Luca Fanucci, “VLSI Design of a High-Throughput
Multi-Rate Decoder for Structured LDPC Codes,” 8th Euromicro Conference on Digital System
Design (DSD05), 27 Aug.-3 Sept. 2005, Porto, Portugal, pp. 202, 209.
[4] M. Rovini, N. E. L’Insalata, F. Rossi, and L. Fanucci. “LDPC Decoding in Fixed-Point
Precision: a Systematic Quantisation Study,” IEEE SoftCOM 2005, IEEE International Conf. on
Software, Telecommunications and Computer NetworksSept. 15-17, 2005 Split, Croatia.
[5] P. Ciao, G. Colavolpe, L. Fanucci, “VLSI Design of a Fully Parallel Decoder for LDPClike codes,” IEEE International Conf. on Software, Telecommunications and Computer Networks,
SoftCOM 2005, 15-17 Sept., Split, Croatia
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ANALOG AND MIXED SIGNAL DESIGN
F. Baronti, F. De Bernardinis, L. Fanucci, F. Iozzi, D. Lunardini,
C. Marino, P. Nuzzo, R.Roncella, R. Saletti, S. Saponara, P. Terreni, F. Vincis
The main results of this research section span from mixed-signal design methodologies to ADC
design and high-efficiency power amplifiers. In [1] an integrated approach providing designers with
both a methodology and a set of IPs to interface advanced digital verification environments with
mixed-signal simulators based on analog-HDL is presented. A theoretical approach based on statistical method is also shown as a case study on a CAN-bus transceiver. In [2] the platform based
design paradigm is shown with application to embedded, networks, fault tolerant and mixed-signal
systems. The flexibility of the approach is demonstrated copying with a wide range of domains in
a unified formal framework. In [3] Analog Platforms (APs) are exploited to cope with hierarchical
mixed signal designs. APs can be composed hierarchically to implement complex functionalities.
The process can seamlessly operate on both analog and digital platforms, thus dealing with mixed
signal designs in a consistent way. Since feasible performance models are provided at all hierarchy
levels, top-down flows can be efficiently exploited to perform design space exploration. The effectiveness of the approach is demonstrated optimizing an 80 MS/s 14 bit pipelined Analog-to-Digital
Converter (ADC) including digital calibration. The resulting mixed signal design space is efficiently
explored providing power reduction larger than 64% compared to the original hand optimized design. In [4] a scheme for improving the efficiency of the characterization process for system-level
models of analog circuits within the Analog Platform Based Design paradigm is presented. Designer
knowledge is leveraged to map basic functional requirements of the circuit into circuit parameters
relations so that the sampling space can be significantly reduced. We introduce a bipartite graph
representation denoted Analog Constraint Graphs (ACG) to obtain a random configuration generator. A heuristics to generate uniformly distributed configuration enabled by the tools is presented
and applied to a complex ADC design, yielding a reduction in power consumption by more than
28%. In [5] platform-based analog design is used to design an analog-to-digital converter reducing
power consumption by 26%. This result was achieved by enriching the library of analog components used as the basis of the design with a telescopic Operational Transconductance Amplifier
(OTA). We present how the models for this new component necessary to use platform based design
can be added quickly and efficiently with the use of Analog Constraint Graphs. In [6] a silicon
implementation of a baseband system for use in wireless sensor network applications is presented.
Starting from the RF interface, the design process began with a system level phase inspired by the
Platform-Based Design (PBD) methodology extended to the analog domain. The PBD approach
was used to explore two alternative solutions: a predominantly digital one and a predominantly
analog one. To validate the functional aspect of the design, a prototype implementation based
on an FPGA and a Field Programmable Analog Array (FPAA) was derived using the PBD approach. Finally, we mapped the system level description to silicon aiming at an ultra low power
implementation exploiting weak inversion in a 0.13µm CMOS process leading to an overall power
consumption of 200µW with a 1V supply. The realization of high-efficient amplifiers for consumer
audio application is addressed in [7] and in [8]. In [7] two architectures are proposed. The first
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architecture implements a switching amplifier with 3-state PWM while the second solution is a hybrid topology combining the power efficiency of the switching approach with the low-distortion of a
linear amplifier. A 35 Wrms output power delivered to an 8Ω speaker is referred as application case.
The hybrid topology achieves a 0.11% distortion for a 77% power efficiency (at least 10% higher
efficiency vs. the assisted class B amplifier) while the 3-state PWM switching amplifier features
a 91% efficiency and a 0.23% distortion (7% higher efficiency vs. a 2-state class D scheme and a
reduced distortion by a factor 4). With reference to direct amplification of digital audio sources, [8]
presents an exhaustive exploration of the huge mixed-signal design space to find optimal trade-offs
among different cost-functions: distortion, efficiency, circuit complexity, sensitivity. Different architectural solutions are modeled and compared in a Simulink/Spice framework. All building blocks
(i.e. oversampling filter, noise shaping, type of PWM modulation, type of feedback, power stage,
LC filter) are optimized considering the whole system performance. A novel mixed-signal scheme
improving state-of-art solutions is finally derived. In [9][10] a methodology to set up a behavioral
verification for complex mixed-signal System-on- Chip (SoC) is presented. The verification flow,
consisting in VHDL-AMS modeling of the analog and mixed-signal section of a generic system, is
depicted. This methodology has been successfully adopted for the top level debugging of a mixed
signal SoC for sensor interface. In [11] the design of a stable over temperature RC-oscillator for
automotive applications is presented. The oscillator is designed and fabricated in a 0.35µm BCD6
technology, using a 3.3V supply voltage. The oscillator shows a frequency drift from 27C lower
than 0.5% in all conditions, over a temperature range from -40 to +125C and a supply voltage
variation over a +/-10% range around its typical value. To ensure proper timing for charging and
discharging, a double capacitors topology driven by non-overlapping phases is proposed. A digital
trimming is also provided to compensate process variations. Simply changing the value of the external resistor, the nominal output frequency can be set up to about 1MHz. As far as the Digital
Delay Lines topic is concerned, in [12] we developed a novel Delay-Locked Loop (DLL) based architecture for multiphase clock generation with a time resolution finer than the gate delay. The basic
and innovative idea consists in locking the delay line to a certain multiple of clock periods that is
not fixed a priori, but is self-adjusted depending on process and operating conditions, and working
frequency. In such a way, a wide locking range is achieved with a very compact delay cell structure.
The circuit has been used to design a new TDC architecture in which a resolution (time-bin size)
of about 16 ps is reached using a 0.35 µm CMOS technology. Post-layout simulations show the
feasibility of the technique [12].
[1] G.Bonfini, M.Chiavacci, R.Mariani, R.Saletti, “A New Verification Approach for Mixed-Signal
Systems,” 2005 IEEE International Behavioral Modeling and Simulation Conference BMAS 2005,
vol. 1, pp. 1-6, S. Jose 2005
[2] L. Carloni F. De Bernardinis C. Pinello A. Sangiovanni Vincentelli M. Sgroi, “Platform-Based
Design for Embedded Systems,” in The embedded systems handbook, pp. 22-1-22-26, , 2005
[3] F. De Bernardinis P. Nuzzo A. Sangiovanni Vincentelli, “Mixed-Signal Design Space Exploration
through Analog Platforms,” Design Automation Conference, vol. 1, pp. 600-605, 2005
[4] F. De Bernardinis A. Sangiovanni Vincentelli, “Efficient Analog Platform Characterization with
Analog Constraint Graphs,” Int. Conference on CAD, vol. 1, pp. 414-420, 2005
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[5] P. Nuzzo F. De Bernardinis P. Terreni A. Sangiovanni Vincentelli, “Enriching an analog platform
for analog-to-digital converter design,” Int. Symposium on CAS, vol. 2, pp. 1286-1289, 2005
[6] Y. Li F. De Bernardinis B. Otis A. Sangiovanni Vincentelli J. Rabaey, “A Low-Power MixedSignal Baseband System Design for Wireless Sensor Networks,” Custom IC Conference, vol. 1, pp.
300-303, 2005
[7] S. Saponara, V. Vincis, L. Fanucci, P. Terreni, “Mixed-Signal Design Space Exploration for LowCost, High-Efficiency Digital Audio Amplifiers,” IEEE Applied Electronics, pp. 138-143, Pilsen
2005
[8] S. Saponara, P. Terreni, “Switching based topologies for high efficiency audio amplifiers,” IEEE
Inter. Symposium on Signals, Circuits and Systems (ISSCS), pp. 283-286, Iasi, Romania, 2005
[9] C. Marino, M. Forliti, A. Rocchi, A. Giambastiani, F. Iozzi, M. De Marinis, L. Fanucci,
“Mixed Signal Behavioral Verification using VHDL-AMS,” PRIME, July 25-28, 2005, pp. 115-118,
Lausanne, Switzerland.
[10] C. Marino, L.Fanucci, F. Iozzi, M. Forliti, A. Rocchi, A. Giambastiani, M. De Marinis,
“VHDL-AMS Modelling and System Verification Flow for Mixed-Signal System-On-Chip,” FDL
2005, Lausanne, Switzerland
[11] F. Vincis, L. Fanucci, “A Trimmable RC-Oscillator for Automotive Applications, with Low
Process, Supply, and Temperature Sensitivity,” Gammarth, 11-14 December, Tunisia, ICECS 2005
[12] F.Baronti, D.Lunardini, R.Roncella, R.Saletti, “Self-adjusting Multiple-period Locked Delay
Line For High-resolution Multiphase Clock Generation,” Proc. of the 12th IEEE Int. Conf. on
Electronics, Circuits and Systems, vol. 1, pp. 393-396, Gammarth (Tunisia) 2005
CIRCUITS AND SYSTEMS FOR MULTIMEDIA PROCESSING
M. Casula, L. Fanucci, N. L’Insalata, M. Melani, S. Saponara, P. Terreni
The research activity targets have been circuits and systems for the communication of multimedia contests with a portable and personal access to the information and with a quality of the
audiovisual content suitable for the human sensorial system. The research has been partially supported by national (PRIN 2003 and FIRB PRIMO) projects and by the NEWCOM FP6 network
of excellence. Particularly [1] presents a design methodology for the cost-effective and real-time
implementation of non-linear image processing algorithms. Starting from high-level functional descriptions the proposed optimization flow simplifies the designer duty to achieve a low complexity
and low power realization in CMOS technology (FPGA and/or ASIC) with low accuracy loss for
the implemented algorithm. Such methodology has been applied in [1,2] to the design of a system,
based on a Retinex-like non linear technique, to improve the visual quality of images and video
acquired in bad lighting conditions. As far as video communication is concerned the works [3,4]
address the problem of a bounded complexity implementation of the new generation of video coding
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standards (H.264/MPEG-4 AVC). Particularly as concerns the video motion estimation (ME) task
our work proposes a new control algorithm which dynamically configures the ME search parameters in inter frame video coding: number of reference frames, valid block modes and search area
size. The technique is successfully applied to both Full Search and fast ME (UMHexagonS)engines
in the framework of the H264/AVC coding standard. The aim is remarkably reducing the ME
complexity with unaltered coding efficiency for a wide range of bit-rates, from few Kbps to tens
of Mbps, and video formats, from QCIF to CCIR. Finally, the work in [5] presents the architectural design issues for implementation of a quadraphonic audio recording and playback algorithm:
after the algorithm profiling, the hardware/software architecture is derived as a trade-off between
complexity, performance and flexibility.
[1] S. Saponara, M. Cassiano, S. Marsi, R. Coen, L. Fanucci, “Cost-effective VLSI design of non
linear image processing filters,” IEEE Euromicro, Digital Design Symposium, vol. 1, pp. 322-329,
August 2005.
[2] S. Marsi, G. Ramponi, S. Carrato, S. Saponara, L. Fanucci, P. Terreni, M. Conti, S. Orcioni, C.
Turchetti, “Realization of an algorithm for image enhancement,” GE 2005, Giardini-Naxos, June
2005.
[3] S. Saponara, M. Melani, L. Fanucci, P. Terreni, “Self-adaptive algorithmic/architectural design
for real-time and low-power video systems,” IEICE Transactions on Information and Systems,
E88-D, n. 7, pp. 1538-1545, 2005.
[4] S. Saponara, M. Casula, D. Alfonso, L. Fanucci, “Adaptive motion estimtaion for high efficiency
and real-time video coding,” STreaming Day, pp. 1-5, Torino, September 2005.
[5] N. L’Insalata, L. Fanucci, D. Bonsi, D. Stanzial, “On the implementation of quadriphonic data
recording,” Forum Acusticum 2005, pp. 314-319, Budapest, August 2005.
ANALOG INTERFACES FOR INTEGRATED SENSORS
P. Bruschi, D. Navarrini, M. Piotto
The research activity on this field involved the development of three different systems: (i) a
capacitance-to-pulse duration converter, (ii) a probe chip to be used for metering liquid flows, and
(ii) a completely integrated interface for thermal flow sensors.
The first activity consisted in testing a chip previously designed and assigned to STMicroelectronics for fabrication, using the Bipolar-CMOS-DMOS 0.35 µm BCD6 process. The chip was
equipped with an on-chip dummy capacitor variable in the range 0.8-1.2 pF in seven steps, addressable by means of three digital inputs. One of the eight possible configuration is used to connect the
interface to an external capacitor. The chip was tested varying the clock frequency in the range
20-100 kHz, the three bias currents (tuneable by means of four bits each according to a 1:3 range)
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and the dummy capacitor value, finding a correct operation in all configuration. The temperature
stability was tested at 20 kHz by means of a Peltier cell cryostate, obtaining a total error of nearly
2.5
The target of the second activity was the development of a probe chip to be used in a single
element flow meter for liquids. The chip included a ciscuit aimed to set the chip temperature
to a value proportional to an external set-point and to provide as an output a voltage linearly
proportional to the power delivered by the on-chip heater. The probe chip was designed to work
according to an original pulsed mode operation defined in previous work. The chip was mounted
on top of a copper cylinder, working as a thermal feed-through, and fully characterized by insertion
in a reference water circulation system.
The third activity involved the design of a complete interface for integrated thermal flow sensors.
The interface will include (a) an ultra low noise instrumentation amplifier, based on the chopper
modulation technique; (b) a power driver for the heaters, implementing different driving strategies
(i.e. constant power, constant temperature difference etc.) and a very low frequency low pass filter.
The research carried out in 2005 was focused on the chopper amplifier and the filter. The latter
is very critical since the low frequency involved should be obtained with the very low capacitance
valued available on chip. For this aim a new ultra-low Gm transconductor has been invented and
a test chip has been developed.
[1] P. Bruschi, D. Navarrini, M.Piotto, “Integrated flow meter for liquids based on a single chip
probe with low noise temperature control,” Proc. of Eurosensors XIX, Barcelona, 11-14 September
2005 pp. MP69-1-MP69-4.
[2] P. Bruschi, F. Sebastiano, F. Nizza, M. Piotto, “A tunable CMOS transconductor for ultra-low
Gm with wide differential input voltage,” proc. of ECCTD 05, Cork, 29 August-2 September 2005.
vol. 3, pp. 337-340.
[3] N. Nizza, A. Mondini, P. Bruschi, “A current feedback adaptive biasing method for class-AB
OTA cells,” proc. of Prime 2005, Lausanne, 25-28 July 2005, vol. 1, pp. 390-393.
FLOW SENSORS FOR SPACE APPLICATIONS
P. Bruschi, M. Piotto, D. Navarrini, A. Diligenti
New satellites to be used for gravitational wave detection or other interferometry experiments,
requires a precise orbit control that can be achieved only by means of thrusters with resolution
of a few µN. A promising method for producing very low thrust levels is that based on the cold
gas principle, basically a jet of gas (e.g. Nitrogen) sustained only by the gas storage pressure. In
this case it is of fundamental importance to control the gas flow with a resolution of 0.1 SCCM
(standard cm3 per minute) or less. The research activity carried out in this field involved the
improvement of a sensor previously developed, and based on a integrated micro-calorimeter. The
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sensor has to be inserted inside a closed loop flow control system, currently being developed by the
company LABEN of Florence (group Alenia Spazio).
The main improvement was aimed to reach the target resolution of 0.1 SCCM, starting from the
performance of the previous version of the device, equal to nearly 1 SCCM. The result was obtained
mainly by reducing the cross-section of the pipe were the chip is inserted, this accelerating the gas
flow and increasing the sensitivity. A further improvement has been achieved by designing an
electronic read-out circuit with lower background noise. In particular, the cross-section reduction
has been achieved by adopting an original packaging method, consisting in directly plugging the
chip to a capillary pipe, through a notch in the pipe itself obtained by precision machining.
The sensor obtained in this way was sealed by means of vacuum epoxy resin and a robust
aluminum external package has been developed to provide connection of the sensor structure to
standard pipes (1/8 inch). Preliminary measurements demonstrated the correctness of the approach, indicating that a resolution slightly better than the targeted 0.1 SCCM was achieved.
[1] P. Bruschi, M. Piotto, G. Barillaro, “Effect of pressure and gas type on the response of thermalflow sensors in low flow regime,” proc. of Eurosensors XIX, Barcelona 11-14 september 2005,
vol. 1, pp. MP68-1-MP68-4.
[2] Paolo Bruschi, Alessandro Diligenti, Dino Navarrini, Massimo Piotto, “A double Heater integrated gas flow sensor with thermal feedback,” Sensors and actuators a-physical, vol. 123-124, pp.
210-215, 2005.
EFFECT OF PAULI BLOCKING IN THE NOISE OF RESONANT TUNNELING
DIODES
G. Basso, I.A. Maione, M. Macucci, G. Iannaccone, B. Pellegrini
Theoretical studies on transport in double barrier resonant tunneling diodes and experimental
results obtained on such structures show significant deviations from the noise power spectral density
that would be expected from a Poisson process (full shot noise). Such deviations are the result of
the concurrent effect of Pauli exclusion and Coulomb interaction for electrons crossing the device.
Some models predict that after the transition from thermal to shot noise (occurring for bias
voltage values of the order of kT ), two separate minima of the Fano factor (the ratio of the shot noise
power spectral density to that corresponding to full shot noise) appear in the bias region before
the current peak, separated by a maximum (still below unity). This is expected to be the result
of a transition from shot noise suppression dominated by Pauli exclusion (for lower bias voltages)
to a suppression resulting mainly from Coulomb interaction. Such an effect is more apparent and
more easily detectable at very low temperatures.
Noise measurements performed on double barrier resonant tunneling diodes at bias levels of
a few kT (very small at cryogenic temperatures), for current levels between 0.8 pA and 10 nA,
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allowed us to find a good agreement between theoretical predictions and experimental results. Such
measurements were made possible by the availability of a very sensitive measurement system, based
on an ultra-low-noise correlation amplifier and of different noise reduction techniques developed in
recent years.
[1] I.A. Maione, G. Basso, M. Macucci, G. Iannaccone, B. Pellegrini, “Transition between Pauli
exclusion and Coulomb interaction in the noise behavior of resonant tunneling devices”, Proc. of
the 18th International Conference on Noise and Fluctuations (ICNF 2005), Salamanca, Spain,
September 19-23 2005, pp.435-438;
SIMULATION OF TECHNIQUES FOR ELECTRON FLUX MAPPING
P. Marconcini, M. Macucci
We have investigated, by means of numerical simulations, the results that can be achieved with a
recently proposed experimental technique for mapping the electron flow in 2DEG-based mesoscopic
devices. Such a technique consists in scanning a negatively charged probe over the surface of the
device, thereby locally depleting the underlying 2DEG, and in measuring, for each position of
the probe, the variation that it causes on the device conductance. Intuitively, the depletion locally
generated in the 2DEG by the probe should determine a higher decrease of conductance in the zones
where the electron flow in the absence of the probe is higher. Thus the variation of the conductance
should be somewhat proportional to the intensity of the electron flow. In our simulations the effect
of the probe on the 2DEG has been first represented with a hard-wall obstacle and then with a
more realistic (Lorentzian) shape.
We have used an optimized versions of our recursive Green’s function codes, repeating, for each
new probe position, only the computation of the mode overlap integrals associated with the slices
whose potential is modified by the probe. In particular, we have studied the results than can be
obtained by the scanning probe technique for a single quantum point contact and for a mesoscopic
cavity, with several confinement potentials and also in the presence of potential fluctuations inside
the structure. Comparing such results with the numerically computed electron flow, we have
seen that in the case of a single quantum point contact the results of the scanning probe technique
reproduce quite closely the electron flow distribution (apart from the presence of interference fringes
due to the electrons reflected by the probe). Instead, in the case of the cavity, the electron flow
distribution is well reproduced in the regions before and after the cavity, while inside the cavity
such a correspondence vanishes, arguably as a result of the multiple reflections taking place in the
confined region of the cavity and of the resulting interference effects.
If we consider, as the effect of the charged probe, a Lorentzian perturbation of the potential with
a height slightly larger than the Fermi energy and with the half-width at half-maximum comparable
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with the Fermi wavelength, we have observed a much lower resolution, but still sufficiently high to
visualize some of the main flux details.
[1] M. Macucci, and P. Marconcini, “High-Resolution Numerical Study of Conductance and Noise
Imaging of Mesoscopic Devices,” Journal of Computational Electronics 3, p. 429 (2004) (Published
in 2005). [2] M. Macucci, P. Marconcini, “Numerical investigation of scanned probe imaging of
mesoscopic cavities and quantum point contacts,” Proceedings of the 5th IEEE Conference on
Nanotechnology (Nagoya, Japan, 11-15 July 2005), vol. 1, p. 96 (IEEE Conference Proceedings).
ANALYSIS OF CASCADED MESOSCOPIC CAVITIES AND OF THE POWER
DISSIPATION IN QUANTUM CELLULAR AUTOMATON CIRCUITS
P. Marconcini, L. Bonci, M. Macucci
In a system made up of cascaded mesoscopic cavities, shot noise suppression would be predicted
to tend to 1/3, as the number of cavities is increased, on the basis of a simple analytical model. From
numerical calculations, however, it is apparent that the situation is quite different if the cascaded
cavities are all identical. In particular, in the case of identical cavities shot noise suppression as a
function of the number of cavities has a substantially constant, or even decreasing, value of 0.25,
well below the 1/3 limit predicted by the analytic theory. Instead, even if a small difference is
introduced between the cavities, the behavior of the Fano factor as a function of the number of
cavities changes abruptly: it increases with the number of the cavities, even exceeding 1/3. The
same difference between the two cases is found for the resistance of the overall structure: while for
slightly different cascaded cavities it is equal to the sum of the resistances of the constrictions and
thereby proportional to the number of constrictions defining the cavities, for identical cavities such
a sum rule does not hold.
In particular, we have observed that any small variation in the cavities suffices to determine the
transition between the two different regimes. These results have been found both for rectangular
cavities and for stadium-shaped cavities. Further analysis has been performed to understand the
role that is played in the observed phenomenon by the possible presence of resonances, by the
beaming effect produced by the constrictions, and by the shape of the electron wave functions
inside the cavities.
Another activity in the field of the simulation of nanoelectronic devices has consisted in the
calculation of the energy dissipated in the switching process of Quantum Cellular Automaton
circuits, for both the non clocked and the clocked case. As a reference circuit, we have considered
binary wires of different lengths, investigating the relationship between the energy delivered by the
external voltage sources and the switching speed, the number of cells, and the maximum operating
temperature. Calculations have been performed using our Monte Carlo code for the simulation
of single-electron circuits. We have considered also the energy lost in the charging process of the
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capacitors, concluding that, if linear ramps are used for the control signals, such a contribution
is negligible. Overall, the total dissipated energy is a couple of orders of magnitude smaller than
that typical of conventional devices as reported on the ITRS roadmap, but a fair comparison would
require also an analysis of conventional devices used within advanced adiabatic schemes.
[1] M. Macucci, G. Iannaccone, P. Marconcini, “Shot noise behaviour of cascaded mesoscopic
structures,” Proceedings of the 27th International Conference on the Physics of Semiconductors,
Ed. by J. Menéndez and C. G. Van de Walle, AIP Conference Proceedings 772, p. 473 (2005). [2]
M. Macucci, P. Marconcini, Discussion of shot noise suppression in cascaded mesoscopic cavities,
Proceedings of the 4-th International Conference on Unsolved Problems of Noise (Gallipoli, Italy,
6-10 June 2005), Ed. by L. Reggiani, C. Pennetta, V. Akimov, E. Alfinito and M. Rosini, AIP
Conference Proceedings 800, p. 473 (2005). [3] L. Bonci, M. Macucci, “Numerical investigation
of energy dissipation in Quantum Cellular Automaton circuits,” European Conference on Circuit
Theory and Design, vol. II, p. 239, Cork, Ireland (2005).
EMERGING RESEARCH DEVICES
G. Curatola, G. Fiori, G. Iannaccone, M. Pala
We have studied electron transport in the presence of magnetic fields, focusing on magnetoconductance and on spintronic effects. We have observed ballistic transport in strained silicon cavities
defined by etching on a silicon germanium heterostructure, demonstrated by magnetic focusing
of conductance of the cavity at 50 mK. Numerical simulations, based on a novel approach which
allows to include an arbitrary degree of decoherence in mesoscopic transport, show that magnetoconductance features can be related to the semiclassical orbits be means of the local density of
states in the cavity.
We have also presented a detailed three-dimensional (3D) simulation of two different kind of
Single Electron Transistor devices (SET). In particular, solving the Poisson/Schrödinger equation
by means of a multigrid method, we have simulated a SET defined by split gates and a Silicon
on Insulator (SOI) SET. Moreover, the solution of the Schrödinger equation with open boundary
conditions has allowed us to compute the three-dimensional conductance in the linear response
regime. Theoretical results are in good agreement with experimental data.
[1] M.G. Pala, G. Iannaccone, G. Curatola, “Numerical simulation of ballistic magnetoconductance
and magnetic focusing in strained Si-SiGe cavities,” NANOTECHNOLOGY, num. 5, vol. 16, pp.
S206-S210, 2005 [2] M. G. Pala, M. Governale, U. Zulicke, G. Iannaccone, “Rashba spin precession
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in quantum-Hall edge channels,” PHYSICAL REVIEW B, num. 11, vol. 71, pp. 115306-1-1153066, 2005 [3] G. Fiori, M. G. Pala, G. Iannaccone, “Three-dimensional simulation of realistic single
electron transistors,” IEEE Transactions on Nanotechnology, num. 4, vol. 4, pp. 415-421, 2005 [4]
G. Scappucci, L. Di Gaspare, A. Notargiacomo, F. Evangelisti, E. Giovine, R. Leoni, V. Piazza,
P. Pingue, F. Beltram, M. G. Pala, G. Curatola, G. Iannaccone, “Ballistic transport in strained-Si
cavities: experiment and theory, 4th IEEE Conference on Nanotechnology,” pp. 92-94, 2004.
SILICON NANOELECTRONICS
G. Curatola, G. Fiori, G. Iannaccone, M. Lisieri, G. Mugnaini
This activity is focused on the development of numerical modeling tools for field effect transistors
and on the development of a compact model for nanoscale MOSFETs. Different aspects typical of
the nanometer scale have to be considered, such as the strong quantum confinement in the channel,
the far from equilibrium transport regime, and the use of alternative materials (high k dielectrics,
strained channels) and alternative device architectures that require adequate modeling tools.
Requirements for detailed physical modelling of nanoscale field effect transistors are analyzed
in detail and the results of simulations are compared with experimental characteristics of bulk-Si
MOSFETs with gate length down to 40 nm. A new quantum drift-diffusion approach per subband
(QDDS) has been included in the NANOTCAD2D simulator. We show that a proper treatment
of quantum effects both in the channel and in the polysilicon gate through the direct solution of
Schrödinger equation, and, particularly, a transport model based on two-dimensional subbands are
important requirements for a predictive and reliable simulation and therefore to correctly reproduce
the electrical characteristics of sub-100 nm field effect transistors. A fully ballistic approach is also
included in the simulator and a comparison between experimental results and the ultimate ballistic
limit is presented with the aim to carefully evaluate the effects of scaling on the ballistic efficiency
of such devices.
We have also developed a physics-based analytical model for nanoscale MOSFETs that allows us
to seamless cover the whole range of regimes from drift-diffusion to ballistic transport, taking into
account quantum confinement in the channel. In Part I we focus on MOSFETs with ultra-thin body,
in which quantum confinement is rectangular, and investigate in detail an analytical description of
the transition from drift-diffusion to ballistic transport based on the Büttiker approach to dissipative
transport. We first start from the derivation of a closed form analytical expression of the Natori
model for ballistic MOSFETs, and show that a MOSFET with finite scattering length can be
described as a suitable chain of ballistic MOSFETs. Then, we are able to compact the behavior
of the ballistic chain in a simple analytical model. In the derivation, we also find a similarity
between the ballistic limit in the chain and the saturation velocity effect, that lead us to propose
an alternative mobility model.
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[1] G. Curatola, G. Doornbos, J. Loo, Y.V. Ponomarev, G. Iannaccone, “Detailed modeling of sub100-nm MOSFETs based on Schrodinger DD per subband and experiments and evaluation of the
performance gap to ballistic transport,” IEEE Trans. Electron Devices, num. 8, vol. 52, pp. 18511858, 2005 [2] G. Mugnaini, G. Iannaccone, “Physics-based compact model of nanoscale MOSFETs
- Part I: Transition from drift-diffusion to ballistic transport,” IEEE Trans. Electron Devices, num.
8, vol. 52, pp. 1795-1801, 2005 [3] G. Mugnaini, G. Iannaccone, “Physics-based compact model
of nanoscale MOSFETs - Part II: Effects of degeneracy on transport,” IEEE Trans. Electron
Devices, num. 8, vol. 52, pp. 1802-1806, 2005 [4] G. Iannaccone, “Analytical and Numerical
Investigation of Noise in Nanoscale Ballistic Field Effect Transistors,” Journal of Computational
Electronics, num. 3/4, vol. 3, pp. 199-202, 2005 [5] G. Fiori, G. Iannaccone, “Code for the
3D simulation of nanoscale semiconductor devices, including drift-diffusion and ballistic transport
in 1D and 2D subbands, and 3D tunneling,” Journal of Computational Electronics, num. 1/2,
vol. 4, pp. 63-66, 2005 [6] G. Iannaccone, “Perspectives and challenges in nanoscale device
modeling,” MICROELECTRONICS JOURNAL, num. 7, vol. 36, pp. 614-618, 2005 [7] G. Fiori,
G. Iannaccone, G. Klimeck, “Performance of carbon nanotube field effect transistors with doped
source and drain extensions and arbitrary geometry,” International Electron Device Meeting, vol.
-, pp. 522-525, 2005 [8] G. Fiori, G. Iannaccone, M. Lundstrom, G. Klimeck, “Three-dimensional
atomistic simulation of Carbon nanotube FETs with realistic geometry,” 35th European Solid-State
Device Research Conference, vol. -, pp. 537-540, Grenoble 2005 [9] G. Mugnaini, G. Iannaccone,
“Analytical Model for Nanowire and Nanotube Transistors covering both dissipative and ballistic
transport,” 35th European Solid-State Device Research Conference, pp. 213-216, Grenoble, France
2005 [10] G. Mugnaini, G. Iannaccone, “Analytical Treatment of far-from-equilibrium transport
in low-dimensional MOSFETs,” 6th International Conference of Ultimate Integration of Silicon,
vol. -, pp. 53-56, Bologna 2005 [11] A. Campera, G. Iannaccone, F. Crupi, G. Groeseneken,
“Extraction of physical parameters of alternative high-k gate stacks through comparison between
measurements and quantum simulations,” 6th International Conference on the Ultimate Integration
of Silicon, pp. 35-38, Bologna 2005 [12] G. Fiori, G. Iannaccone, “Simulation of one-dimensional
subband transport in ultra-short silicon nanowire transistors,” 6th International Conference on the
Ultimate Integration of Silicon, vol. -, pp. 163-166, Bologna 2005
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NON-VOLATILE SEMICONDUCTOR MEMORIES
A. Campera, G. Fiori, G. Iannaccone, L. Perniola
We have quantitatively addressed the electrostatic impact of Channel Hot Electron (CHE)
injection in discrete-trap memories. The dual bit behavior of the transfer characteristic during
forward and reverse read of a written cell is thoroughly analysed with the help of an analytical
model. Such model allows, for the first time, to estimate the effective charged portion of the
discrete storage layer, L2, and the quantity of electrons, Q, injected in the trapping sites from the
experimental parameters of the Id-Vg characteristics, the reverse-forward threshold voltage shift
VRF, and the total threshold voltage shift Vtot. The viability of this model is confirmed with tests
performed on nanocrystal memories, under different bias conditions. These results are confirmed
with the help of a 2D drift-diffusion commercial code (ATLAS-SILVACO).
We also have developed an approach based on three-dimensional simulations for the investigation
of the dependence of the programming window of Silicon-On-Insulator (SOI) nanocrystal memories
on the width of the silicon channel. Recent experiments show that the threshold voltage shift
after programming increases with decreasing channel width. By evaluating the consequences of
possible assumptions on the charge stored in the nanocrystals, we show that such behavior can
be consistently explained by the preferential injection of electrons, during the program operation,
through the oxide near the edges of the channel. As a consequence, charge is mostly stored in
the dots close to the edges, and therefore is more and more effective as the channel width is
decreased. Experiments and simulations on SOI nanocrystal memories are show that support our
interpretation with respect to different proposed mechanisms.
[1] G. Fiori, G. Iannaccone, G. Molas, B. De Salvo, “Dependence of the programming window of
silicon-on-insulator nanocrystal memories on channel width,” Appl. Phys. Lett., num. 11, vol. 86,
pp. 113502-1-113502-3, 2005 [2] L. Perniola, S. Bernardini, G. Iannaccone, P. Masson, B. De Salvo,
G. Ghibaudo, C. Gerardi, “Analytical model of the effects of a nonuniform distribution of stored
charge on the electrical characteristics of discrete-trap nonvolatile memories,” IEEE Transactions
on Nanotechnology, num. 3, vol. 4, pp. 360-368, 2005 [3] A. Campera, G. Iannaccone, “Modelling
and simulation of charging and discharging processes in nanocrystal flash memories during program
and erase operations,” SOLID-STATE ELECTRONICS, num. 11, vol. 49, pp. 1745-1753, 2005 [4]
G. Fiori, G. Iannaccone, G. Molas, B. De Salvo, “Three-dimensional simulation of the dependence of
the programming window of SOI nanocrystal memories on the channel width,” IEEE Transactions
on Nanotechnology, num. 3, vol. 4, pp. 326-330, 2005 [5] L. Perniola, G. Iannaccone, B. De
Salvo, G. Ghibaudo, G. Molas, C. Gerardi, S. Deleonibus, “Experimental and theoretical analysis
of scaling issues in dual-bit discrete trap non-volatile memories,” International Electron Device
Meeting, vol. -, pp. 857-860, Washington DC, 2005. [6] A. Campera, G. Iannaccone, “Timedependent simulation of the program and erase operations of nanocrystal Flash memories,” First
International Conference on Memory Technology and Design, vol. -, pp. 33-36, Giens, France 2005
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RFID SYSTEMS
L. Bacciarelli, G. De Vita, S. Di Pascoli, L. Fanucci,
G. Iannaccone, F. Nardi, B. Neri, D. Puntin, D. Zito
Long range passive transponders (”tags”) for RFID systems do not have an on-board battery,
and therefore must draw the power required for operation from the electromagnetic field transmitted
by the reader [1]. The RF energy radiated by the reader is used both to supply the digital section of
the transponder and to allow data transmission from the tag to the reader through modulation of
the backscattered radiation. If the transponder lies within the interrogation range of the reader, an
alternating RF voltage is induced on the transponder antenna, and is rectified in order to provide
a DC supply voltage for transponder operation.
We have derived a set of design criteria for the modulator of the backscattered radiation, the
voltage multiplier and the power matching network of long range passive RFID transponders, operating in the 2.45 GHz or 868 MHz ISM frequency ranges. We discuss the design tradeoffs between
the error probability at the reader receiver and the converted RF-DC power at the transponder,
determining the regions of the design space that allow us to optimize the operating range and the
data-rate of the RFID system.
[1] G. De Vita, G. Iannaccone, “Design criteria for the RF section of UHF and I microwave passive
RFID transponders,” IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES,
num. 9, vol. 53, pp. 2978-2990, 2005 [2] G. De Vita, G. Iannaccone, “Ultra low power RF section of
a passive microwave RFID transponder in 0.35 micron BiCMOS,” IEEE International Symposium
on Circuits and Systems, 2005 - ISCAS 2005, vol. 5, pp. 5075-5078, Kyoto 2005 [3] G. De Vita, G.
Iannaccone, “Ultra-low-power, temperature-compensated refererence voltage generator,” Custom
Integrated Circuit Conference, vol. -, pp. 751-754, San Jose, California 2005
RADIO-FREQUENCY AND MICROWAVE INTEGRATED CIRCUITS
L. Fanucci, A. Fonte, R. Massini, B. Neri, D. Pepe, D. Zito
The research on RFICs (Radio-Frequency Integrated Circuits) focuses the circuits design for
System-on-a-chip radio transceivers on standard silicon technologies for the next generation wireless
interfaces. The major areas of interest are: very high frequency RF front-end (up to millimiter
waves) and low-power radio design. The most important result we obtained in this field is given
by the realization of an innovative RF switch on standard silicon technologies. Particularly, the
feasibility of a fully integrated RF transceiver for 5-6 GHz (Wireless Local Area Network or WLAN)
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applications has been demonstrated at simulated level in 2004. In 2005, the obtained results have
been definitively confirmed by measurements on several manufactured samples. In detail, the
critical (for the complete integration) building blocks (Image Rejection Receiver, Antenna Switch
and Power Amplifier) have been realized on a standard SiGe-CMOS 0.35 µm technology (with
a maximum cut-off frequency of 75 GHz) provided by AustriaMicroSystems (AMS) through the
european consortium EuroPractice.
The research on Microwave Integrated Circuits focuses the design of hybrids solutions for gigabit
communication systems.
The abstracts concerning the main contributions we proposed are reported hereinafter.
Antenna Switch for WLAN
The feasibility of a novel fully integrated RF switch for single antenna time division multiplexing
systems has been demonstrated in 2003 for 2.4 GHz applications and the italian patent has been
extended in Europe in 2004. The circuit, which is based on the Boot-Strapped Inductor (BSI)
approach, allows to on-chip wire the output of the power amplifier (PA) and the input of the low
noise amplifier (LNA) directly to the antenna. The PA and the LNA have been designed and
included in the test-chips, realizing a fully integrated RF front-end. The approach does not require
any external component, it gives better performance and lower cost with respect to the front-end RF
switches which commonly use PIN diodes as switching element and allows to step forward to fully
integrated transceiver solutions. During 2004, the idea has been applied for a 5-6 GHz applications
and two solutions have been implemented by using HBT and CMOS transistors. In 2005, the circuit
performances have been definitely confirmed by measurements on several manufactured samples.
The typical Insertion Loss (IL) are 0.2 and 0.6 dB (mismatches included), in R and T modes
respectively. Moreover, they show a power handling capability higher than -20 dBm and +17 dBm
during the receive and transmit time intervals, respectively, according to 5-6 GHz WLAN system
requirements for indoor applications. The obtained results are very promising if compared with
those typically obtained by using external switches or duplexer which not only have to be mounted
as external components to the transceiver introducing additional losses due to the mismatches but,
like those on silicon recently presented in literature, introduce an insertion losses (IL) of 1-2 dB at
least. Finally, the novel RF switch for 5-GHz WLAN represents a significant new step toward the
realization of single-chip transceivers on standard silicon technologies for next generation systemon-a-chip wireless interfaces [1, 2].
Image Reject Receiver for 5-GHz WLAN
A fully integrated heterodyne receiver with 1.1 GHz of intermediate frequency has been designed. It consists of a selective LNA with a passive notch filter centred at the image frequency and
a image reject mixer realized according to Hartley’s scheme. The circuits have been implemented
in a standard SiGe-CMOS process and does not require any external components. The circuits
have been designed to be compliant with multi-standard (IEEE 802.11a and HiPerLAN/2) indoor
5-6 GHz WLAN applications. In 2005, the characteristic performances have been definitively confirmed by measurements on several manufactured prototypes. It exhibits a total image rejection
greater than 54 dB, a NF of 4.7 dB, a LO leakage to RF attenuation greater then 68 dB and a
input-referred CP1dB equal to -20 dBm, a conversion gain of 29.6 dB and a power consumption of
175.5 mW with a 3V power supply [3].
Voltage Controlled Oscillator (VCO) for multi-standard 5-GHz WLAN direct-conversion receiver
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A completely integrated VCO for IEEE 802.11a and HiPerLAN/2 WLAN applications has
been designed by using a low-cost standard 0.35-m CMOS technology. High Q (165 at 5.4 GHz)
equivalent inductors for the LC resonators have been implemented by a CMOS version of the BootStrapped Inductor (BSI) [4], which allows maximizing of the circuit performances and a proper
biasing of the core of the VCO. The overall circuit consumes 21.3 mW with a 3 V power supply.
The VCO produces a stable oscillation in the tuning range from 4.95 to 5.89 GHz. Phase Noise
simulations have shown -129 dBc at 1 MHz offset in the worst case, which represents the best result
ever obtained at the state of the art. Moreover, the VCO achieves a FOMT of -189.9 dBc/Hz at
100 KHz offset and -198.1 dBc/Hz at 1 MHz offset, which are the best results if compared with
the previous works that employ active inductors, and very close to the VCOs which employ passive
inductors realized by means of additional fabrication steps with more expensive technologies.
Ultra Wide Band (UWB) short-range radars for the collision avoidance automotive and medical
applications
Recently, in the United States and in Europe, the Ultra Wide Band (UWB) systems have been
approved, including the automotive avoid-collision short range radars. The frequency spectrum
has been allocated in the range of 22-29 GHz in the USA, and 22-22.625 GHz in Europe. In our
work, the optimal radar architecture has been investigated and the system specifications have been
derived for its building blocks. A fully integrated Low Noise Amplifier (LNA) for the 24 GHz
short range radar receiver has been designed in a 90 nm standard CMOS technology by STM’s.
The 24 GHz LNA has been implemented by a two-stage fully differential cascode topology. By
exploiting the integrated matching technique, the input power and impedance matching both for
the maximum power delivering from the antenna to the LNA and for the minimum noise figure
have been achieved. The main LNA performances are summarized as follows: i) a noise figure of
2.32 dB; ii) a gain (in terms of S21) of 20.28 dB; iii) a -3 dB band from 20.82 to 26.83 GHz; iv) a
S11 parameter of -36.5 dB. The amplifier drains 28.5 mW with a 1 V power supply.
Another class of Ultra Wide Band radars for medical applications has been investigated. Particularly, the design of impulse UWB radars for heart and breath rate detection have been taken
into account. These devices operate in the radio spectrum within 3.1-10.6 GHz. System analyses
have been performed by Advanced Design System (by Agilent Technologies) on several topologies in order to evaluate their effectiveness and optimum performance. A correlation architecture
has shown the best overall performances and has been taken into account for the CMOS radar
implementation.
Building blocks of a radio transceiver for Wireless Metropolitan Area Networks (WMAN)
17.2 GHz HIPERLINK systems for point-to-point and point-to-multipoint radio links have been
investigated. The system specifications for the building blocks have been derived. A fully integrated
Low Noise Amplifier (LNA) for 17.2 GHz HIPERLINK applications in a 90 nm standard CMOS
technology has been designed. The LNA has been implemented by a two stage fully differential
cascode topology. The integrated matching technique has been exploited in order to simultaneously
achieve both the input impedance and the minimum noise matching. The main LNA performances
are: i) a noise figure of 2.26 dB; ii) a gain (in terms of S21) of 20 dB; iii) a S11 parameter equal to
-39 dB. The amplifier drains 30 mW with a 1 V power supply.
Low-power RF Transceiver for Radio-Frequency Identification Device (RFID) and Wireless Personal
Area Network (WPAN) applications
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A direct-conversion 2.45 GHz ultra low-power RF transceiver for IEEE 802.15.4 standard (ZigBee) applications in 0.35 µm SiGe-CMOS technology has been designed. As the receiver is concerned, a new topology for a ultra low-power and high linear RF receiver has been developed. The
criteria for its optimal design have been derived in order to accomplish the main trade-offs among
noise figure, linearity and power consumption performances. The receiver consists of the Low Noise
Amplifier (LNA) and the subsequent I and Q mixers which have been designed according to the
aforementioned criteria. The whole receiver exhibits a noise figure of 8.7 dB, a voltage gain of 26
dB, an input-referred third-order intercept point of -13 dBm and a power consumption of 8.6 dB,
which represents one of the best performance trade-offs obtained in literature [5]. The design of
the transmitter has been aimed to minimize the power consumption, which represents the critical
parameter for such applications. The transmitter consists of two mixers (I and Q) and a power
amplifier (PA). The constant-envelope modulation (offset-QPSK) allows using of high-efficiency
non-linear class-C amplifiers. Thus, the power amplifier has been implemented by a class-A preamplifier (driver stage) that drives a high-efficiency class-C amplifier (power stage). Load-pull
simulations have allowed to properly size the matching networks for high efficiency performance.
The overall circuit attains drain and power-added efficiencies of 16 and 15 percent at +6 dBm, respectively. The mixers have been implemented by means of a double balanced Gilbert cell topology.
The overall transmitter (the I/Q mixers and the two stage power amplifier) provides an output
power of +6 dBm with an associated power consumption of 16 mW (with a power supply of 1.8
V).
10 KHz -11 GHz hybrid active filter for gigabit communication system
A hybrid circuit for the compensation of the chromatic dispersion in optical fibre communications links at 10 Gbit/sec has been developed. The compensating circuit exhibits a behaviour
equivalent to that of a FIR filter having an frequency response which can be arbitrarily shaped
by acting on the taps weights. The filter requirements are i) a very wide band (from 10 KHz
to 11 GHz) and ii) a linear phase response over the overall frequency range. The overal circuit
consists of an analog microwave block and a digital control board. The microwave block has been
implemented by a hybrid circuit (microstrips, SMD components and bare die chips). Advanced
Design System (by Agilent Technologies) has been used both for schematic and for layout (electromagnetic) simulations. Package effects have been taken into account by using HFSS (by Ansoft).
Active monolithic microwave amplifiers have been characterized in terms of S-parameters and the
obtained results have been included into the overall circuit simulations.
Building blocks of a microwave ultra low noise receiver for environmental radiometry
The system analyses and the preliminary design of a microwave single-chip ultra low noise
receiver at 13 GHz for environmental radiometry applications have been carried out. Particularly,
the system specifications have been evaluated and the low noise amplifier (LNA) has been designed.
The short channel effects and gate noise have been investigated and modelled. The LNA has been
implemented by the cascade of two fully differential cascode stages, obtaining one of the best
tradeoffs between power gain, noise figure (NF) and common mode rejection radio. The circuit
exhibits a power gain of 24dB, a noise figure of 2.4 dB and power consumption of 9 mW.
[1] D. Zito, F. D’Ascoli and B. Neri, “A Novel Fully Integrated Antenna Switch for 5-6 GHz
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Wireless LAN Systems,” Proc. of IEEE International Symposium on Signals, Circuits and Systems
2005 (ISSCS 2005), Iasi, Romania, July 2005, vol.2, pp.379-382;
[2] D. Zito, F. D’Ascoli and B. Neri, “Fully Integrated RF Front-end for WLAN: A New Step
torward Single-Chip Transceivers,” Proc. of IEEE International Conference on Ph.D. Research In
Micro-Electronics & Electronics 2005 (PRIME 2005), Lausanne, 25-28 July 2005, Switzerland, Vol.
1, pp. 157-160;
[3] D. Zito, F. D’Ascoli, B. Neri and S. Ciucci, “High Image Rejection Fully Integrated Heterodyne
Receiver Front-end for 5-6 GHz Wireless LAN,” Proc. of IEEE International Symposium on Signals,
Circuits and Systems 2005 (ISSCS 2005), Iasi, Romania, July 2005, vol.1, pp. 259-262;
[4] G. Scandurra, C. Ciofi and D. Zito, “A New Topology for Transformer Based CMOS Active
Inductances,” Proc. of IEEE International Conference on Ph.D. Research In Micro-Electronics &
Electronics 2005 (PRIME 2005), Lausanne, 25-28 July 2005, Switzerland, Vol. 1, pp. 1-4;
[5] D. Zito, G. Devita and B. Neri, “A New Ultra Low-power RF Receiver Topology for Wireless
Communications Systems,”Proc. of IEEJ International Analog VLSI Workshop, Bordeaux, 19-21
October 2005.
ELECTROCHEMICAL ETCHING OF SILICON FOR APPLICATIONS TO
SENSORS AND MICROMACHINING
G. Barillaro, P. Bruschi , A. Diligenti, A. Nannini, L. M. Strambini
In last years it has been demonstrated that the electrochemical etching of silicon constitutes
a versatile technique for producing both nanostructured silicon films (porous silicon - PS) and
micromachined structures. The two different results are obtained by simply changing the etching
parameters (mainly the anodization current density and voltage) and/or the substrate doping. PS
with randomly distributed pores shows many interesting electrical, optical, chemical and morphological properties. Among them we exploited its high surface to volume ratio and its high chemical
reactivity at room temperature for the fabrication of CMOS-compatible silicon-based sensors [1-4].
In this case the electrochemical etching was used to produce a nanostructured material in proximity of a solid state device (like a diode or a JFET), able to modify the electrical properties of
the device itself by adsorption of molecules. The sensors show a very high sensitivity for polluting
gases, such as nitrous oxides, fast response times and a high reproducibility. Moreover, owing to
the compatibility of their fabrication process with IC industrial processes, these sensors can be
integrated along with the necessary driving/readout electronics on the same chip. As far as micromachining is concerned, the electrochemical etching was used to groove regular microstructures
into a silicon substrate [5, 6], with a high aspect ratio (about 100). In this way, integrated microtip
arrays containing over 106 tips/cm2 and with a tip radius of 10 nm were fabricated. A possible
application of such structures concerns flat panel displays [7]. Using the same approach, an array
of silicon dioxide hollow microneedles for transdermal drug delivery were fabricated as well [8]. In
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this case an array of regular macropores was grooved into a silicon substrate. The structure was
then oxidized and the remaining silicon properly removed in order to obtain silicon dioxide hollow
microneedles with an inner diameter of 1 microns, an outer diameter of 3 microns and a length of
tens microns.
[1] G. Barillaro, A. Diligenti, G. Marola, L. M. Strambini, “A silicon crystalline resistor with an
adsorbing porous layer as a gas sensor,” Sensors and Actuators B, 105 (2) pp. 278-282 (2005).
[2] G. Barillaro, A. Diligenti, A. Nannini, L. M. Strambini, “Gas sensors based on silicon devices
with a porous layer,” Physica Status Solidi (c), 2 (9) pp. 3424-3428, (2005).
[3] G. Barillaro, A. Diligenti, L. M. Strambini, E. Comini, G. Faglia, “NO2 detection by means
of an integrated silicon resistor with a porous adsorbing layer,” Proceeedings of Eurosensors 2005,
Barcelona-Spain, September 2005, pp. MP14/1-MP14/4.
[4] G. Barillaro, A. Diligenti, L. M. Strambini, E. Comini, G. Faglia, “FET-Like Silicon Sensor with
a Porous Layer for NO2 Detection,” Proceedings of IEEE Sensors 2005, Irvine-California (USA),
Octotober 2005, p.121.
[5] G. Barillaro, F. Pieri, “A self-consistent theoretical model for macropore growth in n-type
silicon,” J. Appl. Physics, 97 (11) 116105 (2005) (ISSN 0021-8979).
[6] G. Barillaro, P. Bruschi, A. Diligenti, A. Nannini, “Fabrication of regular silicon microstructures
by photo-electrochemical etching of silicon,” Physica Status Solidi (c), 2 (9) pp. 3198-3202 (2005).
[7] G. Barillaro, F. D’Angelo, G. Pennelli, F. Pieri, “Fabrication of self-aligned gated silicon
microtip array using electrochemical silicon etching,” Physica Status Solidi (a), 202 (8) pp. 14271431 (2005).
[8] G. Barillaro, A. Diligenti, F. Pieri, G. Pennelli, “High aspect ratio silicon dioxide microneedles array fabrication,” Proceeedings of Eurosensors 2005, Barcelona-Spain, September 2005, pp.
WPb17/1-WPb17/4.
MICROELECTROMECHANICAL SYSTEMS
A. Molfese, A. Nannini, D. Paci, F. Pieri, P. Toscano
Differents classes of microsystems, based on dedicated or general purpose technologies, combined
with post-processing steps, are under development.
Post-processing of devices designed with STM’s BCD6 technology in TMAH-based solutions
has been used to fabricated suspended dielectric membranes, for use in sensing applications. To
overcome sticking problems, which are common for electrostatic devices due to extreme proximity of the actuation/sensing electrodes, an innovative magnetic mechanism, based on integrated
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suspended microtransformers and an external static magnetic field, has been designed. The mechanical and electrical functionality of the devices has been verified. The device will be used as a
highly sensitive microbalance for DNA detection.
At the same time, characterization and theoretical work on flexural mode electromechanical
tunable beam microresonators (in the 10-50 MHz range), and on low frequency (kHz) out-of-plane
levitational resonators, both designed with STM’s THELMA, continued. For the first class of
devices, a full equivalent circuit, which takes into account the effect of electric tunability and of
higher order resonance modes, has been developed. The design of low frequency resonators led to
the development of complete analytical expressions, of valuable use during synthesis, for the elastic
constants of an innovative type of serpentine spring.
[1] G. Barillaro, A. Molfese, A. Nannini, F. Pieri “Analysis, simulation and relative performances
of two kinds of serpentine springs,” Journal of Microsystems and Microengineering, 15 (4), 2005,
736-746.
[2] A. Molfese, A. Nannini, G. Pennelli, F. Pieri “Analysis, Testing and Optimisation of Electrostatic
Comb-Drive Levitational Actuators,” Design, Testing, Integration, Packaging of MEMS/MOEMS
(DTIP2005), Montreux, Switzerland, 2005.
[3] D.Paci, A. Nannini, F. Pieri “Simulation and modelling of the effect of temperature on the resonance of three kinds of MEMS resonators fabricated with a thick polysilicon technology,” Design,
Testing, Integration, Packaging of MEMS/MOEMS (DTIP2005), Montreux, Switzerland, 2005.
[4] M. Mastrangeli, A. Nannini, D. Paci, F. Pieri “Equivalent Circuit For RF Flexural Free-Free
MEMS Resonators,” Modeling and Simulation of Electron Devices (MSED 2005), Pisa, 2005.
[5] A. Nannini, D. Paci, F. Pieri, P. Toscano “Design of an integrated chemical sensor based on a
torsional microbalance with magnetic sensing ,” Eurosensors XIX, Barcelona, Spain, 2005.
[6] P. Bruschi, A. Nannini, D. Paci, F. Pieri “A method for cross-sensitivity and pull-in voltage
measurement of MEMS two-axis accelerometers,” Sensors & Actuators A, 123-124, 2005, 185-193.
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ROMA LA SAPIENZA
DIPARTIMENTO DI INGEGNERIA ELETTRONICA
Research topics
1) SIMULATION SYSTEMS FOR DETECTION OF HAZARD, ASSESSMENT OF
RISKS AND EMERGENCY MANAGEMENT
C.M. Ottavi, V. Ferrara
Collaborations:
2) HIGH PERFORMANCE NON-VOLATILE MEMORIES
F.Irrera, D. Caputo, G. Puzzilli
Collaborations: STMicroelectronics Agrate, Universit di Bologna, Consorzio IU.NET
3) RELIABILITY OF ADVANCED GATE DIELECTRICS (HIGH-K DIELECTRICS,
ULTRATHIN OXIDES, ENGINEERED BARRIERS)
Collaborations: IMEC Leuven, STMicroelectronics CT, MDM Agrate, Consorzio IU.NET
4) PHOTONIC DEVICES WITH LIQUID CRYSTALS AND COMPOSITE MATERIALS ON GLASS AND SILICON PLATFORMS
A. d’Alessandro, R. Asquini, D. Donisi
Collaborations: Universit di Napoli Federico II, Universit di Ancona, Universit della Calabria,
Universit di Pisa, Terza Universit di Roma, University of Cambridge, University of York, University
of Ghent, Politecnica Universidad de Madrid, Gotheborg Chalmers University, CNR, ENEA, INFMCNR, CNISM
Collaborations:
5) AMORPHOUS SILICON BASED PHOTODETECTORS AND ELECTRONIC
DEVICES
G. de Cesare, D. Caputo, A. Nascetti
Collaborations: ENEA, IESS, EUROSOLARE, PHILIPS Aachen
6) BIOSENSORS FOR DNA ANLYSIS
D. Caputo, G. de Cesare, A. Nascetti
Collaborations: Dipartimento di Genetica e Biologia Molecolare-Universit di Roma ”La
Sapienza”,DEIS-Universit di Bologna
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363
7) ANALOG CIRCUITS AND EMBEDDED SYSTEMS FOR SIGNAL INTERPRETATION
M. Balsi, G. Valente, G. Pazienza, F. De Martino, G. Filosa, F. Gentile
Collaborations: Universit di Maastricht, Universit ”Ramon Llull” di Barcellona, Politecnico di
Varsavia, Universit di Santiago de Compostela
8) POROUS SILICON TECHNOLOGY - MEMS, OPTOELECTRONICS AND IC
DEVICES
A. Ferrari, M. Balucani, R. Crescenzi, P. Nenzi, F. Taverna, A. S. Zammataro
Collaborations: G & A Engineering, Galileo Avionica, Philips Semiconductors, Laben, Marconi
9) DESIGN OF COMPUTATIONAL CORES AND SYSTEM-LEVEL ARCHITECTURES FOR SYSTEM-ON-CHIP PLATFORMS TARGETED FOR HIGHLYEFFECTIVE POWER-EFFICIENT MULTIMEDIA SIGNAL PROCESSING APPLICATIONS
M. Olivieri, R. Mancuso, M. Scarana, S. Smorfa
Collaborations: Marconi, Pomezia (RM); DIBE, Univ. of Genova; ST Microelectronics, Agrate
(MI); ST Microelectronics, Catania; Philips Semiconductors, Zurigo; Contraves, Roma
10) DESIGN METHODOLOGIES FOR LOW POWER MICROPROCESSOR CORES
FOR SYSTEMS-ON-CHIP
M. Olivieri, F. Menichelli, M. Scarana
Collaborations: STMicroelectronics, Agrate (MI); STMicroelectronics, Catania; DEIS Univ. of
Bologna; DIBE Univ. of Genoa; Politecnico di Torino
11) DESIGN AND PROTOTYPING METHODOLOGIES FOR SYSTEM-ON-CHIP
ARCHITECTURES
M. Olivieri, F. Menichelli, M. Balsi
Collaborations: DEIS Univ. of Bologna; Politecnico di Torino; Infineon, Munich
12) SI AND GAAS HIGH-FREQUENCY IC DESIGN FOR OPTICAL COMMUNICATION SYSTEMS
F. Centurelli, P. Marietti, G. Scotti, P. Tommasino, A. Trifiletti
Collaborations: Alenia, Fondazione Bordoni, OPTO+, Philips Semiconductors, Fujitsu FCSI, Marconi, ST Microelectronics, OTI-Corning, Ericsson, IPITEC/ATMEL
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13) DEVICE AND CIRCUIT MODELLING AND YIELD-ORIENTED MMIC DESIGN
F. Centurelli, P. Marietti, G. Scotti, P. Tommasino, A. Trifiletti
Collaborations: Alenia, OPTO+
14) ANALYSIS OF ADAPTIVE MULTI-USER RECEIVERS FOR WIRELESS APPLICATIONS
F. Centurelli, P.Marietti, A. Trifiletti
Collaborations: IPITEC/ATMEL
Collaborations: Ericsson, Oerlikon Contraves
15) IMPLEMENTATION OF CRYPTOGRAPHIC FUNCTIONS IN STANDARD
SILICON CMOS TECHNOLOGY
F. Centurelli, G. Scotti, P. Tommasino, A. Trifiletti
Collaborations: Gemplus
16) CMOS IC DESIGN FOR DATA CONVERTER APPLICATIONS
F. Centurelli,P. Monsurr, G. Scotti, A. Simonetti, A. Trifiletti
Collaborations: Oerlikon Contraves
17) STUDY OF PHASE NOISE IN FREE RUNNING AND SYNTHESIZED OSCILLATORS
F.Palma, A. Carbone
Collaborations: STMicroelectronics CT, Politecnico Milano
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POROUS SILICON TECHNOLOGY - MEMS, OPTOELECTRONICS AND IC
DEVICES
A. Ferrari, M. Balucani, R. Crescenzi, P. Nenzi, F. Taverna, A. S. Zammataro
Our research group is involved in porous silicon technology in which different types of devices
have been realized and characterized: - Waveguides in the visible and infrared region, buried under
silicon devices. Optical waveguides in the visible range with losses of less than 0.5 dB/cm were
demonstrated, and a new idea of infrared buried waveguide are actually under development. - Silicon On Insulator structures based on fully oxidized porous silicon with the possibility to modulate
the BOX (Buried Oxide) thickness up to 10 microns were realized. Test matrix circuit based in
CMOS 1 micron technology were realized and characterized showing an increased performances of
20-30- New topology of integrated circuit for low voltage application. DTMOS (Dynamic Threshold MOS) band-gap reference voltage was realized in 0.22 micron bulk silicon technology showing
a stable 0.85V output. New SOI PBT (Permeable Base transistor) are under simulation by SILVACO software. Multi-layer structures based on laser ablation technique based on Si/TiN/Si for
the development of vertical devices are under development. Good rectifying proprieties of TiN/Si
strucutures were demonstrated.
MEMS (Micro Electro Mechanical Systems) using porous silicon as sacrificial layer are under
development. A new micro-thruster in silicon technology for micro-satellite were designed and
simulated in terms of mechanical and thermal stability. The micro-thruster are realized and they
are actually under test to measure the impulse response.
IC and MEMS circuit for satellite attitude and orbit control using GPS are under testing.
[1] M. Balucani, S. Zammataro, A. Ferrari, ’Fast Singular Value Decomposition-Based Algorithm
for Spacecraft Altitude Determination Using GPS signals’, Proc. IEEE GCC Conf. 2003.
[2] M. Balucani, P. Nenzi, A. Ferrari, ’All NPN Solid State Power Controller’, Proc. IEEE GCC
Conf. 2003.
[3] M. Balucani, V. Bondarenko, N. Vorozov, A. Ferrari, ’Buffer Layer influence on guiding proprieties of oxidised porous silicon waveguides’, PHYSYCA E, 16 (2003) 574 - 579.
[4] M. Balucani, V. Bondarenko, N. Vorozov, A. Ferrari, ’Technological aspects of oxidised porous
silicon waveguides’, PHYSYCA E, 16 (2003) 586 - 590.
[5] V. N. Dobrovolsky, M. Balucani, A. Ferrari, ”Similarity relation for I-V characteristics of FETs
with different channel shape” published in - Progress in SOI Structures and Devices Operating
at Extreme Conditions- edit by Francis Balestra, Alexei N. Nazarov, Vladimir S. Lysenko - May
2002, ISBN 1-4020-0575-X, Hardbound. Book Series: NATO SCIENCE SERIES: II: Mathematics,
Physics and Chemistry : Volume 58.
[6] M. Balucani, Bondarenko, L. Dolgyi, N.Vorozov, A. Ferrari ”Oxidized Porous Silicon Based SOI:
untapped resources” published in - Progress in SOI Structures and Devices Operating at Extreme
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Conditions- edit by Francis Balestra, Alexei N. Nazarov, Vladimir S. Lysenko - May 2002, ISBN
1-4020-0575-X, Hardbound. Book Series: NATO SCIENCE SERIES: II: Mathematics, Physics and
Chemistry : Volume 58
[7] G. Lamedica, M. Balucani, P. Tromboni, M. Marchetti, A. Ferrari, ”Microthruster in silicon
for space application” IEEE Aerospace and Electronic Systems, Volume: 17, Issue: 9, Sep 2002,
Page(s): 22- 27
[8] G. Lamedica, M. Balucani, A. Ferrari, V. Bondarenko, V. Yakovtseva, L. Dolgyi ” Gettering
Technology Based on Porous Silicon”, Solid State Phenomena Vol. 82-84 (2002) pp. 405-410.
SIMULATION SYSTEMS FOR DETECTION OF HAZARD, ASSESSMENT OF
RISKS AND EMERGENCY MANAGEMENT
C.M. Ottavi, V. Ferrara
The risk analysis includes the detection of hazards, the assessment of risks and their management. These three main aspects of environmental risk study are strictly linked together in order
to archive an effective mitigation of hazards and to minimize consequences. Two different solutions have been proposed in literature: creation of general purpose interfaces oriented to connect
remote structures, design of dedicated system oriented to environmental simulations. In order to
obtain an integrated approach to the study of the environmental system and to allow an effective
management of risk and the mitigation of possible hazards, we have developed a dedicated system
oriented to environmental simulations and built the environmental management platform Terrapack, able to use more recent technologies in communication and software fields. Management of
system configuration becomes the core of structure design: complex environmental management
systems are organised by means of distributed structure, including specialised elaboration institutes
of archives, communication, real-time measures, etc., and data are available in the communication
network. Special care must be taken in the communication design, distinguishing between fast and
slow lines. To allow an effective management of risk and the mitigation of possible hazards and a
decision support to operators and authorities, system must warrant: effective scenarios visualisation, real-time data update, fast predictive simulations of environmental phenomena, correlation
with different data (e.g. social data). Principally the system must define an interactive work area
where the scenery is a friendly elaboration of numerical data. There are different types of static
and dynamic data: those required to solve environmental problem analysis and those used to develop intervention activities. We have examined some environmental applications as simulation
of an air pollution episode due to a smoke-stack and forest fire propagation. The analysis of a
specific environmental phenomenon includes vector, raster and alpha-numeric data, i.e.: groundbased meteorological and pollutants concentration measurements from on-site monitoring network,
digital map of complex terrain, emission census, and modelling data base which includes our code
(e.g. dispersion) to simulate the phenomena. And the system must be capable to resolve problems
regarding: detection and measurement of parameters, organisation of data archives, connection of
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workstations, archive data to results intersection, efficient visualisation of results, etc.. Moreover
the best supervision of environmental scenery and critical parameters must be guaranteed to operator that deals with emergency. We have improved our system with the inclusion of external tools
(software codes of environmental simulations) which, making access to data, make their elaboration
easier.
[1] V. Ferrara, C.M. Ottavi, Strutture e tecnologie di supporto alla gestione delle emergenze,
Proceedings of 7a Conferenza Nazionale ASITA, Vol. II, pp. 1065-1070, 2003
[2] V. Ferrara, Integrated data and utilities to support sustainable planning, Proc. Sustainable
Planning and Development , pp. 375-382, 2003 and Transaction: Ecology and the Environment,
Editor: C.A. Brebbia, A.G. Kungolos and E. Beriatos, Vol. 67, 2003
[3] V. Ferrara, C.M. Ottavi, Electromagnetic fields evaluation by means of standard algorithms and
cartographic data. Broadcast case into urban environment, Proc. Development and Application of
Computer Techniques to Environmental Studies X, pp. 33-41, 2004 and Transaction: Ecology and
the Environment, Editor: C.A. Brebbia, G. Passerini,Vol. 69, 2004
[4] C. Atturo, C. Cianfrone, V. Ferrara, L. Fiumi, G. Fontinovo, C.M. Ottavi, Remote Sensing
Detection Techniques for Brownfield Identification and Monitoring by GIS Tools, Proc. Brownfields
2006, 19-21 July 2006
[5] V. Ferrara, M. Guerriero, Territorial Information System interoperability: a design improving
interaction in an emergency, Proc. Risk Analysis IV, pp. 475-484, 2004 Transaction: Ecology and
the Environment, Editor: C.A. Brebbia, Vol. 77, 2004
[6] C. Atturo, C. Cianfrone, V. Ferrara, L. Fiumi, G. Fontinovo, C.M. Ottavi, Telerilevamento
e identificazione di brownfields per una loro analisi mediante GIS, Proceedings of 9a Conferenza
Nazionale ASITA, Catania, 15 - 18 novembre 2005. Vol. I, pp. 149-154
[7] V. Ferrara, C.M. Ottavi, Technology based on distributed GIS tools: an approach for sustainable
planning, Sustainable Development and Planning II Wit Press Southampton, Boston, Vol. 2, pp.
785-794 Transaction: Ecology and the Environment, Editor: WIT Press, Vol. 84, 2005
[8] V. Ferrara, C.M. Ottavi, ”Ray-tracing and UTD analyses for microcellular communications
in urban scene: a software methodology that uses 3-D GIS data of buildings”, Proceedings of
IEEE/ISPRS Joint Workshop on Remote Sensing and Data Fusion on Urban Area, Rome, 8-9th
November 2001, pp. 255-259
[9] V. Ferrara, C.M. Ottavi, ”Structures and organisation of an information tool dedicated to
simulation and management of environmental risks”, RISK ANALYSIS III, Ed. Brebbia, WIT
Press, 2002, pp. 213-222
[10] V. Ferrara, C.M. Ottavi, M. Guerriero, Tecniche di interoperabilit di dati e applicazioni nei
sistemi distribuiti GIS, Proceedings of 8a Conferenza Nazionale ASITA, Vol. II, pp. 1073-1078,
2004
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HIGH PERFORMANCE NON-VOLATILE MEMORIES
Non Volatile Memory (NVM) devices, such as the Flash memories, have very simple structure
consisting in a MOSFET and a control stack given by a polysilicon control gate (CG), a relatively
thick dielectric which couples the control gate to the floating gate, a polysilicon floating gate (FG),
and a 9-10 nm tunnel(gate) oxide. Write/erase operation of the NVM cell is ensured by charge
transfer from the substrate to the FG and vice versa. Therefore, the tunnel oxide is continuously
crossed by charge. This typically damages to the oxide and is the reason why the tunnel oxide
is still thicker than 9 nm. Write/erase times and voltages depend on the mechanism used for the
charge transfer. In most EEPROM cells, the write times can be in the range of microseconds
by employing hot-electron injection, which, in turn, requires high voltages and currents. On the
contrary, Fowler-Nordheim tunnel is a rather slow mechanism, which imposes charging/discharging
times in the millisecond range and, again, requires high voltage between the FG and the substrate.
1)Tunnel programmed non-volatile memories In this context, Program Throughput (PT), i.e.
number of bits that can be written per unit time, is a memory characteristic of particular interest
for a number of significant applications. At this regard it is well known that, compared with
the alternative method based on Channel Hot Electrons, Fowler-Nordheim (FN) tunnelling has a
substantial advantage as physical mechanism to inject electrons into the cell Floating Gate (FG),
essentially because of much higher values of the ratio between injection current (IINJ) and total
current absorbed by the device during programming, ultimately allowing a correspondingly higher
degree of parallelism (i.e. the number of cells that can be programmed in parallel) that is limited
by the total current available from on-chip circuitry. For this reason, we explored the possibility
of tunnel programming,injecting electrons from the channel into the FG of Flash cell transistors
by means of a high voltage applied between the Source (shorted to the Drain and Bulk) and
Control Gate (CG) terminals. The result of this operation is a target shift (DVT) in the cell
threshold voltage (VT), corresponding to a target amount of charge (QDVT) injected into the cell
FG. Together with the degree of parallelism (not of interest for this paper), the essential factor for
PT is the Program Time (tPR) of a single cell, and from this point of view tunnelling offers an
interesting characteristic, in that IINJ increases exponentially with the electric field in the tunnel
oxide (FOX): hence, even small increases in the applied voltage produce large decreases in tPR. For
a fixed value of QDVT, it has long been believed that increasing FOX during programming would
degrade oxide reliability, essentially because of Stress- Induced Leakage Currents (SILC), leading
to inadequate data retention characteristics. In our work we look for a voltage waveform to be
used in memory programming realising a good trade-off between tPR, applied voltages and oxide
degradation. As discussed later, the proposed solution features a small number of relatively high
voltage pulses, whose parameters are determined exploiting a recent study on oxide trap dynamics
under pulsed tunnelling conditions. As for quantitative results, preliminary results indicate that in
the case of oxide thickness (tOX) of 7 nm, programming times (tPR) of about 20 ms can be used
with minimal oxide degradation and voltages of about 18 V, i.e. moderately higher than those
normally used today for program times in the ms range.
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2) Non-volatile memories with silicon nanocrystals as floating gate When the oxide thickness becomes lower than a critical value (a few nanometers) where direct tunnelling mechanism dominates,
a large amount of current can pass through the thin oxide at relatively low voltage. In addition,
the charge-to-breakdown increases drastically. These characteristics of ultrathin oxides push one
to design devices to achieve fast write/erase speed and high cycling endurance. On the other hand,
due to the relatively high direct tunnelling current at low gate voltage, the retention time can be
shortened to minutes or seconds, unless the charge storage behaviour during charge retention mode
is improved. Using the quantum dots in the place of the conventional continous polysilicon floating
gate, a portion of the total charge is stored in each dot. This is accompanied by a reduced loss due
to the presence of SiO2 insulation between the grains. If the tunnel oxide is damaged in a point,
only the silicon dot close to that point will lose its charge, allowing a longer retention time. The role
of charge trapping mechanism in the nano-crystal localized states is currently under debate. The
presence of a trapping mechanism is invoked by several authors, in order to explain the measured
long retention times. A most accepted interpretation of experimental results is that the presence
of traps at the Si-dot surrounding could have an impact on the writing/retention properties of
such memory devices. Several research groups are currently working on modelling, realization and
characterization of these structures.
[1] F. Irrera, G. Puzzilli ” Crested barrier in the tunnel stack of non-volatile memories”, Microelectronics Reliability 45, N. 5-6 (2005) 907-10
[2] G. Puzzilli, D. Caputo, F. Irrera, C. Monzio Compagnoni, D. Ielmini, A.S. Spinelli, A.L.
Lacaita, C. Gerardi ”Improving floating-gate memory reliability by nanocrystal storage and pulsed
tunnel programming”, IEEE-Tran. on Dev. and Mat. Reliab. 4, N.3 (2004) 390-96
[3] G. Puzzilli, D. Caputo, F. Irrera ”Fast and reliable tunnel programming of nanocrystal nonvolatile memories”, IEEE-Trans. Electron Dev. 51 (2004) 1205-07
[4] F. Irrera, T. Fristachi, D. Caputo, B. Ricc ”Optimising Flash memory tunnel programming”,
Microelectronic Engineering 72 (2004) 405-10
[5] F. Irrera, B. Ricc, ”Pulsed tunnel programming of nonvolatile memories”, IEEE-Trans. Electron
Dev. 50 (2003) 94-98
[6] F. Irrera, B. Ricc, ”SILC dynamics in thermal oxides under pulsed stress”, IEEE-Trans. Electron Devices, 49, (2002), 1729-35
[7] A. Chimenton, F. Irrera, P. Olivo, ”Ultra short pulses improving performance and reliability
in Flash memories”, Proc. of IEEE-NVSMW 2006, San Diego (Ca)
[8] F. Irrera, G. Puzzilli, ”Crested barrier in the tunnel stack of non-volatile memories”, Microelectronics Reliability, 45, N.5-6 (2005) 907-10
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RELIABILITY OF ADVANCED GATE DIELECTRICS (HIGH-K DIELECTRICS,
ULTRATHIN OXIDES, ENGINEERED BARRIERS)
Systematic study of the electrical features of thin (¡10 nm) and ultrathin (¡5 nm) films of silicon
dioxides, of degradation, soft-breakdown and hard-breakdown has furnished a consistent amount
of data, useful for the development of analytical models of degradation. The thickness of the film
is a critical parameter in modeling, since it discriminates between two distinct regimes of carrier
transport: scattering dominated, in the case of thin oxides, and ballistic, in the case of ultra-thin
oxide. In consequence, rate equations ruling the mechanism of generation of new traps vary, and
solutions give different time and field or voltage dependence. Soft-breakdown is currently being
characterized in terms of Random Telegraph Noise of the gate current. Research in the field of highk dielectrics started in late 2002 within the frame of National FIRB project, due to the growing
interest of microelectronic industry in this field. Scaling rules of MOS transistors impose gate
oxide thickness below 1 nm for incoming technology nodes. However, in the case of pure-SiO2 gate
oxide, tunneling currents are too high for practical applications. In order to overcome this problem,
the use of materials with dielectric constants higher than that of SiO2 is proposed, keeping the
same capacitance value and low leakage current. Oxides based on elements as zirconium, hafnium,
lantanium, prasoedinium and gandolinium are currently receiving a lot of attention, since they
feature good chemical stability onto silicon substrate, amorphous network, large energy gap and
high band offset with silicon. Our research is focused on the electrical characterization of zirconium
and hafnium oxide grown by Atomic Layer Chemical Vapor Deposition in MOS capacitors. The
characterization is carried out by means of current-voltage curves and by capacitance-voltage,
conductance-voltage measurements at different frequencies. These measurements allow to measure
the leakage current, the flat- band voltage and to estimate the defect density in the bulk oxide or
at the interface. The effect of electrical stress on reliability of dielectric films is also studied. In
particular, monitoring stress induced leakage current, high-field conduction and capacitance curves
as function of the injected charge, defect density (N) in the bulk oxide have been extracted by
means of literature models. In particular, a square root time evolution of the stress-induced defects
has been found. More recently the high-k dielectrics have been demostrated in multilayer dielectric
stacks for application as tunnel dielectric in non-volatile memories with low operation voltage,
reduced equivalent thickness and not-scaled physical thickness of the tunnel oxide. In principle,
the condition of not-scaled physical thickness of the tunnel oxide should prevent from data loss, if
the high-k dielectric is ideal, i.e. if it exhibts density of traps of the samer order of the silicon dioxide.
However, in the realty, the advantages in terms of voltages introduced by the high-dielectric must
be traded-off with possible disadvantages in terms of reliability due to the distribution of traps in
the bulk and at the interface with the silicon dioxide, which can degrade data retention. Reliability
of such innovative structures are currently under study within a collaboration with IMEC.
[1] F. Irrera, G. Puzzilli, D. Caputo ” A comprehensive model for oxide degradation”, Microelectronics Reliability 45 N.5-6 (2005) 853-56
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[2] F. Irrera, G. Puzzilli ”Degradation of ultra-thin oxides”, IEEE-Trans. on Dev. and Mat.
Reliab. 4, N.3 (2004) 530-34
[3] D. Caputo, F. Irrera ”On the reliability of ZrO2 films for VLSI application”, Microelectronics
Reliab. 44 (2004) 739-45
[4] D. Caputo, F. Irrera, F. Palma ”An advanced characterization of defects in tunnel oxides”,
Material Science and Engineering B102 (2002) 1427-31
[5] D. Caputo, F. Irrera, F. Palma ” Monitoring of defects in thermal oxides during electrical
stress”, Solid-St. Phenomena 82 (2002) 237-42
[6] D. Caputo, F. Irrera ”Investigation and modeling of stressed oxides”, Microelectronics Reliability 42, 3 (2002) 327-33
[7] G. Puzzilli, F. Irrera, ”Data retention of silicon nanocrystal storage nodes programmed with
short voltage pulses”, IEEE-Trans. Electron Devices, 53 (2006) 775-81
[8] F. Irrera, G. Puzzilli, D. Caputo, ”A comprehensive model for oxide degradation”, Microelectronics Reliability, 45, N.5-6 (2005) 853-56
AMORPHOUS SILICON BASED PHOTODETECTORS AND ELECTRONIC
DEVICES
Hydrogenated amorphous silicon (a-Si:H) represents the most interesting material for large
area, low cost applications. Up to date, the main applications are solar cells, thin film transistor
for active matrix displays and photodetectors for large area arrays. Our research is focused on the
development of a-Si:H based devices for electronic and optoelectronic applications, starting from
the optimization of the optical and electrical properties of the material. - Study of the semiconductor properties: Bottom lines in this research activity are the analysis of the defect distribution
and defect kinetics in the bulk material and in multi-layer structures. Different characterization
methods have been developed in order to achieve informations on defects located in the forbidden
gap of intrinsic, doped and compensated materials. A different defect evolution during current
induced degradation and annealing of p-i-n homojunctions has been found. Nature and kinetics of
defects in compensated films, deposited by a mixture of silane, phosphine and diborane gases at
very low dopant concentrations, has been investigated in order to achieve materials with different
optoelectronic properties with respect to intrinsic materials. - Amorphous silicon based devices
1) The UV Detector. We have developed and optimized a family of solar blind UV amorphous
silicon photodetectors. An international patent has been carried out. Thanks to the selectivity
of the device in the UV spectral range and to the measured 502) The Color Detector. The two
terminal bias controlled three color detectors have been designed in order to allow applications
in large area matrix for reconstruction of bidimensional color images. Very recently, video rate
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application capability has been proved, and a new architectures of the driving circuit has been
developed. For this project, we collaborate with Xerox, Palo Alto (CA) has led to the fabrication
of the first color detector array with 512x512 pixels working with a-Si:H TFT in the active area
and CMOS periphery. 3) The Visible Infrared Photodetector. A tunable visible/infrared amorphous/crystalline silicon heterostructure photodetector has been manufactured and characterized,
showing an excellent spectral separation with few volts of bias voltage. A model has been also
developed which shows a very good agreement with the measurements. An active collaboration on
this particular project in progress with ENEA CR in Portici (NA). 4) The Two Terminal Switching
Device. Modulation of threshold voltage of the device has been investigated, focusing on different
structure parameters. Model predictions are confirmed by manufactured devices showing threshold
voltages ranging from 1 to 30 Volts, making it an alternative approach to TFT in active matrix
display technology. 5) The Bistable Device. A novel bistable device based on a-Si:H multilayer
stacked structure has been manufactured and characterized. Simulation showed that the thickness
and doping concentration of the central lightly doped layers determines the turn-on voltage and
the width of the hysteresis of the device. 6) The Junction Field Effect Transistor. We fabricated
the first Junction Field Effect Transistor (JFET) based on a-Si:H material, which could offer the
possibility to be used as switching device as well as analog amplifier. The device is constituted by a
p+ -i- n- junction, with the drain and source contacts patterned on the n-doped layer and the gate
electrode patterned on p+ doped layer. The manufactured device, with W/L=400/40 mm, shows
the typical current-voltage curves of a JFET with a threshold voltage equal to 4 Volt. Regarding
its application in linear circuit, first results are very encouraging, since we have achieved transconductance values of 1.5 x 10-6 V/A, which are comparable to those of state of the art TFT. 7) The
thin film stress sensor. A novel mechanical stress sensor, based on amorphous silicon technology,has
been fabricated and tested. It is able to perform mechanical stress measurement with both good
linearity and sensitivity. A very thin film of chromium silicide is formed on the top of the doped
silicon material after deposition and chemical etching of 30nm chromium film. The chromium
silicide acts as active region. From an electrical point of view, the sensor can be considered as a
simple bridge of resistances, where the resistances are due to the conductivity of the amorphous
silicon alloy film. As in a Wheatstone bridge structure, two contacts of the bridge are used to
apply the bias current to the sensing element, while the other two, orthogonal to the previous ones,
provide an output voltage proportional to the anisotropic modification of the resistivity induced
by the mechanical deformation. The device is able to measure both the bending and torsion force,
depending on orientation and geometries with respect to size and location of the contacts.
[1] J.T. Rahn, F. Lemmi, J.P. Lu, P.Mei, R.B. Apte, R.A. Street, R. Lujan, R. Weisfield, J. Heanue
”High resolution X-Ray imaging using a-Si:H flat panel arrays” IEEE Trans. Nucl. Science, 46,
p. 457 (1999) [2] D. Caputo, A. Nascetti, F. Palma ” Micro-Doped and Micro-Compensated aSi:H Films for Infrared Radiation Detection” IEEE Photonics Technology Letters 10, 1147 (1999)
[3] D. Caputo, G. de Cesare, ”Amorphous silicon switching device for high-resolution two color
photodetector matrix”, Sensor and Actuators, 78, p.108 (1999). [4] D. Caputo, G.de Cesare,
A.Nascetti, F.Palma, ”Experimental evidence of boron induced charged defects in amorphous silicon
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materials”, Thin Solid Films, vol. 348, p. 79 (1999). [5] D. Caputo ”Degradation and annealing f
a-Si:H solar cells by current injection: experiment and modeling” Solar Energy Materials and Solar
Cells, 59 p.289 (1999) [6] D. Caputo, G. de Cesare, V. Kellezzi, F. Palma, ”Design and Realization
of an Amorphous Silicon Junction Field Effect Transistor for Digital and Analog Applications ”
Appl. Phys. Lett., vol. 77, n. 9, p. 1390, (2000) [7] D. Caputo, G. de Cesare, A. Nascetti, F.
Palma; ” Non Linear Optical Gain in Bulk Baried Amorphous Silicon Phototransistor”; in stampa
on Proc. of Material Research Symposium; vol. 609, (2000). [8] D. Caputo, G. de Cesare, M.
Tucci, ”Characterization and Modeling of a Two Terminal Visible/Infrared Photodetector based
on Amorphous/Crystalline Silicon Heterostructure”, Sensor and Actuators vol. 88, n. 2, p. 139,
(2001). [9] G. de Cesare, D. Caputo, A. Nascetti,”Thin film stress sensor suitable for different
substrates”, Proc. of First International Conference on Sensing Technology, p. 143 (2005)
BIOSENSORS FOR DNA ANLYSIS
Microarray technology, or DNA chip, which allows the simultaneous study of thousands of different labeled DNA nucleotide sequences in a single hybridization experiment, has recently emerged
as a powerful tool for genetic research. The quantification of the hybridization is mainly based on
fluorescent markers bound to the DNA target. Most hybridization-detection systems are based on
the use of CCD cameras, which produce an image of the microarray, or on the use of fluorescence
microscopy. Although, both of the mentioned systems are very sensitive, they are not compact
and very expensive because of the optical systems. The research presented here is focused on the
development of array of biosensors for DNA chip based on amorphous silicon thin film technology,
which eliminates the need for the optical system. In particular we are developing two photosensors. The first bases its operation on the detection of the light emitted by the fluorochromes at
the emission wavelenght (lem) attached to the DNA target. The device is a p-i-n stacked structure, deposited on a glass substrate covered by a transparent conductive oxide (TCO). The layer
thicknesses have been designed to maximize the detector response at lem. The light, coming from
a monochromator supplied with a mercury lamp, impinges on the labeled DNA, deposited on the
same glass substrate but on the other side with respect to the sensor. The emission wavelength is
transmitted through the glass, while the excitation light is filtered by both the glass substrate and
the TCO. The photocurrent generated inside the sensor is directly proportional to the amount of
labeled DNA. From preliminary results, we can estimate a sensitivity at least equal to 200pM/cm2
for our sensor. The second photosensor bases its operation on the different UV absorbance of
Single-stranded DNA molecules with respect to double-stranded ones, a phenomenon known as
hypochromic effect. This effect allows to develop label-free DNA-sensors arrays, which are suitable
for very low cost systems. The device is obtained by a thin-film n-i-p of hydrogenated amorphous
silicon/silicon carbide hetero-junction deposited on conductive layer on glass and contacted on the
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top by a metal grid electrode. The photo-sensor is highly efficient in the UV spectrum, while it is
transparent to photons at longer wavelengths. From the first experiments, the minimum detectable
absorbance variation has been evaluated to be 2.2410-4 for an absolute absorbance of 0.055 at
0.5mW incident power at 253.4 nm.
[1] D. Caputo, G. de Cesare, A. Nascetti, C. Guiducci, B. Ricc, ”Label-free DNA analysis using
a-Si:H UV sensors”, Proc. of First International Conference on Sensing Technology, p. 254 (2005)
[2] G. de Cesare, D. Caputo, A. Nascetti,, C. Guiducci, B. Ricc, ”Hydrogenated amorphous silicon
ultraviolet sensor for deoxyribonucleic acid analysis”, Appl. Phys. Lett., 88, 083904, (2006)
PHOTONIC DEVICES WITH LIQUID CRYSTALS AND COMPOSITE
MATERIALS ON GLASS AND SILICON PLATFORMS
R. Asquini, A. d’Alessandro, D. Donisi
Our group, which gathers expertise both in the field of integrated optics and liquid crystal (LC)
flat panel display technology, demonstrated an optical bistable switch using ferroelectric LC and ionexchanged glass optical waveguides. Simulations carried out by means of beam propagation method
indicate the possibility to improve the performance of such a device with extinction ratios over 30
dB and coupling lengths of about 60 microns, at wavelength of 1550nm with losses below 2dB. Polymeric materials can also be used to obtain well performing and low cost integrated optic switches
operating at near infrared wavelengths. Moreover a proper electrode design allows polarisation
independent operation despite of anisotropy of LC. Novel composite materials, in which polymers
and LC are combined, offer new opportunities to make low cost and well performing optical devices
with new functionalities. Recently, a novel technique has been proposed to make permanent switchable gratings in composite materials made of nematic liquid crystals (NLC) and UV curable prepolymers, called POLICRYPS (Polymer Liquid Crystal Polymer Slices). POLICRYPS show lower
scattering losses and lower driving electric fields than PDLC (Polymer Dispersed Liquid Crystals)
gratings. The switch-off electric field, which minimizes the diffraction efficiency, due to a refractive
index matching between polymer and NLC, is fairly lower than the typical values required for PDLC
based gratings, because the strength acting on the NLC at its interface with the polymer is less
effective in POLICRYPS structures than in confined PDLC microdroplets. Our group measured
POLICRYPS diffraction efficiencies of about 100wavelengths of the so-called C-band (1530-1560
nm) of interest of optical communications by using a tunable diode laser. The switching time was
below 5ms by applying an electric field of less than 5V/ micron, which implies low driving voltages
in waveguided integrated POLICRYPS based devices. Our group has experimentally demonstrated
integrated optic filters using electro-optic gratings based on POLICRYPS structures, written on
top of optical channel glass waveguides made by using double ionexchange on glass. These optical
filters have several advantages such as the optical integration, compactness, low driving voltages,
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short tuning times and they are switchable. The on and off state correspond to two orthogonal
orientations of the LC molecule optical axis. For a linearly polarized optical wave the LC switching
corresponds to a variation of the LC refractive index equal to its birefringence of about 0.189 at
1550 nm in the case of the LC E7 (which provides a better thermal stability than 5CB). It has
been observed that in such filters it is possible to tune the filter by means of small modulations
of the LC refractive index in the order of small fraction of its birefringence. Such a modulation is
obtained by means of a very small modulation (of the order of a few mV) of the driving voltage,
whose corresponding filter response is of a few microseconds. Our group has already demonstrated
an optical filter made of a double ion-exchanged channel waveguide in BK7 glass with POLICRYPS
grating, 1 cm long, as overlayer made of alternated slices of nematic LC E7 and UV cured polymer
NOA61 by Norland. The optical spectrum of the filter shows a 3 dB bandwidth of about 0.12 nm,
which can be tuned over the entire C-band and can be used for wavelength division multiplexed
optical communication systems. The characteristics of such a filter are advantageous also for fiber
Bragg grating sensor interrogating systems, as demonstrated in the frame of our recent collaboration with ENEA laboratories in Frascati. In particular the filter resolution does not limit the
sensitivity of the system, which can be in the order of 1 microstrain with a suitable design of a low
noise optical receiver. Further innovative integrated optic structures demonstrated by our group
consist of channel waveguides made of E7 nematic LC in SiO2/Si V-grooves. The grooves have
been obtained by wet etching n-Si substrates first and then by thermally growing an approximately
2 m thick SiO2 cladding layer. Propagation of infrared light at a wavelength of 1550 nm shows
a good optical confinement in 10 m wide liquid crystal waveguides. Modal analysis and beam
propagation simulations predict single mode propagation. This is experimentally confirmed by the
acquired near field images. A single optical waveguide acts as an integrated optic polarizer, since
only vertical polarization can propagate due to the orientation of the liquid crystal molecules. The
horizontal polarization state is suppressed by more than 25 dB, then such waveguides act as high
performing integrated optic polarizers.
[1] J. F. Henninot, M. Debailleul, R. Asquini, A. dAlessandro, and M. Warenghem, Selfwaveguiding in an anisotropic channel induced in dye doped nematic liquid crystal and a bent
self-waveguide, Journal of Optics A: Pure Applied Optics, Vol. 6, pp. 315-323, 2004.
[2] A. dAlessandro, R. Asquini, C. Gizzi, R. Caputo, C. Umeton, A. Veltri, A. V. Sukhov, Electrooptic properties of switchable gratings made of polymer and nematic liquid crystals slices, Optics
Letters, Vol. 29, 1405-1407, 2004.
[3] C. Gizzi, R. Asquini, A. dAlessandro, An integrated 2x2 SSFLC optical switch with channel
ion-exchanged glass waveguides, Ferroelectrics, Vol. 312, pp. 31-37/[453-459], 2004.
[4] C. Gizzi, R. Asquini, A. dAlessandro, A polarization independent liquid crystal assisted vertical
coupler switch, Molecular Crystals and Liquid Crystals, Vol. 421, pp. 95-105, 2004.
[5] A. dAlessandro, R. Asquini, R. P. Bellini, D. Donisi, R. Beccherelli, Integrated optic devices
using liquid crystals: design and fabrication issues, Invited paper, Proc. of SPIE 2004 Liquid
Crystal VIII Conference 5518, 49th Annual Meeting 2-6 August 2004, Denver Colorado USA, p.
123-135, Liquid Crystals VIII; Iam-Choon Khoo Ed.
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[6] B. Bellini, D. Donisi, R. Asquini, A. dAlessandro, A tuneable waveguided optical filter made
of Polymer and Liquid Crystal slices operating in C-band: analysis of transmission and reflection
properties, Molecular Crystals and Liquid Crystals, Vol. 429, pp. 265-276, 2005.
[7] R. Beccherelli, I. G. Manolis, A. dAlessandro, Characterisation of photoalignment materials for
photonic applications at visible and infrared wavelengths, Molecular Crystals and Liquid Crystals,
Vol. 429, pp. 227-235, 2005.
[8] R. Asquini, A. Fratalocchi, A. dAlessandro, G. Assanto, Electro- optic routing in a nematic
liquid crystal waveguide Applied Optics, vol. 44, No. 19, pp. 4136-43, 2005.
[9] B. Bellini, R. Beccherelli, I. G. Manolis, D. Donisi, R. Asquini, and A. dAlessandro, Nematic
liquid crystal channel waveguides embedded in SiO2/Si grooves”, Proceeding of WFOPC2005, 4th
IEEE/LEOS Workshop on FIbres and Optical passive Components, Mondello (Pa), Italy June
22-24, 2005, pp. 275-280.
[10] B. Bellini, J-F. Larchanch, J.-P. Vilcot, D. Decoster, R. Beccherelli and A. dAlessandro,
Photonic devices based on preferential etching, Applied Optics, vol. 44, No. 33, pp. 7181-7186,
2005.
[11] R. Asquini, J. DAngelo, A. dAlessandro A switchable optical add- drop multiplexer using ionexchange waveguides and a POLICRYPS grating overlayer, Molecular Crystals and Liquid Crystals,
Vol. 450, pp. 203/[401]-214/[412], 2006.
[12] B. Bellini, A. dAlessandro, R. Beccherelli, A method for butt- coupling optical fibres to liquid
crystal, Optical Materials, 2006, in press.
DESIGN OF COMPUTATIONAL CORES AND SYSTEM-LEVEL
ARCHITECTURES FOR SYSTEM-ON-CHIP PLATFORMS TARGETED FOR
HIGHLY-EFFECTIVE POWER-EFFICIENT MULTIMEDIA SIGNAL
PROCESSING APPLICATIONS
M. Olivieri, R. Mancuso, M. Scarana, S. Smorfa
The ever-growing development of highly sophisticated algorithms and applications, especially in
the field of audio and video signal processing, demands an in-depth investigation of novel hardware
design guidelines oriented to power efficiency combined with enhanced computational performance.
Our group attacked both issues by focussing on different design abstraction-levels, starting from
specialized functional units and ending up with a system-level view of challenging DSP architectures. We concentrated on the characterization of floating-point truncated multipliers as being
basic as well as critical building blocks of most arithmetic cores. Pure truncated multiplication is
liable to attractive low-power implementations, yet suffers from reduced numerical precision. By
elaborating different precision recovery mechanism and realizing them in ad-hoc circuits, we showed
how computational performance in truncated multiplication can be preserved and we demonstrated
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its practical feasibility. When analysing DSP architectures, power-efficiency still represented our
main concern. To this end, we defined a circuit level power estimation technique based on the
integration of traditional analytical power models in order to account for both block-internal and
interconnects-dependent dissipation and we extended it to provide applicability to specific DSPrelated structures. We were able to identify the transfer triggered architecture paradigm as a
surprising power-effective solution for DSP applications. Throughout all our research activities
we spent particular efforts in responding to diverse stimuli from the semiconductors industry and
market. Our partnership with Philips Semiconductors and ST Microelectronics served this purpose in isolating killer applications such as video data compression by ad-hoc processing of the
color-channels and transform-based coding. We are presently investigating on the optimization
of Jpeg2000 codec by software-hardware partitioning and mapping on general-purpose as well as
dedicated single/multi-processor platforms.
[1] M. Olivieri, M. Scarana, S. Smorfa, Circuit-level power efficiency investigation of advanced
DSP architectures based on a specialized power modeling technique., Proceedings of the 2005
IEEE International Symposium on Circuits and Systems, (ISCAS 2005).
[2] F. Menichelli, M. Olivieri, S. Smorfa, Software Optimization of the JPEG2000 Algorithm on
a VLIW CPU Core for System-on-Chip Implementation, Third IASTED International Conference
on Circuits, Signals, and Systems. October 24 - 26, 2005 Marina del Rey, CA, USA.
[3] M. Olivieri, F.Pappalardo and G. Visalli Bus-Switch Coding for Dynamic, Power Managment in
off-chip CommunicationChannels Synopsys User Group Conference, May 2005, Munich, Germany.
DESIGN METHODOLOGIES FOR LOW POWER MICROPROCESSOR CORES
FOR SYSTEMS-ON-CHIP
M. Olivieri, F. Menichelli, M. Scarana
Current silicon technology has made possible the integration of a complete heterogeneous system on a single silicon chip composed of interacting subsystems endowed with radically different
functionalites (CPU, memory, I/O, coprocessors, analog parts, etc.). A SoC is usually a very
small sized system, capable of adapting to diverse applications. The availability of pre-designed
blocks (IP cores) allows the SoC designer to move the design effort from single components to the
definition of an architecture connecting several blocks that guarantees optimum balance between
performance, energy requirements and cost. Therefore, it is essential that critical block cores be
designed taking into account system-level performance and power dissipation. With this view, we
are designing innovative cores in the form of programmable processors featuring special functions
to reduce the power consumption. In this direction a definitely important result has been obtain in
code compression techniques, capable of reducing power consumption in memory traffic. Another
important activity focus on the mapping of code on scratchpad memories. In particular it has
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been developed a technique for scratchpad mapping of code segments, which has the distinctive
characteristic of working directly on application binaries, thus requiring no access to either the
compiler or the application source code.
[1] F.Menichelli, D. Bertozzi, L. Benini, M. Olivieri, A. Bogliolo, MPARM: Exploring the MultiProcessor SoC Design Space with SystemC, Journal of VLSI Signal Processing Systems, Kluwer
Academics, Sept. 2005.
[2] M. Olivieri, F. Pappalardo, G. Visalli, Encoding circuits for low power optical on-chip communications International Symposium on Circuits and Systems, Kobe, Japan, May 2005. IEEE.
DESIGN AND PROTOTYPING METHODOLOGIES FOR SYSTEM-ON-CHIP
ARCHITECTURES
M. Olivieri, F. Menichelli, M. Balsi, S. Smorfa
Current silicon technology has made possible the integration of a complete heterogeneous system on a single silicon chip composed of interacting subsystems endowed with radically different
functionalites (CPU, memory, I/O, coprocessors, analog parts, etc.). A SoC is usually a very
small sized system, capable of adapting to diverse applications. The availability of pre-designed
blocks (IP cores) allows the SoC designer to move the design effort from single components to the
definition of an architecture connecting several blocks that guarantees optimum balance between
performance, energy requirements and cost.
As a result, hardware/software SoC architecture design is an extremely complex task which need
innovative methodologies to be defined, in order to dominate the design complexity. ”Architecture
design space exploration” has become a key point of such methodologies, involving a sophisticated
modeling and simulation activity at the system level. A complete environment for multi-processor
SoC simulation (MPARM) has been developed, in collaboration with the Univ. of Bologna, capable
of executing whole applications on a real time operating system.
An important activity has been the introduction of new functionalities to the MPARM environment regarding the modeling of power consumption oriented at the simulation of attacks to
cryptographic algorithm (i.e. differential power analysis). In particular a system simulator has
been developed working at a higher level of abstraction than RTL and at the same time able to
evaluate the power consumption with the necessary accuracy, in order to test attack strategies and
countermeasures in reduced times. The work has been done in the ambit of the European project
named SCARD - Side Channel Analysis Resistant Design Flow (IST-2002-507270).
[1] M. Olivieri, G. Scotti, A. Trifiletti, A novel yield optimization technique for digital CMOS
circuit design by means of process parameters run-time estimation and body bias active control,
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IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 13, n. 5, May 2005, pp.
630-638.
[2] Olivieri, M.; Scotti, G.; Tommasino, P.; Trifiletti, A.; Necessary and Sufficient Conditions for
the Stability of Microwave Amplifiers With Variable Termination Impedances, IEEE Transactions
on Microwave Theory and Techniques, vol. 53, n. 8, Aug. 2005, pp. 2580 2586.
[3] Riedel, F.; Mancuso, R.; Olivieri, M., Safe start-up sequence of integrated charge pumps using
dedicated control circuit, Electronics Letters, vol. 41, n. 25, Dec. 2005. pp. 1374 1375
[4] M. Aigner, S. Mangard, R. Menicocci, M. Olivieri, G. Scotti, A novel CMOS logic style with
data independent power consumption International Symposium on Circuits and Systems, Kobe,
Japan, May 2005. IEEE.
[5] M. Olivieri, F. Pappalardo, and G. Visalli, A Statistical Analysis, for Reducing the Energy
Dissipation In A Bus-Switch Encoder, Third IASTED International Conference on Circuits, Signals,
and Systems. October 24 - 26, 2005 Marina del Rey, CA, USA.
[6] M. Olivieri, F. Pappalardo, and G. Visalli, Design Issues for Bus Switch Systems in Deep Submicro Metric CMOS Technologies, Third IASTED International Conference on Circuits, Signals,
and Systems. October 24 - 26, 2005 Marina del Rey, CA, USA.
[7] Olivieri, M.; Pappalardo, F.; Visalli, G., Performance-timing overhead trade-off analysis for a
low-power data bus encoding based on input lines reordering, 32nd Conference of IEEE Industrial
Electronics Society, (IECON 2005), 6-10 Nov., 2005. IEEE.
ANALOG CIRCUITS AND EMBEDDED SYSTEMS FOR SIGNAL
INTERPRETATION
M. Balsi, G. Valente, G. Pazienza, F. De Martino, G. Filosa, F. Gentile
Signals issuing from the environment can be processed at increasing levels of abstraction from
signal conditioning, to feature extraction, application-specific decomposition, object recognition,
semantic interpretation. Some examples include artificial vision, object recognition and target
tracking, blind source separation, medical signal processing. This group addresses this kind of
problems from the point of view of electronic system design at several levels, by appropriate formalization and theoretical study that drives the choice and development of practical analog and/or
digital solutions. Current main lines of research are related to applications in medical signal analysis, artificial vision for robotics, anti-personnel mine detection, besides activity in the field of
analog circuit theory and design, especially at the architectural level. Our activity in medical signal analysis is currently mostly devoted to functional Magnetic Resonance imaging (fMRI), and
magnetoencefalogram (MEG) processing. The work on fMRI is performed in collaboration with the
Department of Neurological Sciences of this University, as well as with the University of Maastricht.
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We have been working on Independent Component Analysis (ICA) of fMRI images, obtaining results on automatic selection of relevant components, with the aim of providing tools for real-time
fMRI processing. For this reason, we are developing DSP and FPGA-based solutions for efficient
computation. Application of similar techniques to MEG has yielded better localization of detected
activity. ICA is also being applied to semiconductor device modeling, in order to obtain a set
of statistically independent parameters from the estimated extrinsic parameters. Extraction of a
population of such independent parameters for Montecarlo simulation yields a realistic population
of extrinsic parameters that allows for accurate prediction of yield. The artificial vision applications we have considered mostly stem from the research that has been going on for more than a
decade on the theory, applications and circuit implementations of cellular neural networks (CNNs).
Building on theoretical results and algorithm development obtained in the last years, we continue
exploration of robot visual driving systems based on embedded CNN emulators implemented in
DSP and FPGA. New te

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